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2019-12-06cmd: Prepare sysboot command independencePatrice Chotard
As sysboot and pxe commands are sharing piece of code, migrate this common code into a new file pxe_utils.c to prepare sysboot command code extraction from pxe.c Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06cmd: Migrate from_env() from pxe.c to nvedit.cPatrice Chotard
Migrate from_env() from pxe.c to nvedit.c as it's not pxe specific. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06video: make BPP and ANSI configs optionalAnatolij Gustschin
Many boards do not use all selected framebuffer depth configurations, for such boards there is some unused code in video and console uclass routines. Make depth specific code optional to avoid dead code and slightly reduce binary size. Also make ANSI code optional for the same reason. When i.e. using only VIDEO_BPP16 the code size shrinks (below values when using gcc-7.3.0): $ ./tools/buildman/buildman -b video-wip -sS wandboard ... 01: Merge git://git.denx.de/u-boot-sh 02: video: add guards around 16bpp/32bbp code 03: video: make BPP and ANSI configs optional arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0 Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Eugen Hristev <eugen.hristev@microchip.com> Tested-by: Patrice Chotard <patrice.chotard@st.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2019-12-06video: add guards around 16bpp/32bbp codeAnatolij Gustschin
Many boards use only single depth configuration, for such boards there is some unused code in video and console uclass routines. Add guards to avoid dead code. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Eugen Hristev <eugen.hristev@microchip.com> Tested-by: Patrice Chotard <patrice.chotard@st.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2019-12-06Merge tag 'u-boot-rockchip-20191206' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - rockchip pwm driver update to support all the SoCs - RK3308 GMAC and pinctrl support - More UART interface support on PX30 and pmugrf reg fix - Fixup on misc for eth_addr/serial# - Other updates on variant SoCs
2019-12-06Revert "spl: fix entry_point equal to load_addr"Tom Rini
Due to the (seemingly bogus) assumption of a default CONFIG_SYS_UBOOT_START value we will revert this change for now and evaluate it again for the next release along with changes to CONFIG_SYS_UBOOT_START. This reverts commit d3e97b53c1f2464f4898226de7d89abf242e4aa8. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-06imx: imx8qxp_mek: increase buffer sizes and args numberAnatolij Gustschin
The default value of CONFIG_SYS_CBSIZE is too small when we need to input long commands or when using long kernel command line. The default value of CONFIG_SYS_MAXARGS is too small to add a long command line, and the kernel might not boot as intended without the complete bootargs. Increase argument buffer sizes and the number of arguments. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-12-06clk: imx: imx8mm: Fix the first root clock in imx8mm_ahb_sels[]Frieder Schrempf
The 24MHz oscillator clock is referenced by "clock-osc-24m" and not "osc_24m". Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-12-06ARM: imx: vining2000: Align SOC and ARM LDO voltagesMarek Vasut
The board has both VDD_SOC_IN and VDD_ARM_IN rails connected to the same PMIC rail, align the LDO voltages to avoid leaking inside the MX6SX SoC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: imx: vining2000: Repair PCIe supportMarek Vasut
Ever since the conversion to DM PCI, the board was missing the PCIe DT nodes, hence the PCI did not really work. Fill in the DT nodes and add missing PCIe device reset. Moreover, bring the PCIe power domain up before booting Linux. This is mandatory to keep old broken vendor kernels working, as they do not do so and depend on the bootloader to bring the power domain up. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: imx: vining2000: Enable fitImage supportMarek Vasut
The fitImage support was enabled in the downstream U-Boot port and the kernel images on the device are fitImage, yet this functionality is not enabled in mainline U-Boot. Enable it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: imx: vining2000: Convert to ethernet DMMarek Vasut
Convert the board to ethernet DM support. Adjust board file accordingly, as the board_eth_init() contains custom clock configuration required for this board to work. Furthermore, enable FEC1 clock to make FEC1 work as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: imx: vining2000: Enable DDR DRAM calibrationMarek Vasut
Enable DRAM calibration in SPL to improve behavior of the board in edge conditions of the thermal envelope of the board and make it even more stable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: imx: vining2000: Convert to SPL frameworkMarek Vasut
In preparation for use of DDR DRAM fine-tuning upon boot, convert the board to SPL framework instead of using DCD tables to bring up DRAM and pinmux. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: mx6: pmu: Expose PMU LDO configuration interfaceMarek Vasut
Make the PMU LDO configuration interface available to board code, so that board code can reconfigure the internal LDOs of the SoC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2019-12-06board: colibri_imx7: reserve DDR memory for Cortex-M4Igor Opaniuk
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for the rpmsg communication. Both use cases need a fixed location of memory reserved. For the rpmsg use case the reserved area needs to be in sync with the kernel's hardcoded vring descriptor location. Use the linux,usable-memory property to carve out 1MB of memory in case the M4 core is running. Also make sure that the i.MX 7 specific rpmsg driver does not get loaded in case we do not carve out memory. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06common: fdt_support: add support for setting usable memoryIgor Opaniuk
Add support for setting linux,usable-memory property in the memory node of device tree for the kernel [1]. This property holds a base address and size, describing a limited region in which memory may be considered available for use by the kernel. Memory outside of this range is not available for use. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/chosen.txt Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06warp7: Fix U-Boot corruption after saving the environmentFabio Estevam
U-Boot binary has grown in such a way that it goes beyond the reserved area for the environment variables. Running "saveenv" followed by a "reset" causes U-Boot to hang because of this overlap. Fix this problem by increasing the CONFIG_ENV_OFFSET size. Also, in order to prevent this same problem in the future, use CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time. CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare CONFIG_ENV_OFFSET with its direct value instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Pierre-Jean Texier <pjtexier@koncepto.io> Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io> Acked-by: Joris Offouga <offougajoris@gmail.com> Tested-by: Joris Offouga <offougajoris@gmail.com>
2019-12-06mx6: Allow configuring the NoC registers on i.MX6QPFabio Estevam
The NoC registers on i.MX6QP needs to be configured, otherwise some usecases in the kernel behave incorrectly, such as rotation and resize. Currently the NoC registers are not configured in the kernel, so configure them in U-Boot like it is done in the NXP U-Boot tree. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-12-06mx6cuboxi: Add Baruch as maintainerFabio Estevam
Add Baruch Siach as a mx6cuboxi maintainer. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Baruch Siach <baruch@tkos.co.il>
2019-12-06mx7ulp: Sync the device tree related filesFabio Estevam
Sync the mx7ulp device tree related files with the one from NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0). The mainline support for i.MX7ULP is very premature at this stage. We should probably re-sync with mainline Linux dts when it gets in better shape, but for now sync with the U-Boot vendor code. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: scg: Remove unnused scg_a7_apll_init()Fabio Estevam
scg_a7_apll_init() is not called anywhere, so remove such dead code Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitionsFabio Estevam
The LDOVL definitions is common to all the modes, not only RUN mode, so in order to avoid confusion, remove the _RUN notation from the PMC1 LDOVL definitions. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE optionFabio Estevam
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards designed to operate with LDO enabled mode can work with 0.95V at LDO output in RUN mode as per the datasheet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Print the LDO mode statusFabio Estevam
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode or LDO bypass mode. Print the LDO mode status in the U-Boot log for convenience. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06video: bmp: Fix video_display_rle8_bitmap()Patrice Chotard
In case the BMP size is bigger than the frame buffer, don't use the BMP's width and height in video_display_rle8_bitmap, but the one's checked in video_bmp_display() as parameters to video_display_rle8_bitmap(). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> CC: Yannick Fertré <yannick.fertre@st.com>
2019-12-06video: bmp: Fix video_splash_align_axis()Patrice Chotard
Convert panel_picture_delta and axis_alignment from unsigned long to long to insure to store correctly the difference between panel_size and picture_size in case the panel_size is smaller than picture_size. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> CC: Yannick Fertré <yannick.fertre@st.com> [agust: change axis_alignment to long] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2019-12-05Merge branch '2019-12-05-master-imports'Tom Rini
- Assorted omapl138_lcdk / da850-evm fixes - FAT fix, add another pytest as well for FAT. - Assorted general fixes
2019-12-06rockchip: allow loading larger kernelsBen Wolsieffer
Recent versions of the Linux kernel with many options enabled have grown large enough to overwrite the beginning of the initrd. For example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB, while only 31.5 MiB are available between kernel_addr_r and ramdisk_addr_r. This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399, allowing for much larger kernels. Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06rockchip: rk3328: rock64: enable CONFIG_MISC_INIT_RBen Wolsieffer
This enables reading of the cpuid and a static MAC address. Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06pinctrl: rockchip: Add pinctrl support for rk3308David Wu
An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calculate offset. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06arm: rockchip: rk3308: Initialize the iomux configurationDavid Wu
When we want to use plus pinctrl feature, we need to enable them at spl. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06pwm: rk_pwm: Make PWM driver to support all Rockchip SocsDavid Wu
This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3328 and the chips after it, which can support hardware lock, configure duty, period and polarity at next same period, to prevent the intermediate temporary state. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CCDavid Wu
The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06arm: dts: Add mac node for rk3308 at dtsi levelDavid Wu
The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06net: gmac_rockchip: Add support for rk3308David Wu
Add the glue code to allow the rk3308 variant of the Rockchip gmac to provide network functionality. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06rockchip: config: add support for firefly-px30 boardKever Yang
This is a core board named Core-PX30-JD4 with a mainboard from Firefly, name it as firefly-px30 for now. This board can re-use the dts of PX30, the only difference is the UART IO, the firefly use UART2 M1 while evb use UART2 M0. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: misc: protect serial# from getting overwrittenHeiko Stuebner
serial# is one of the vendor properties and thus protected from being overwritten if already set. If env_set is called anyway this result in some nasty warnings, so check for presence before trying that. In the same direction check for the presence of cpuid# and compare it to the actual hardware and emit a warning if they don't match. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: misc: don't fail if eth_addr already setHeiko Stuebner
rockchip_setup_macaddr() runs from an initcall, so returning an error code will make that initcall fail thus breaking the boot process. And if an ethernet address is already set this is definitly not a cause for that, so just return success in that case. Fixes: 04825384999f ("rockchip: rk3399: derive ethaddr from cpuid"); Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px30: Add support for using UART3 as debug UARTPaul Kocialkowski
Some generic PX30 SoMs found in the wild use UART3 as their debug output instead of UART2 (used for MMC) and UART5. Make it possible to use UART3 as early debug output, with the associated clock and pinmux configuration. Two sets of output pins are supported (M0/M1). Future users should also note that the pinmux default in the dts is to use the M1 pins while the Kconfig option takes M0 as a default. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNELPaul Kocialkowski
UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px30: Fixup PMUGRF registers layout orderPaul Kocialkowski
According to the PX30 TRM, the iomux registers come first, before the pull and strength control registers. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05rockchip: evb-px5: disable NETAndy Yan
PX5 evb has no ETH port, so disable it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px5: enable spl-fifo-mode for emmc for px5-evbAndy Yan
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: rk3308: enable spl-fifo-mode for emmcAndy Yan
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. And show my best respect to Heiko's work for this solution. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05doc: rockchip: Update build instruction for rk3308Andy Yan
After commit d8765e2422cd ("Enable building of u-boot.itb on Rockchip platform"), u-boot.itb will automatically generated by "make all" command, manually command "make u-boot.itb" is no longer needed. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05ARM: omapl138_lcdk: Shrink code size by building with ThumbAdam Ford
SPL has limited available resources, and the performance between ARM and Thumb isn't that significant. This patch builds using Thumb instruction set to reduce the code size by nearly 6K. Original: text data bss dec hex filename 26526 4004 1376 31906 7ca2 spl/u-boot-spl Thumb: text data bss dec hex filename 20232 4004 1376 25612 640c spl/u-boot-spl Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-05Fix typo in macros, "FIRMEWARE" -> "FIRMWARE"Thomas Hebb
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-05ARM: da850-evm: Disable SYS_MMCSD_RAW_MODE_USE_SECTORAdam Ford
The da850-evm doesn't have the boot pins configured in a way to make MMC/SD booting an option, and MMC/SD support is not enabled in SPL. Therefore, there is no need to support raw mode mmc/sd support in SPL. This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR Signed-off-by: Adam Ford <aford173@gmail.com>
2019-12-05spl: fix entry_point equal to load_addrGiulio Benetti
At the moment entry_point is set to image_get_load(header) that sets it to "load address" instead of "entry point", assuming entry_point is equal to load_addr, but it's not true. Then load_addr is set to "entry_point - header_size", but this is wrong too since load_addr is not an entry point. So use image_get_ep() for entry_point assignment and image_get_load() for load_addr assignment. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
generated by cgit (git 2.34.1) at 2025-01-17 21:52:03 +0000