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2019-11-17rockchip: rk3308: Add sdram driverAndy Yan
A dm based dram driver for rk3308 u-boot to get capacity. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17board: rockchip: Add rk3308 evb supportAndy Yan
Add support for rk3308 evaluation board. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rockchip: Add dts for rk3308 evbAndy Yan
Add dts for rk3308 evb, sync from the linux kernel upstream list [0]. [0]https://patchwork.kernel.org/patch/11201555/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: Add clk driver for rk3308Finley Xiao
Add clk controller driver for RK3308 SOC. This patch depends on Elaine's pll patch[0]. [0]http://patchwork.ozlabs.org/patch/1183718/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: rockchip: Add RK3308 SOC supportAndy Yan
RK3308 is a quad Cortex A35 based SOC with rich audio interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which designed for intelligent voice interaction and audio input/output processing. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: pll: add common pll setting funcsElaine Zhang
Common PLL setup function, compatible with different SOC. Mainly for the subsequent new SOC use. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: orangepi: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: khadas-edge: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: rock-pi4: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm64: dts: rk3399-rock960: add vdd_log and its init valueKever Yang
Add vdd_log node according to rock960 schematic V13. This patch affect two boards: - Rock960 Model A - Ficus Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-11-17rockchip: dts: rk3399-firefly: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399-evb: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399: move the u-boot, dm-pre-reloc to the u-boot.dtsiPeter Robinson
The u-boot specific pieces in the dts files should be in u-boot.dtsi not the main files, this allows easier sync with upstream. The rk3399.dtsi has a mix of both so move them all for consistency. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix with missing pmugrf) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: split rockpro64 out of evb_rk3399Vasily Khoruzhick
rockpro64 needs to setup I/O domains in order for USB to work in u-boot. Since we currently don't have a driver to do that, split it into its own board file and initialize I/O domains here. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: fix wrong CONFIG_IS_ENABLED handlingHeiko Stuebner
CONFIG_IS_ENABLED() needs the config name like used in Kconfig, so without the leading CONFIG_. The clock drivers all wrongly check for CONFIG_RESET_ROCKCHIP, fix that Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: rv1108: remove duplicate reset initHeiko Stuebner
rockchip_reset_bind() already does the needed init for the reset registers, only referenced the wrong cru structure. So we can get rid of the open-coded reset init and just fix the correct cru reference. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: slightly increase center voltageSoeren Moch
The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage scaling. So the regulator reset voltage of 0.9V is used on this board. Let u-boot initialize the center voltage to 0.95V as it is done for the VD_LOGIC domain. This avoids instability and occasional linux kernel Opses on this board. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: sync dts from linux kernelSoeren Moch
The most important change for u-boot is the fix for the vdd-log pwm voltage regulator to avoid overvoltage for the VD_LOGIC power domain. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: rock960: Update config for TPLPeter Robinson
Enable TPL for rock960 like other rk3399 boards. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17configs: Rename roc-rk3399-pc -> roc-pc-rk3399 defconfigJagan Teki
roc-rk3399-pc_defconfig is committed in below commit <8a681f4c5aa15db51ad0209734859c9fe7c29cfd> ("rockchip: rk3399: Add ROC-RK3399-PC support") which doesn't follow the existing defconfigs on rk3399. So, rename as followed with other rk3399 defconfigs. Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-roc-pc: Sync latest dts changes from LinuxJagan Teki
Few important regulator power rails fixes are available in linux-next, so sync them same. Here is the last commit details: commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails") Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: Init driver otg_data for rk3288 usb phyKever Yang
RK3288 needs to init the otg_data in board level to make the phy driver work. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: usb: Migrate to use ofnodeKever Yang
Migrate to use ofnode_* instead of fdt_* so that we may able to use live dt for usb udc driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30-evb boardHeiko Stuebner
The px30 evb is an evaluation board for the px30 together with a dsi- connected display. This adds board and config files for it. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 architecture coreHeiko Stuebner
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 devicetreesHeiko Stuebner
Add px30 related devicetrees synced from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: misc: read cpuid either from efuse or otpHeiko Stuebner
Newer Rockchip socs use a different ip block to handle one-time- programmable memory, so depending on what got enabled get the cpuid from either source. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17misc: add driver for the Rockchip otp controllerFinley Xiao
Newer Rockchip socs like the px30 use a different ip block to handle one-time-programmable memory, so add a misc driver for it as well. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: mkimage: add support for px30Kever Yang
Add the table entry for px30 socs. The px30 has 10K of sram available. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17net: gmac_rockchip: add support for px30Heiko Stuebner
Add the glue code to allow the px30 variant of the Rockchip gmac to provide network functionality. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: add px30 clock driverKever Yang
The px30 contains 2 separate clock controllers, pmucru and cru. Add drivers for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17pinctrl: rockchip: add px30 pinctrl driverDavid Wu
Add the necessary glue code to allow pinctrl setting on px30 socs. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add core px30 headersHeiko Stuebner
Add headers needed by the upcoming px30 support, including two new dt-binding headers taken from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17spl: separate SPL_FRAMEWORK config for spl and tplHeiko Stuebner
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all cases, making the TPL bigger. There may be cases where the TPL is really size constrained due to its underlying ram size. Therefore introduce a new TPL_FRAMEWORK option and make the relevant conditionals check for both. The default is set to "y if SPL_FRAMEWORK" to mimic the previous behaviour where the TPL would always get the SPL framework if it was enabled in SPL. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: Fix dram setting to make dram more stableYouMin Chen
There are some code different with rockchip vendor code which may lead to different bugs, including: 1) Fix setting error about LPDDR3 dram size ODT. 2) Set phy io speed to 0x2. 3) Fix setting error about phy_pad_fdbk_drive. 4) Fix setting error about PI_WDQLVL_VREF_EN Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: update calculate_strideKever Yang
Update the calculation of the stride to support all the DRAM case. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: Sync the io setting from Rockchip vendor codeKever Yang
The io setting are updated after some bugfix in different rk3399 boards, sync the code from vendor. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: update lpddr4 timing for rk3399Kever Yang
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip vendor code; Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: add support detect capacityYouMin Chen
Add capacity detect for rk3399 so that the driver able to detect the capacity automatically. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: update the function of sdram_initYouMin Chen
Clean up the sdram_init to keep sync with rockchip source code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: fix error about get_ddrc0_con reg addrYouMin Chen
Correct the register to its correct name. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: Clean up codeYouMin Chen
Clean up rk3399 dram driver source code for more readable. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: migrate to use common codeYouMin Chen
For there are some structures and functions are common for all rockchip SoCs, migrate to use the common code so that we can clean up reduandent codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3328: use common sdram driverYouMin Chen
RK3328 has a similar controller and phy with PX30, so we can use the common driver for it and remove the duplicate codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: px30: add sdram driverYouMin Chen
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3. For TPL_BUILD, the driver implement full dram init and without DM support due to the limit of internal SRAM size. For SPL and U-Boot proper, it's a simple driver with dm for get dram_info like other SoCs. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add common msch reg definitionKever Yang
The noc register bit definition may be the same for different SoC while the offset of the register may be different, add the struction definition as common code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add phy driver code for PX30Kever Yang
This sdram_phy_px30.c is based on PX30 SoC, the functions are common for phy, other SoCs with similar hardware could re-use it. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add controller code for PX30Kever Yang
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common for controller, other SoCs with similar hardware could re-use it. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: Default enable DRAM debug infoKever Yang
The debug info for dram is main about the capacity related info which is very important the board init, so set this default enable. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: move sdram_debug function into sdram_commonKever Yang
The functions for dram info print are part of common code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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