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2020-01-20configs: j721e_evm_a72: Add Support for GPT partitionsFaiz Abbas
Introduce a default GPT partition table for eMMC. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20configs: j721e_evm: Add configs for ADMA SupportFaiz Abbas
Add configs for ADMA Support. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-j721e-common-proc-board: Add pinmux for SD cardFaiz Abbas
Add pinmux for sdhci1 node connected to the SD card. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-j721e-common-proc-board: Remove voltage-ranges from sdhci nodesFaiz Abbas
voltage-ranges properties are NOP. Remove them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20mmc: am654_sdhci: Add Support for configuring PHY in J721eFaiz Abbas
Add Support for writing to PHY registers for J721e. There are number of differences between the J721e 8 bit PHY, J721e 4 bit PHY and AM654 PHY. Create a driver_data structure with an ops and flags field and use the flags field to indicate these differences. The differences are as follows: 1. The J721e 4 bit instance PHY does not have a DLL. Introduce a DLL_PRESENT flag to make sure that DLL related registers are accessed only where they are present. Also add a separate set_ios_post() callback. 2. The J721e 8 bit instance is not muxed with anything else inside the SoC and hence the IOMUX_ENABLE filed does not exist. Add a flag which is used to indicate the presence of this field. 3. The register field used to select DLL frequency is 3 bit wide in J721e as compared to 2 bits in AM65x. Add another flag that distinguishes these fields. 4. The strobe select field is 8 bit wide as compared to 4 bit wide for AM65x. Add yet another flag to indicate this difference. Strobe select is used only for HS400 speed mode, support for which has not been added in AM65x. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20mmc: am654_sdhci: Get Xin clock by nameFaiz Abbas
Get clk_xin by name instead of by index to avoid having to put clocks in the same order in all devices. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20dma: ti: k3-udma: Fix build warnings when building for 32 bit platformsVignesh Raghavendra
Cast pointers properly so as to avoid warnings when driver is built for 32 bit platforms Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20dma: ti: k3-udma: Fix ring push operation for 32 bit coresVignesh Raghavendra
UDMA always expects 64 bit address pointer of the transfer descriptor in the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size. Therefore copy over 32 bit pointer value to 64 bit variable before pushing it over to the ring, so that upper 32 bits are 0s. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20dma: ti: k3-udma: Switch to exposed ring modeVignesh Raghavendra
Exposed ring mode works well with 32 bit and 64 bit cores without need for Proxies for 32 bit cores. Therefore switch to exposed ring mode. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20dma: ti: k3-udma: Fix debug prints during enabling MEM_TO_DEV transfersVignesh Raghavendra
Fix up the debug prints that were dumping state of TCHAN RT registers to use tchan for MEM_TO_DEV transfers. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20dma: ti: k3-udma: Remove coherency check for cache opsVignesh Raghavendra
Remove redundant coherency checks before calling cache ops in UDMA driver. This is now handled in arch specific cache operation implementation based on Kconfig option Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20soc: ti: k3-navss-ringacc: Get SYSFW reference from DT phandleVignesh Raghavendra
Instead of looking getting reference to SYSFW device using name which is not guaranteed to be constant, use phandle supplied in the DT node to get reference to SYSFW Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/popVignesh Raghavendra
Flush caches when pushing an element to ring and invalidate caches when popping an element from ring in Exposed Ring mode. Otherwise DMA transfers don't work properly in R5 SPL (with caches enabled) where the core is not in coherency domain. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20dma: ti: k3-udma: Query DMA channels allocated from Resource ManagerVignesh Raghavendra
On K3 SoCs, DMA channels are shared across multiple entities, therefore U-Boot DMA driver needs to query resource range from centralised resource management controller i.e SystemFirmware and use DMA channels allocated for A72 host. Add support for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20lib: Import few bitmap functions from LinuxVignesh Raghavendra
Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}()) and their dependencies from Linux. These are required for upcoming DMA resource allocation support for TI's K3 SoCs. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: am43xx: remove net platform codeGrygorii Strashko
The TI AM43xx platform has DM_ETH and OF_CONTROL enabled, so remove networking platform code. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: dra7-evm: remove net platform codeGrygorii Strashko
The DRA7 has DM_ETH and OF_CONTROL enabled, so remove networking platform code. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20ARM: dts: da850-lcdk: Update DTS files for SPL device tree supportAdam Ford
Currently, the da850-lcdk uses SPL_OF_PLATDATA and manually loads the necessary source code instead of using the auto-generated, because the drivers don't properly autogenerate the code. This patch simply enables the various device tree options to mimic the da850-evm which doesn't need or use OF_PLATDATA for device tree support. It does not disable OF_PLATDATA. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20thermal: ti-bandgap: Fix adc value datatypeFaiz Abbas
The CORE_TEMP_SENSOR_MPU register gives a raw adc value which needs to be indexed into a lookup table to get the actual temperature. Fix the naming and datatype of the adc value variable. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20configs: j721e_evm_a72_defconfig: Enable USB related configsVignesh Raghavendra
Enable USB host and device related configs. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: dts: k3-j721e: Add DT nodes for USBVignesh Raghavendra
J721e has two instances of Cadence USB3 controller. Add DT nodes for the same. USB0 is configured to device mode and USB1 is configured to host mode. For now only high speed mode is supported. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20environment: ti: Add DFU environment variables k3_dfu.hVignesh Raghavendra
Setup env variables for updating firmwares on eMMC/OSPI/MMC via DFU Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-17Merge branch '2020-01-17-improve-aes-support'Tom Rini
- Add support and tests for AES192 and AES256
2020-01-17u-boot: fit: add support to decrypt fit with aesPhilippe Reynes
This commit add to u-boot the support to decrypt fit image encrypted with aes. The FIT image contains the key name and the IV name. Then u-boot look for the key and IV in his device tree and decrypt images before moving to the next stage. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17mkimage: fit: add support to encrypt image with aesPhilippe Reynes
This commit add the support of encrypting image with aes in mkimage. To enable the ciphering, a node cipher with a reference to a key and IV (Initialization Vector) must be added to the its file. Then mkimage add the encrypted image to the FIT and add the key and IV to the u-boot device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17aes: add test unit for aes196 and aes256Philippe Reynes
This commit add test unit for aes196 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add test unit for aes128Philippe Reynes
This commit add test unit for aes128. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add support of aes192 and aes256Philippe Reynes
Until now, we only support aes128. This commit add the support of aes192 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add a define for the size of a blockPhilippe Reynes
In the code, we use the size of the key for the size of the block. It's true when the key is 128 bits, but it become false for key of 192 bits and 256 bits. So to prepare the support of aes192 and 256, we introduce a constant for the iaes block size. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-16Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
2020-01-16Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Clearfog: Fix SD booting (Baruch) - Misc updates to MMC handling in SPL to support booting from main data partition (vs hardware boot partition) on MVEBU (Baruch)
2020-01-16Merge tag 'xilinx-for-v2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.04 ARM64: - Add INIT_SPL_RELATIVE dependency SPL: - FIT image fix - Enable customization of bl2_plat_get_bl31_params() Pytest: - Add test for octal/hex conversions Microblaze: - Fix manual relocation for one SPI instance Nand: - Convert zynq/zynqmp drivers to DM Xilinx: - Enable boot script location via Kconfig - Support OF_SEPARATE in board FDT selection - Remove low level uart setup it is done later by code - Add support for DEVICE_TREE variable passing for SPL Zynq: - Enable jtag boot mode via distro boot - Removing unused baseaddresses from hardware.h - DT fixups ZynqMP: - Fix emmc boot sequence - Simplify spl logic around bss and board_init_r() - Support psu_post_config_data() calling - Tune mini-nand DTS - Fix psu wiring for a2197 boards - Add runtime MMC device boot order filling in spl - Clear ATF handoff handling with custom bl2_plat_get_bl31_params() - Add support u-boot.its generation - Use single image configuration for all platforms - Enable PANIC_HANG via Kconfig - DT fixups - Firmware fixes - Add support for zcu208 and zcu1285 Versal: - Fix emmc boot sequence - Enable board_late_init() by default
2020-01-16Merge branch '2020-01-15-master-imports'Tom Rini
- MediaTek improvements - Some generic clk improvements - A few assorted bugfixes
2020-01-16configs: mediatek: fix mt7623n bpir2 defconfigSam Shih
This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig to fix the mt7623 compile error after building others mediatek target platform Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16arm: dts: mediatek: move u-boot properties to -u-boot.dtsi fileSam Shih
This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16Add support for MT7622 reference boardSam Shih
This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-16mmc: add mmc and sd support for MT7622Sam Shih
This patch add mmc and sd support for Mediatek MT7622 SoCs Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16power: domain: add power domain support for MT7622Sam Shih
This patch add power domain support for Mediatek MT7622 SoCs Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16clk: mediatek: fix clock-rate overflow problemSam Shih
This patch fix clock-rate overflow problem in mediatek clock driver common part. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: mediatek: add driver for MT7622Sam Shih
This patch add clock driver for MediaTek MT7622 SoC. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16pinctrl: mediatek: add support for different pinctrlSam Shih
Due to the pinctrl hardware of MT7622 is difference from others SoC which using the common part of mediatek pinctrl. So we need to modify the common part of mediatek pinctrl. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT7622Sam Shih
This patch add Pinctrl driver for MediaTek MT7622 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16ARM: MediaTek: Add support for MediaTek MT7622 SoCSam Shih
Add support for MediaTek MT7622 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16phy: phy-mtk-tphy: make ref clock optionalChunfeng Yun
If make the ref clock optional, no need refer to fixed-clock when the ref clock is always on or comes from oscillator directly. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16phy: phy-mtk-tphy: remove the check of -ENOSYSChunfeng Yun
No need check -ENOSYS anymore after add dummy_enable() for fixed-clock. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: fixed_rate: add dummy enable() functionChunfeng Yun
This is used to avoid clk_enable() return -ENOSYS. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: add APIs to get (optional) clock by name without a deviceChunfeng Yun
Sometimes we may need get (optional) clock without a device, that means use ofnode. e.g. when the phy node has subnode, and there is no device created for subnode, in this case, we need these new APIs to get subnode's clock. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: check valid clock by clk_valid()Chunfeng Yun
Add valid check for clk->dev, it's useful when get optional clock even when the clk point is valid, but its dev will be NULL. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: fix error check for devm_clk_get_optional()Chunfeng Yun
If skip all return error number, it may skip some real error cases, so only skip the error when the clock is not provided in DTS Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: mediatek: mt7629: add support for ssusbsysChunfeng Yun
The SSUSB IP's clocks come from ssusbsys module on mt7629, so add its driver Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
generated by cgit (git 2.34.1) at 2025-01-24 16:02:58 +0000