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2017-04-17armv8: LS1012ARDB: Add QSPI Secure Boot targetVinitha Pillai-B57223
Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: SECURE_BOOT: Enable chain of trust on LS1012A platformVinitha Pillai-B57223
Define bootscript and its header addresses for QSPI target Also add PPA header address in Kconfig Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: LS1046ARDB: Add QSPI Secure Boot targetVinitha Pillai-B57223
Add QSPI Secure Boot target. Also enable sec init. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: LS1046AQDS: Add NOR Secure Boot TargetSumit Garg
Add NOR secure boot target. Also enable sec init. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: SECURE_BOOT: Enable chain of trust on LS1046A platformVinitha Pillai-B57223
Define bootscript and its header addresses for QSPI target. Also define PPA header address to enable PPA validation. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-04-17armv8: LS1043ARDB: Enable PPA in Secure boot defconfigVinitha Pillai-B57223
Enable PPA in secure boot by defining FSL_LS_PPA macro in its defconfig file. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: fsl-layerscape: SECURE BOOT: Add header address of PPA in kconfigVinitha Pillai-B57223
The header address of PPA defined in Kconfig. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17powerpc: T1042RDB: SECURE BOOT: Remove CONFIG_CMD_BLOB from SPL compilationVINITHA PILLAI
BLOB feature is not required during SPL compilation. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: ls1046ardb: SPL size reductionSumit Garg
Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: ls1043ardb: SPL size reductionSumit Garg
Using changes in this patch we were able to reduce approx 10k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1043ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. 5. Remove I2C driver support from SPL in case of LS1043ARDB. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer
Depending on DDR configuration, gcc-6.x will show up unused-const- variable messages. Use __maybe_unused specifier for all dynamic_odt variable definitions to remove these warnings. Memory footprint will not increase as gcc will optimize out unused constants. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2017-04-14buildman: Translate more strings to latin-1Tom Rini
When writing out some of our results we may now have UTF-8 characters in there as well. Translate these to latin-1 and ignore any errors (as this is for diagnostic and given the githash anything else can be reconstructed by the user. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2017-04-14usb: return 0 from usb_stor_get_info even if removable mediaTroy Kisky
This fixes a regression caused by commit 07b2b78ce4bc8ae25e066c65245eaf58c0d9a67c dm: usb: Convert USB storage to use driver-model for block devs which caused part_init to be called when it was not previously. Without this patch, the following happens when a USB sd card reader is used. => usb start starting USB... USB0: Port not available. USB1: USB EHCI 1.00 scanning bus 1 for devices... 3 USB Device(s) found scanning usb for storage devices... Device NOT ready Request Sense returned 02 3A 00 ### ERROR ### Please RESET the board ### This happens because dev_desc->blksz is 0. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2017-04-14usb: dwc2: invalidate the dcache before starting the DMAEddie Cai
We should invalidate the dcache before starting the DMA. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Stefan BrĂ¼ns <stefan.bruens@rwth-aachen.de>
2017-04-14usb: dwc3: gadget: make cache-maintenance on event buffers more robustPhilipp Tomsich
Merely using dma_alloc_coherent does not ensure that there is no stale data left in the caches for the allocated DMA buffer (i.e. that the affected cacheline may still be dirty). The original code was doing the following (on AArch64, which translates a 'flush' into a 'clean + invalidate'): # during initialisation: 1. allocate buffers via memalign => buffers may still be modified (cached, dirty) # during interrupt processing 2. clean + invalidate buffers => may commit stale data from a modified cacheline 3. read from buffers This could lead to garbage info being written to buffers before reading them during even-processing. To make the event processing more robust, we use the following sequence for the cache-maintenance: # during initialisation: 1. allocate buffers via memalign 2. clean + invalidate buffers (we only need the 'invalidate' part, but dwc3_flush_cache() always performs a 'clean + invalidate') # during interrupt processing 3. read the buffers (we know these lines are not cached, due to the previous invalidation and no other code touching them in-between) 4. clean + invalidate buffers => writes back any modification we may have made during event processing and ensures that the lines are not in the cache the next time we enter interrupt processing Note that with the original sequence, we observe reproducible (depending on the cache state: i.e. running dhcp/usb start before will upset caches to get us around this) issues in the event processing (a fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the first time interrupt handling is invoked) when running USB mass storage emulation on our RK3399-Q7 with data-caches on. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-04-14usb: dwc3: ensure consistent types for dwc3_flush_cachePhilipp Tomsich
The dwc3_flush_cache() call was declared and used inconsistently: * The declaration assumed 'int' for addresses (a potential issue when running in a LP64 memory model). * The invocation cast the address to 'long'. This change ensures that both the declaration and usage of this function consistently uses 'uintptr_t' for correct behaviour even when the allocated buffers (to be flushed) reside outside of the lower 32bits of memory. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-04-14usb: gadget: g_dnl: don't set iProduct nor iSerialNumberFelipe Balbi
Both these numbers are calculated in runtime and dynamically assigned to the device descriptor during bind(). Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-14usb: gadget: g_dnl: only set iSerialNumber if we have a serial#Felipe Balbi
We don't want to claim that we support a serial number string and later return nothing. Because of that, if g_dnl_serial is an empty string, let's skip setting iSerialNumber to a valid number. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-14usb: gadget: g_dnl: hold maximum string descriptorFelipe Balbi
A USB String descriptor can be up to 255 characters long and it's not NULL terminated according to the USB spec. This means our MAX_STRING_SERIAL should be 256 (to cope with NULL terminator). Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-14video: Fix crash when scroll screeneric.gao@rock-chips.com
After enabling log printing to lcd, when the screen starts scrolling, system crashes. Log is shown as bellow: "Synchronous Abort" handler, esr 0x96000045 "Synchronous Abort" handler, esr 0x96000045 Checking the source code, we found that the variable "pixels" gets a wrong value: int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length; "pixels" here means the value of pixels for a character, rather than the bytes for a character. So the variable "pixels" is 4 times bigger than it's exact value, which will cause the memory overflow when the cpu runs the following code: for (i = 0; i < pixels; i++) *dst++ = clr; <<---- Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
2017-04-14at91: video: DT binding for HLCDC driverSongjun Wu
DT binding documentation for atmel HLCDC driver. Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini
2017-04-14at91: video: Support driver-model for the HLCD driverSongjun Wu
Add driver-model support to this driver. Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
2017-04-14usb: dwc2: add support for external vbus supplyKever Yang
Some board do not use the dwc2 internal VBUS_DRV signal, but use a gpio pin to enable the 5.0V VBUS power, add interface to enable the power in dwc2 driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-14arm: socfpga: sr1500 use environment in common headerDalon Westergreen
This removes the default environment from the sr1500 header and instead uses the common environment provided in socfpga_common.h which now uses distro boot. This board has no upstream devicetree in the kernel source, so set to socfpga_cyclone5_sr1500.dtb. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE - set devicetree name to match socfpga_{fpga model}_{board model}.dts pattern
2017-04-14arm: socfpga: Socrates use environment in common headerDalon Westergreen
This removes the default environment from the socrates headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
2017-04-14arm: socfpga: SoCKit use environment in common headerDalon Westergreen
This removes the default environment from the SoCKit headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
2017-04-14arm: socfpga: DE1 use environment in common headerDalon Westergreen
This removes the default environment from the de1 headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. This board does not have a devicetree in the upstream kernel source so set devicetree to socfpga_cyclone5_de1_soc.dtb. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in V2: - Remove unneeded CONFIG_BOOTFILE - set devicetree name to match socfpga_{fpga model}_{board model}.dts pattern
2017-04-14arm: socfpga: C5 SoCDK use environment in common headerDalon Westergreen
This removes the default environment from the C5 SoCDK headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. In addition to the above, add support to boot from the custom a2 type partition. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
2017-04-14arm: socfpga: A5 SoCDK use environment in common headerDalon Westergreen
This removes the default environment from the A5 socdk headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Add support to boot from the custom a2 type partition. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v3: - Fix small typo in defconfig, missing "C" Changes in v2: - Remove unneeded CONFIG_BOOTFILE - Fix dtb name a5config test Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2017-04-14arm: socfpga: DE0 use environment in common headerDalon Westergreen
This removes the default environment from the de0 headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. In addition to the above, add support to boot from the custom a2 type partition Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
2017-04-14arm: socfpga: Add distro boot to socfpga common headerDalon Westergreen
This adds a common environment and support for distro boot in the common socfpga header. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> -- Changes in v5: - Per Frank, to support OpenSuse the ENV must be after the GPT Changes in v4: - Move env back to being right after the MBR Changes in v3: - fix spacing between asterix - remove verify=n as a default setting Changes in v2: - Remove unneeded CONFIG_BOOTFILE and fdt_addr - cleanup spacing in MMC env size common Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2017-04-14arm: socfpga: Convert Altera DDR SDRAM driver to use KconfigLey Foon Tan
Convert Altera DDR SDRAM driver to use Kconfig method. Enable ALTERA_SDRAM by default if it is on Gen5 target. Arria 10 will have different driver. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-04-14fdt: Add compatible strings for Arria 10Ley Foon Tan
Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-04-14ARM: socfpga: Disable OC on MCVEVKMarek Vasut
Disable the OC test on MCVEVK as the old PHY version does not provide this information. This fixes the USB OTG operation. Signed-off-by: Marek Vasut <marex@denx.de>
2017-04-14ARM: socfpga: mcvevk: Add default dfu_alt_infoMarek Vasut
Add default DFU altinfo for eMMC. Signed-off-by: Marek Vasut <marex@denx.de>
2017-04-14ARM: socfpga: Reduce the DFU buffer sizeMarek Vasut
There is no point in having such gargantuan buffer, it only requires huge malloc area. Reduce the DFU buffer size. Signed-off-by: Marek Vasut <marex@denx.de>
2017-04-14ARM: socfpga: Rename MCVEVKMarek Vasut
The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
2017-04-14ARM: socfpga: boot0 hook: remove macro from boot0 header fileChee, Tien Fong
Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole header file") miss out cleaning macro in this header file, and this has broken implementation of a boot header capability in socfpga SPL. Remove the macro in this file, and recovering it back to proper functioning. Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole header file") Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
2017-04-14ARM: socfpga: cyclone5-socdk: Enable ports A & CGeorges Savoundararadj
With the port C enabled, we can read the GPI input state of: * the DIP switches (USER_DIPSW_HPS[3:0]/HPS_GPI[7:4]) * the push buttons (USER_PB_HPS[3:0]/HPS_GPI[11:8]) Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Signed-off by: Sid-Ali Teir <git.syedelec@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Marek Vasut <marex@denx.de>
2017-04-14ARM: socfpga: add fpga build and bsp handoff instructions to readmeStephen Arnold
This patch adds the steps to manually (re)build a Quartus FPGA project, generate the required BSP glue, and update u-boot handoff files for mainline SPL support. Requires Quartus toolchain and current U-Boot. Signed-off-by: Steve Arnold <stephen.arnold42@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
2017-04-14board: toradex: colibri_vf: Add DCU support for Colibri VybridStefan Agner
The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines and clock control to enable the driver for Toradex Colibri Vybrid module. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-04-14video: fsl_dcu_fb: add additional modes for DCUStefan Agner
Add common widescreen modes 800x480 and 1024x600. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
2017-04-14video: fsl_dcu_fb: Fix DCU_MODE_BLEND_ITER settingStefan Agner
DCU_LAYER_MAX_NUM is currently used for DCU_MODE_BLEND_ITER and it actually overflows the maximum value of BLEND_ITER for Vybrid and LS102XA. Fix this by using a default value of 2. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2017-04-14video: fsl_dcu_fb: Enable pixel clock after initializationStefan Agner
When enabling the DCU and pixel clock, the test mode is activated since this is the reset configuration. The test mode immediately shows a red screen on a LCD. A moment later, the DCU gets initialized properly. This patch enables the pixel clock after initialization of the DCU control register. This avoids this initial flicker on LCD screens. While at it change the polarity of pixel clock to display samples data on the rising edge. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>
2017-04-14video: fsl_dcu_fb: fix framebuffer to the end of memoryStefan Agner
Fix the framebuffer location to the very end of the available memory. This allows to remove the area from available memory for the kernel, which in turn allows to display the splash screen through the Linux kernel boot process. Ideas has been taken from the sunxi display driver, e.g. 20779ec3a5 ("sunxi: video: Dynamically reserve framebuffer memory") Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2017-04-14Convert CONFIG_FSL_DCU_FB to KconfigSanchayan Maity
Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB and convert it to Kconfig. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Alison Wang <alison.wang@nxp.com>