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2018-05-14phy: marvell: a3700: Don't create functional macro for each registerMarek Behún
Currently there is for each register special functional macro, ie: LANE_CFG1_ADDR(u) GLOB_CLK_SRC_LO_ADDR(u) ... where can be either PCIE or USB3. Change this to one function PHY_ADDR(unit, addr). The code becomes: phy_addr(PCIE, LANE_CFG1) phy_addr(PCIE, GLOB_CLK_SRC_LO) ... Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14phy: marvell: a3700: Use reg_set16 instead of phy_write16Marek Behún
The macro phy_write16 is not used by the rest of the code, phy_read16 is not used at all. We also change the macro SGMIIPHY_ADDR to a static inline function. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14phy: marvell: a3700: Change return type of macro MVEBU_REGMarek Behún
All the calls to reg_set and friends have to cast the first argument to void __iomem *. Lets change the return type of the MVEBU_REG macro instead. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-13mmc: Improve tinificationMarek Vasut
Drop all the extra content from the MMC core, so that tiny MMC support is really tiny, no fancy anything. That means the tiny MMC support does only 1-bit transfers at default speed settings. Moreover, this patch drops duplicate instance of struct mmc mmc_static, which wasted about 360 bytes. Furthermore, since MMC tiny supports only one controller at all times, get rid of mallocating the ext csd backup and replace it with static array. All in all, this patch saves ~4 kiB of bloat from the MMC core, which on platforms with severe limitations can be beneficial. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> [trini: Fixup checkpatch.pl style warnings] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-11Merge git://git.denx.de/u-boot-tegraTom Rini
2018-05-11SPDX: Correct SPDX tags from recent xilinx mergeTom Rini
Correct the SPDX tag format. Fixes: 3b52847a451a ("Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze") Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-11Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblazeTom Rini
Xilinx changes for v2018.07 microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup
2018-05-11Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-05-11arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 boardSiva Durga Prasad Paladugu
This patch enables UHS support for ZynqMP zcu102 rev 1.0 board. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: zynq_sdhci: Add support for SD3.0Siva Durga Prasad Paladugu
This patch adds support of SD3.0 for ZynqMP. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Read capabilities register1 and update host capsSiva Durga Prasad Paladugu
This patch reads the capabilities register1 and update the host caps accordingly for mmc layer usage. This patch mainly reads for UHS capabilities inorder to support SD3.0. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Invoke platform specific tuning and delay routinesSiva Durga Prasad Paladugu
This patch adds support to invoke any platform specific tuning and delay routines if available. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11sdhci: Add new sdhci ops for platform specific tuning and delaysSiva Durga Prasad Paladugu
This patch adds new hooks for any platform specific tuning and tap delays programing. These are needed for supporting SD3.0. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Handle execute tuning command in sdhci_send_commandSiva Durga Prasad Paladugu
This patch upadted sdhci_send_command to handle execute tuning command. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Add support for disabling clockSiva Durga Prasad Paladugu
This patch adds support to disable clock if clk_disable was set and then enable or set clock if the clock was changed or clock was disabled when clock needs to be enabled. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: Changed the datatype of the variable to handle 64-bit archVipul Kumar
This patch changed the datatype of variable "start" from uint to ulong to work properly on 64-bit machines as well. Also the return type of get_timer() function is ulong. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynqmp: Add ZynqMP minimal R5 supportMichal Simek
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Add bif supportAlexander Graf
The officially described way to generate boot.bin files for ZynqMP is to describe the contents of the target binary using a file of the "bif" format. This file then links to other files that all get packed into a bootable image. This patch adds support to read such a .bif file and generate a respective ZynqMP boot.bin file that can include the normal image and pmu files, but also supports image partitions now. This makes it a handy replacement for the proprietary "bootgen" utility that is currently used to generate boot.bin files with FSBL. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11MAINTAINERS: Declare tools/zynqmp* as Xilinx maintainedAlexander Graf
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by Xilinx for the Zynq platforms. Let's match them accordingly in the MAINTAINERS file. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Move defines to headerAlexander Graf
We will add support for ZynqMP bif input files later, so let's move all structure definitions into a header file that can be used by that one as well. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Add partition read supportAlexander Graf
The zynqmp image format has support for inline partitions which are used by FSBL to describe payloads that are loaded by FSBL itself. While we can't create images that contain partitions (yet), we should still at least be able to examine them and show the user what's inside when we analyze an image created by bootgen. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Show model information instead of custom IDENT_STRINGMichal Simek
DISPLAY_BOARDINFO in OF case show model identification string from DT. Enable this feature instead of custom IDENT_STRING which does the same thing. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11arm64: zynqmp: Simplify boot_target variable compositionMichal Simek
Call calloc for space allocation only at one location and include if/else to sprintf. This will simplify run time device adding based on id aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11arm64: zynqmp: Setup MMU map for DDR at run timeNitin Jain
This patch fills the MMU map for DDR at run time based on information read from Device Tree or automatically detected from static configuration. The patch is needed because for systems which has for example 1GB of memory but MMU map is 2GB there could be spurious accesses which was seen in past when mapping is not fitting with actual memory installed. Signed-off-by: Nitin Jain <nitin.jain@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Enable cadence WDT for zcu100Michal Simek
Enable watchdog on zcu100 to make sure if there is a bug in the u-boot there is proper reset. Watchdog expires and PMU fw is informed and based on setting proper action is taken. The patch is enabling reset-on-timeout feature and also fixing fixed clock rate for watchdog where 100MHz is max (and also default) clock value. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Wire watchdog internalsMichal Simek
Enable watchdog in full U-Boot. Similar changes were done by: "arm: zynq: Wire watchdog internals" (sha1: e6cc3b25d721c3001019f8b44bfaae2a57255162) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11watchdog: cadence: Show used timeout valueMichal Simek
Debug message was showing timeout value which was passed to start function but there is a checking if this value can be setup. The patch is moving this debug printf function below checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Reset FPD Watchdog on zcu100Michal Simek
Low level configuration didn't reset FPD Watchdog that's why accessing it caused u-boot hang. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11nand: zynq: Send address cycles as per onfi parameter pageSiva Durga Prasad Paladugu
Send address cycles as per value read from onfi parameter page for Read and write commands instead of using a hard coded value. This may vary for different parts and hence use it from onfi parameter page value. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11nand: zynq: Add support for 16-bit buswidthSiva Durga Prasad Paladugu
This patch adds support for 16-bit buswidth by determining the bus width based on mio configuration. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11MAINTAINERS: zynqmp: Point to proper zynqmp folderMichal Simek
Point to Zynqmp arm64 cpu folder not to Zynq arm32. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11serial: zynq: Remove header depedency on arm header structureMichal Simek
There is no need to have arm hardware header in this driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11timer: Add Cadence TTC timer counter supportMichal Simek
This driver was tested on Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11microblaze: Dont enable UBI support by defaultSiva Durga Prasad Paladugu
This patch removes UBI support from defconfig and it can be enabled from menuconfig as per need. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Add new defconfig for zc1275 revBSiva Durga Prasad Paladugu
This patch enables support zc1275 revB board. It has SD added compared to revA. The same configuration will work for RevC boards aswell. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSIMichal Simek
In v2018 the patch "dm: ahci: Correct uclass private data" (sha1: bfc1c6b4838501d10aa48c0e92eaf70976f4b2dd) was causing an issue for ceva_sata. But this issue is not in v2018.05-rc1 but still converting to UCLASS_AHCI would make more sense. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Remove checkboard and enable DISPLAY_CPUINFOMichal Simek
Now that showing silicon version is part of the CPU info display, let's remove checkboard(). Note that the generic show_board_info() will still show the DT 'model' property. For instance: U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200) CPU: Zynq 7z045 Silicon: v1.0 Model: Zynq ZC706 Development Board I2C: ready Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>, and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> mini configuration doesn't need to show this information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Rework FPGA initializationMichal Simek
This commit moves the FPGA descriptor definition to mach-zynq, where it makes more sense. Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar> and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Enable debug_uart_init in spl when enabledMichal Simek
In past this code was commented and was used for debug purpose. But there is no reason not to enabled it based on macros. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-10Merge git://git.denx.de/u-boot-socfpgaTom Rini
2018-05-10SPDX: Convert a few files that were missed beforeTom Rini
As part of the main conversion a few files were missed. These files had additional whitespace after the '*' and before the SPDX tag and my previous regex was too strict. This time I did a grep for all SPDX tags and then filtered out anything that matched the correct styles. Fixes: 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style") Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10tools/file2include: avoid incorrect commentsHeinrich Schuchardt
Avoid creating incorrect comments like /* ...*/... */ by printing '.' instead of '*' inside comments. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10include: update log2 header from the Linux kernelHeinrich Schuchardt
Without the patch gcc 8 produces: warning: ignoring attribute ‘noreturn’ because it conflicts with attribute ‘const’ [-Wattributes] int ____ilog2_NaN(void); So let's update the include from Linux kernel v4.16. This removes static checks of ilog2() arguments. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10xyz-modem: va_start() must be matched by va_end()Heinrich Schuchardt
Every va_start() call must be matched by a va_end() call. scripts/checkpatch.pl required reformatting the complete function zm_dprintf(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10tools/file2include: create Linux style SPDX headerHeinrich Schuchardt
file2include is used to convert a binary file to a C include. With the patch the SPDX header is written to the first line as expected by scripts/checkpatch.pl. Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-10bootm: fix 'memory-fixup' for vxWorks bootHannes Schmelzer
The check for having a memory node within the fdt blob is made wrong, we fix this here. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-10Fix Ymodem build when DEBUG and CONFIG_USE_TINY_PRINTF are selectedAlex Kiernan
Attempting to build with both DEBUG and CONFIG_USE_TINY_PRINTF along with CONFIG_SPL_YMODEM_SUPPORT fails at link time: common/built-in.o: In function `zm_dprintf': common/xyzModem.c:190: undefined reference to `vsprintf' Disable Ymodem debug if we don't have full vsprintf support. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-10board/freescale: Remove invalid fsl email addressesFabio Estevam
These fsl email addresses are no longer valid and they do not have a correspondent nxp.com entry. Remove all invalid fsl email addresses and mark the boards as orphan. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-10p1022ds: Change Timur's email addressFabio Estevam
timur@freescale.com is not a valid email for quite some time, so change it to Timur's updated email. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Timur Tabi <timur@tabi.org>
2018-05-10bootcount: display5: config: Enable boot count feature in the display5 boardLukasz Majewski
The boot count is enabled in both SPL and proper u-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
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