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Since we use CONFIG_SKIP_LOWLEVEL_INIT for Exynos baords, we dont need to a
lowlevel_init.S file.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Typecast the argument with unsigned long long
for proper calculation of lldiv
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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SPL is using ps7_init.c/h files which are generated
from design tools which have to be copied to
boards/xilinx/zynq folder before compilation.
BSS section is moved to SDRAM because fat support
requires more space than SRAM size.
Added:
- MMC and QSPI support
- Boot OS directly from SPL
- Enable SPL command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
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ARM has specific clk entries which should be also setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable and implement dump clock command which shows
soc frequencies.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hard coded frequencies and use Zynq's clock framework to obtain
the UART clock frequency.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hard coded clock divider setting and use the Zynq clock framework
to dynamically calculate appropriate dividers at run time.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The GEM driver should not need to know about Zynq specific details of
RCLK related registers and bitfields in the SLCR. Move those details to
the slcr driver.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Cortex-A9 MPCore TRM' from ARM (ARM DDI 0407G ID072711) describes
in the section 4.1.1 how this value calculation should be done.
This patch fixes the problem if network activity such as ping or
tftp is attempted after u-boot has been idle for an hour,
it hangs, and cannot control-C out of it.
Signed-off-by: Uday Hegde <udayh@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hardcoded frequencies in favor of Zynq clock framework.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Provide the DIV_ROUND_CLOSEST macro - taken from the Linux kernel - in
common.h
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Define both serial uarts in the driver and return
default uart based on board configuration.
- Move baseaddresses to hardware.h
- Define default baudrate and clock values
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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These numbers will be reused by SPL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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board_eth_init can be also called in cases where CMD_NET
is not enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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For saving content of memory via tftp to file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Extend max kernel image size. Gunzip is checking
this value. If kernel is larger, message below is shown.
Uncompressing Kernel Image ... Error: inflate() returned -5
GUNZIP: uncompress, out-of-mem or overwrite error -
must RESET board to recover
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Zynq common configuration is placed in zynq-common.h
not zynq_common.h.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable dcache.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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icache is already enabled by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Typo: The correct value is 1 not 2.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Cc: Valentin Longchamp <valenting.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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Add set_fdthigh subcommand to "subbootcmds" (release) so to set "fdt_high"
This is necessary on Kirkwood so that the FDT does not get relocated
above the memory limit that the kernel cannot access
(that is the memory part reserved for the switch).
This was tested on NUSA1, where it is necessary, and on ETER1, where it
doesn't seem to hurt.
We want the scripts to also work with older versions of u-boot, where:
a) set_fdthigh is not defined (will be default env for newer u-boots)
b) the fdt will not be available
For this reason, we use "set_fdthigh" to tell whether we are running
a newer (FDT-aware) u-boot or not.
So if "set_fdthigh" runs successfully or arch != arm we try loading
the fdt; otherwise we proceed normally.
Notice how, contrary to release mode, set_fdthigh will _not_ be part of
subbootcmds for develop and ramfs, but will be executed as part of
"tftpfdt".
Since this is only needed for kirkwood cards, and it prevents the kernel
from booting on QorIQ (though it seemed to work on ETER1), we change
its definition in the default env for powerpc so that the value is only
set on ARM.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This consists of:
a) Defining the addresses, enabling fdtsupport [arm]
b) Defining "cramfsloadfdt" [arm,powerpc => common]
c) Adding the FDT address to bootm [arm,powerpc => common]
d) Defining "tftpfdt" in ramfs-,develop- [arm,powerpc >= common]
This should work with 3.10 kernels, whether loaded through TFTP
(with rootfs either through NFS or TFTP-ramfs) or from the NAND.
The machid was left unchanged, this should keep compatibility with both
older and newer kernels.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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miiphy_read and miiphy_write are returning 0 on success.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This is needed for board specific additional environment variables.
E.g. the mgcoge3un has this additional "waitforne" variable.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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We now use 256MB RAM instead of 128MB. We can use the same config file
as kmnusa.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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CONFIG_BOOTCOUNT_LIMIT is used on all boards from this board series. So
remove this unneeded define.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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This patch is here because of:
"arm: keep all sections in ELF file"
(sha1: 47ed5dd031d7d2c587e6afd386e79ccec1a1b7f7)
Our tools expect to have elf with only LOAD header.
Without this fix also PHDR, INTERP and DYNAMIC headers
are available in ELF.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The reason is enabling tftpput command where
tftp shorcut stops to work for tftpboot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: David Feng <fenghua@phytium.com.cn>
Acked-by: Scott Wood <scottwood@freescale.com>
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The entries in config.mk were needed so that U-Boot could be built
with an old version of the Raspberry Pi Foundation's toolchain. Without
them, the build would error out with:
...-ld: error: .../libgcc.a(_bswapsi2.o) uses VFP register arguments,
u-boot does not
However, none of the 3 toolchains in the latest version of their
tools.git, nor the Ubuntu/Linaro ARM compilers in at least Ubuntu Quantal
or Saucy, need these options set in order to compile a working U-Boot.
Hence, remove the options for simplicity.
Reported-by: Tom Rini <trini@ti.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
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U-Boot names the Raspberry Pi board rpi_b. This means that the common
expression for DTB filename ${soc}-${board}.dtb expands to
bcm2835-rpi_b.dtb. However, the DTB generated by the Linux kernel is
bcm2835-rpi-b.dtb. Set $fdtfile in U-Boot's environment so that scripts
look for the correct DTB filename.
An alternative would be to rename the U-Boot board to rpi-b. However,
that change would be far more invasive, and end up affecting users (i.e
they'd have to change their U-Boot build commands).
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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The prescaler value for MDC is calculated wrong for
MX6S. Implement the same logic as linux here which handles
ENET_MAC different then original FEC.
Tested on a custom board with i.MX6S and 100MBit PHY
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
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imx_get_fecclk() returns enet_ref instead of ipg.
Since the clock is used to calculate the prescaler
for the MDIO interface wrong values can be calculated.
Tested on a custom MX6S board with 100MBit interface
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
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Add a callback so that a board can implement it's own specific routine to
toggle the port's #PERST line or #define a GPIO to do so.
Signed-off-by: Marek Vasut <marex@denx.de>
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Add L2 cache support and enable it by default.
Configure the L2 cache in the same way as done by FSL kernel:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Use the latest DDR and clock settings as the one from Freescale BSP.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
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Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header
files, introduce a common header to centralize such definitions.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Boot ROM may mask MMDC_CHx_MASK in CCM_CCDR(such as i.MX6SL TO1.2),
it will cause warm reset fail, need to clear this MMDC_CHx_MASK field
to make sure all the i.MX6 series SOCs reset function work. Otherwise,
uboot "reset" command will fail, tested on i.MX6SL EVK board with TO1.2.
Signed-off-by: Anson Huang <b20788@freescale.com>
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For low freq boot mode(ARM boot up with 396MHz), ROM
will not set AHB clock to 132MHz, and the reset value of
AHB divider is incorrect which will lead to wrong AHB
rate, need to correct it. To enable low freq boot mode,
need to set BOOT_CFG2[2] to high, tested on i.MX6Q/DL
SabreSD board and i.MX6SL EVK board.
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
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