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2016-12-06qts-filter.sh: strip DOS line endings and handle continuation linesBill Randle
Some Altera Quartus generated files have long lines that are split with a '\' at the end of the line. It also wOn Windows, rites files in DOS format, which can confuse some of the processing scripts in this file. This patch solves both issues. Signed-off-by: Bill Randle <bill.randle@gmail.com> Cc: Marek Vasut <marex@denx.de>
2016-12-06ARM: socfpga: Add boot0 hook to prevent SPL corruptionMarek Vasut
Valid Altera SoCFPGA preloader image must contain special data at offsets 0x40, 0x44, 0x48 and valid instructions at address 0x4c or 0x50. These addresses are by default used by U-Boot's vector table and a piece of reset handler, thus a valid preloader corrupts those addresses slightly. While this works most of the time, this can and does prevent the board from rebooting sometimes and triggering this issue may even depend on compiler. The problem is that when SoCFPGA performs warm reset, it checks the addresses 0x40..0x4b in SRAM for a valid preloader signature and header checksum. If those are found, it jumps to address 0x4c or 0x50 (this is unclear). These addresses are populated by the first few instructions of arch/arm/cpu/armv7/start.S: ffff0040 <data_abort>: ffff0040: ebfffffe bl ffff0040 <data_abort> ffff0044 <reset>: ffff0044: ea000012 b ffff0094 <save_boot_params> ffff0048 <save_boot_params_ret>: ffff0048: e10f0000 mrs r0, CPSR ffff004c: e200101f and r1, r0, #31 ffff0050: e331001a teq r1, #26 Without this patch, the CPU will enter the code at 0xffff004c or 0xffff0050 , at which point the value of r0 and r1 registers is undefined. Moreover, jumping directly to the preloader entry point at address 0xffff0000 will also fail, because address 0xffff004. is invalid and contains the preloader magic. Add BOOT0 hook which reserves the area at offset 0x40..0x5f and populates offset 0x50 with jump to the entry point. This way, the preloader signature is stored in reserved space and can not corrupt the SPL code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Stefan Roese <sr@denx.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-12-06socfpga: add support for Terasic DE1-SoC boardAnatolij Gustschin
Add CycloneV based Terasic DE1-SoC board. The board boots from SD/MMC. Ethernet and USB host is supported. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Marek Vasut <marex@denx.de>
2016-12-05Prepare v2017.01-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-12-05Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-12-05armv8: QSPI: Add AHB bus 16MB+ size supportYuan Yao
The default configuration for QSPI AHB bus can't support 16MB+. But some flash on NXP layerscape board are more than 16MB. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05fsl/usb: enable the errata-a005697 for ls1012ajerry.huang@nxp.com
Enable the errata-a005697 for ls1012a Signed-off-by: Changming Huang <jerry.huang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05ls1021a: QSPI: update the node for QSPI supportYuan Yao
Add the name for register space and memory space. <0x1550000 0x10000 > is the QSPI register space. <0x40000000 0x4000000> is the QSPI memory space. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05armv8: ls2080a: Add serdes1 protocol 0x3b supportPriyanka Jain
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05fsl/ddr: Fix compiling warningShengzhou Liu
Fix following warning in case multiple erratum macro was not defined. warning: unused variable 'tmp' warning: unused variable 'ddr_freq' Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05travis-ci: Build mvebu boards (arm & aarch64) in separate jobStefan Roese
Its easier to watch the output of the build process when the platforms specific boards are grouped in a separate job. This patch adds a job for all mvebu boards (arm and aarch64). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-05davinci: omapl138_lcdk: increase PLL0 frequencyBartosz Golaszewski
The LCDC controller on the lcdk board has high memory throughput requirements. Even with the kernel-side tweaks to master peripheral and peripheral bus burst priorities, the default PLL0 frquency of 300 MHz is not enough to service the LCD controller and causes DMA FIFO underflows. Increment the PLL0 multiplier to 37, resulting in PLL0 frequency of 456 MHz - the same value that downstream reference u-boot from Texas Instruments uses. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-05arm: baltos: enable booting from USBYegor Yefremov
First of all U-Boot would search for a USB mass storage device with either uEnv.txt or kernel-fit.itb and boot. If USB mass storage device is not available or doesn't provide these files then MMC will be tried. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-05arm: baltos: active mPCIe slotYegor Yefremov
Baltos devices provide a mPCIe slot, whose power is turned off by default. This patch activates mPCIe slot in U-Boot, so that for example GSM modem can be already available in user space. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-05arm: baltos: remove TI board leftoverYegor Yefremov
Remove unneeded pinmux configurations and TI EEPROM struct. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-05ARM: DRA7: AMxx: Make sure that the SPL always reads the configuration EEPROMJean-Jacques Hiblot
The bootrom may corrupt the area of SRAM used to store the ti_common_eeprom structure. This patch makes sure that it's always read after a reset, even if a valid MAGIC number is found in the SRAM. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-05dm: spl: mmc: Fix EXT SPL supportMichal Simek
The patch "dm: spl: mmc: Support CONFIG_BLK in SPL MMC" (sha1: 87bce4e5c0b55452d70830928b2d7b98fa24d4e3) converted FAT part of spl_mmc_do_fs_boot() but forget to update also EXT part by 's/&mmc->block_dev/mmc_get_blk_desc(mmc)/'. This patch is fixing compilation error when CONFIG_SPL_EXT_SUPPORT is enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-12-05Merge git://www.denx.de/git/u-boot-i2cTom Rini
2016-12-05sata: sata_mv: Fix misaligned cache warningsStefan Roese
This patch fixes the warnings about misaligned cache on Armada XP: CACHE: Misaligned operation at range [7facb400, 7facb460] Signed-off-by: Stefan Roese <sr@denx.de>
2016-12-05arm64: mvebu: Restrict memory size to a usable maximumStefan Roese
Not all memory is mapped in the MMU. So we need to restrict the memory size so that U-Boot does not try to access it. Also, the internal registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB are mapped for system memory. This is what we pass to the U-Boot subsystem here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add PCI support to DB-88F8040 boardStefan Roese
This patch adds PCI support to the Marvell Armada-8K devel board. Additionally the Intel E1000 ethernet driver is enabled so that network support is available on this board, even without the internal network interfaces being supported (yet). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add regions for PCI spaces to the memory mapStefan Roese
To use the PCIe driver, its controller memory and the PCIe regions need to get mapped in the MMU. Otherwise these areas can't be accessed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05pci: mvebu: Add PCIe driver for Armada-8KShadi Ammouri
This patch adds a driver for the PCIe controller integrated in the Marvell Armada-8K SoC. This controller is based on the DesignWare IP core. The original version was written by Shadi and Yehuda. I ported this driver to the latest mainline U-Boot version with DM support. Tested on the Marvell DB-88F8040 Armada-8K eval board. Signed-off-by: Shadi Ammouri <shadi@marvell.com> Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05drivers/phy: marvell: Add support for the slave CP COMPHY deviceStefan Roese
With the support for the Armada 8k, a 2nd COMPHY controller now needs to get supported from the CP110 slave controller. This patch adds support for this 2nd contoller in the COMPHY driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Init COMPHY from the slave-CP on the A8kStefan Roese
The Armada8k implements 2 CPs (communication processors) and the 2nd CP also is equipped with a COMPHY controller. This patch now loops over all enabled MISC devices (CP110) enabled in the DT to initialize all CPs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: armada-8040-db.dts: Add I2C and SPI aliasesStefan Roese
Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will not be able to use the SPI NOR chip for environment storage and use "i2c dev 0" to select this I2C bus. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: armada-8040-db.dts: Add COMPHY configurationStefan Roese
This patch adds the COMPHY device tree configuration to the DT file for the Marvell DB-88F8040 devel board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: armada-cp110-slave.dtsi: Add COMPHY / UTMI device tree nodesStefan Roese
This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave dtsi file for the Armada 8K. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: armada-cp110-master.dtsi: Rename comphy DT node namesStefan Roese
Since the cp110 slave also has comphy DT nodes, the names need to be renamed to avoid a name clash. Lets use the common naming scheme: "cpm_xxx" for master and "cps_xxx" for slave. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add support for the DB-88F8040 Armada 8k devel boardStefan Roese
This patch adds the necessary files to support the Marvell Armada 8k devel board. Most board specfic files are shared with the Armada 7k boards under the name "armada-8k*". So only minimal changes are necessary to add this basic board support (except the DT files of course). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add slave CP area to the memory mapStefan Roese
To enable access to the slave CP its memory needs to be added to the MMU memory map. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: armada-8k: Only configure xHCI power on DB-88F7040 boardStefan Roese
This patch uses of_machine_is_compatible() to detect the board at runtime and only configured the I2C IO expander for the xHCI power / reset on the DB-88F7040 board. As this code will be used by other Armada-7k/8k ports, its necessary to use this runtime detection here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Add Armada-80x0 dts/dtsi filesStefan Roese
Add the latest version of the DT files from the Linux kernel. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05arm64: mvebu: Rename db-88f7040 files to armada-8kStefan Roese
This moves some of the Armada DB-88F7040 board specific files to a more generic name: armada-8k. This is in preparation for the Armada-8k support which will be added soon. And since both platforms share most devices, lets also share most source files to not duplicate the code here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
2016-12-05dm: Add timeline and guide for porting I2C driversSimon Glass
Add a README with a brief guide to porting i2c drivers over to use driver model. Add a timeline also. All I2C drivers should be converted by the end of June 2017. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2016-12-05dm: i2c: Add a note to I2C drivers which need conversionSimon Glass
Maintainers need to be notified more directly of the need to convert these drivers. Add a note to the top each affected file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2016-12-05samsung: i2c: Split the high-speed I2C code into a new driverSimon Glass
Now that driver model is used for I2C on all boards, we can split the high-speed code into its own driver. There is virtually no common code, and this significantly reduces confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2016-12-05samsung: i2c: Drop old code from I2C driverSimon Glass
Now that all boards use DM_I2C we can drop the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2016-12-05arm: samsung: Convert s5p_goni and smdkc100 to DM_I2CSimon Glass
These are the last two samsung boards that don't use DM_I2C. Move them over, leaving #ifdefs to allow the maintainer to complete this work. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2016-12-05arm: exynos: i2c: Convert exynos boards to use DM_I2CSimon Glass
Three boards are still not converting to use DM_I2C. They are also using the old PMIC framework. Rather than removing them, add #ifdefs to allow them to continue to build. This will give the maintainers a little more time to decide whether to convert them or not. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2016-12-04Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2016-12-04defconfig: am43xx_evm: Enable DM_SPI and DM_SPI_FLASHVignesh R
Commit 4c4e3b37750f3("ARM: AM43xx: Enable FIT") accidentally disabled DM_SPI and DM_SPI_FLASH. Add back DM_SPI and DM_SPI_FLASH to am43xx_evm_defconfig in order to make use of DM framework for QSPI. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-12-04common: image: Remove FIT header update from image post-processingAndrew F. Davis
After an image is selected out of a FIT blob for further processing we run an optional, platform specific, post-processing function on this component. This post-processing may modify the position and size of the image, so after post-processing we update the location and size for this image in the FIT header. This can cause problems as the position of subsequent components in the FIT blob are only referenced by relative position to the end of the last component. When we resize or move a component the following components position will be calculated incorrectly. To fix this, we do not update the FIT header but instead only update our local understanding of the image data. This also allows us to re-run post-processing steps if needed. Signed-off-by: Andrew F. Davis <afd@ti.com> Tested-by: Carlos Hernandez <ceh@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-12-04usb: gadget: remove unused shortname variableAndre Przywara
The shortname variable isn't referenced anywhere in the code, so just remove it. Pointed out by a GCC 6.2 default warning option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2016-12-04davinci: da8xxevm: fix indentationAndre Przywara
Apparently the indentation is wrong in this case, as the second message should be printed indepdently of the if statement. Fix this indentation to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2016-12-04usb: eth: r8152_fw: fix indentationAndre Przywara
Apparently the indentation is wrong here, fix this to avoid compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-12-04marvell: comphy_a3700: fix bitmaskAndre Przywara
Obviously the mask for the rx and tx select field cannot be right, as it would overlap in one and exceed the 32-bit register in the other case. From looking at the neighbouring bits it looks like the mask should be really 4 bits wide instead of 8. Pointed out by a GCC 6.2 (default) warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2016-12-04net: rtl8169: remove unneeded definitionAndre Przywara
The rtl8169_intr_mask variable isn't used anywhere in the code, so just remove it to avoid a GCC 6.2 compiler warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-12-04net: e1000: fix indentationAndre Przywara
Apparently the indentation is off here, for the IGB model just want to bail out early. Fix this to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>