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2016-04-25i2c: designware_i2c: Add dw_i2c_enable() helper functionStefan Roese
dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes sense to add such a function, as the controller is dis-/en-abled multiple times in the code. Additionally, this function now checks, if the controller is really dis-/en-abled. This code is copied from the Linux I2C driver version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-04-25i2c: designware_i2c: Add ic_enable_status to ic_regs structStefan Roese
Add the ic_enable_status register to the i2c_regs struct. Additionally the register offsets are added, to better check, if the offset matches the register description in the datasheet. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
2016-04-25dm: core: Add dev_get_addr_ptr() to return a pointer to the reg addressStefan Roese
On some platforms (e.g. x86), the return value of dev_get_addr() can't be assigned to a pointer type variable directly. As there might be a difference between the size of fdt_addr_t and the pointer type. On x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So assigning the register base directly in dev_get_addr() results in this compilation warning: warning: cast to pointer from integer of different size This patch introduces the new function dev_get_addr_ptr() that returns a pointer to the 'reg' address that can be used by drivers in this case. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-04-24ARM: uniphier: speed up loading kernel image from NOR deviceMasahiro Yamada
Copy the kernel image double-word-wise rather than byte-wise. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24clk: uniphier: add Media I/O clock driver support for PH1-LD20Masahiro Yamada
PH1-LD20 needs this for its SD card controller. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: dts: uniphier: add SD controller node for PH1-LD20Masahiro Yamada
PH1-LD20 does not support 1.8V signaling for SD card; only Default Speed and High Speed (up to 50MHz) with 3.3V signaling is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: reserve the last 64 byte of SDRAMMasahiro Yamada
The last 64 byte of each DDR channel of PH1-LD20 is periodically used as a scratch area for the DDR PHY training. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: rework uniphier_set_fdt_file()Masahiro Yamada
The current table look-up for the DTB file name turned out bothersome in terms of maintainability; I ended up adding a new entry every time a new board is supported. There is a common pattern between the DT compatible string and the corresponding file name; drop the vendor prefix "socionext," and prefix it with "uniphier-" and suffix it with ".dtb". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: carry on booting for Unknown boot modeMasahiro Yamada
No need to stop booting U-Boot even if boot mode is unknown. Setting the "bootmode" environment is only useful for booting Linux Kernel. Anyway, U-Boot has already booted by this point. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: add sg_set_iectrl_range()Masahiro Yamada
For PH1-LD20 or later, per-pin input-enable control is supported, that is, we need to set-up IECTRL registers for a group of pins. This helper function will be useful for a bunch of register settings. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: dts: uniphier: move aliases node up to satisfy fdtgrepMasahiro Yamada
Currently, fdtgrep would not accept uniphier-ph1-ld20-ref.dtb and uniphier-ph1-ld11-ref.dtb unless the aliases node comes the first in the root node. $ make -s uniphier_pxs2_ld6b_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld20-ref [snip] LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT /aliases node must come before all other nodes Error: FDT_ERR_BADMAGIC make[1]: *** [spl/u-boot-spl.dtb] Error 1 make: *** [spl/u-boot-spl] Error 2 This commit moves the aliases node as the error message from the fdtgrep tool suggests, although this requirement does not sound reasonable to me. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: dts: uniphier: use Ref Daughter board on PH1-LD20 Ref boardMasahiro Yamada
This makes the EEPROM device on the Reference Daughter board available. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: avoid unaligned access to DT on 64bit SoCMasahiro Yamada
Because DT properties are 4-byte aligned, the pointer access *(fdt64_t *) in this code causes unaligned access. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24pinctrl: uniphier: fix NAND and SD pin-mux settings for PH1-LD11/LD20Masahiro Yamada
I found many mistakes in the initial version. Fixes: 8a3328c209d0 ("pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24pinctrl: uniphier: rename function/array namesMasahiro Yamada
Make function/array names match the file names for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-22Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini
2016-04-22ubifs: fix memory corruption in super.cHeiko Schocher
In list "super_blocks" ubifs collects allocated super_block structs. U-Boot frees on unmount the allocated struct, so the pointer stored in this list is free after the umount. On a new ubifs mount, the new allocated super_block struct get inserted into the super_blocks list ... which contains now a freed pointer, and the list_add_tail() corrupts the freed memory ... 2 solutions are possible: - remove the super_block from the super_blocks list on umount - as U-Boot does not use the super_blocks list ... remove it complete for U-Boot. Both solutions should not introduce problems for porting to newer linux version, so this patch removes the unused super_blocks list, as it saves code size and execution time. Signed-off-by: Heiko Schocher <hs@denx.de>
2016-04-22mtd, ubi: set free_count to zero before walking through erase listHeiko Schocher
Set free_count to zero before walking through ai->erase list in wl_init(). As U-Boot has no workqueue/threads, it immediately calls erase_worker(), which increase for each erased block free_count. Without this patch, free_count gets after this initialized to zero in wl_init(), so the free_count variable always has the maybe wrong value 0. Detected this behaviour on the dxr2 board, where the UBI fastmap gets not written when attaching/dettaching on an empty NAND. It drops instead the error message: could not find any anchor PEB With this patch, fastmap gets written on dettach. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-22x86: Correct typo of Miao Yan's email addressBin Meng
Miao Yan's email address is wrong in fw_cfg.c. Fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2016-04-22x86: qemu: Drop our own ACPI implementationBin Meng
Our own ACPI implementation (when CONFIG_QEMU_ACPI_TABLE is not set) does not build anymore after x86 has been fully converted to DM PCI. Instead of trying to fix the build errors, given we now have the ACPI support via QEMU's fw_cfg interface, which is a more reliable way to generate correct ACPI tables than by ourselves, hence drop our own ACPI implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-04-21arc/cache: really do flush_dcache_all() even if IOC existsAlexey Brodkin
flush_dcache_all() is used in the very end of U-Boot self relocation to write back all copied and then patched code and data to their new location in the very end of available memory space. Since that has nothing to do with IO (i.e. no external DMA happens here) IOC won't help here and we need to write back data cache contents manually. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-04-21Prepare v2016.05-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-20configs: Update some Xilinx configsTom Rini
As part of 3457bba these configs didn't get updated. Update them now. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-20cmd/usb_mass_storage.c: Rework ums_init() ret logic slightlyTom Rini
Previously, ret could be used uninitialized if blk_get_device_part_str() failed. Default to ret being set to -1 so that we always return an err up if we have a problem and then invert the logic on testing ums_count as when that is non-zero is the time we can return 0. Cc: John Tobias <john.tobias.ph@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-20Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
Conflicts: configs/bcm28155_ap_defconfig configs/dra72_evm_defconfig configs/dra74_evm_defconfig configs/ma5d4evk_defconfig Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-20Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-04-20usb: gadget Move: CONFIG_G_DNL_* to KconfigSam Protsenko
And also reformat defconfigs using "make savedefconfig" rule. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: dwc3: Move CONFIG_USB_DWC3_PHY_* to KconfigSam Protsenko
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: dwc3: Move CONFIG_USB_DWC3_OMAP to KconfigSam Protsenko
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: dwc3: Move CONFIG_USB_DWC3_GADGET/HOST to KconfigSam Protsenko
Description was borrowed from kernel dwc3 Kconfig. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: gadget: Move CONFIG_USB_GADGET_DOWNLOAD to KconfigSam Protsenko
While at it, remove obsolete CONFIG_USBDOWNLOAD_GADGET option from some config headers. This is also probably fixes am335x_baltos board. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: gadget: Move CONFIG_USB_GADGET_DUALSPEED to KconfigSam Protsenko
Move CONFIG_USB_GADGET_DUALSPEED option to Kconfig and make all UDC controllers select USB_GADGET_DUALSPEED: - add next options to Kconfig selecting USB_GADGET_DUALSPEED: - USB_GADGET_ATMEL_USBA - USB_GADGET_DWC2_OTG - USB_DWC3 - CI_UDC - make USB_MUSB_GADGET select USB_GADGET_DUALSPEED While at it, make some related fixes: - remove DUALSPEED from configs that don't enable gadget support: - kwb.h - tseries.h - add missing USB_GADGET option to next configs: - novena_defconfig - pcm051_rev*_defconfig - xfi3_defconfig Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: gadget: Move CONFIG_USB_GADGET_VBUS_DRAW to KconfigSam Protsenko
The description was borrowed from kernel. Definitions were added to defconfig files in a way that "make savedefconfig" generates exactly the same file as used defconfig. Boards using 0 mA as CONFIG_USB_GADGET_VBUS_DRAW value were moved to use 2 mA (as minimal allowed by Kconfig). Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-04-20usb: ums - expose selected partition/sJohn Tobias
By applying this patch, it will give us some flexibility to expose a selected partition/s. e.g: 1. To expose several partitions ums 0 mmc 0:1,0:6 2. To expose the all partitions ums 0 mmc 0:0 3. To expose multiple partititions on several devices ums 0 mmc 0:1,1:6 4. It support legacy format ums 0 mmc 0 Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
2016-04-20USB: g_dnl: Change device classJohn Tobias
The USB Mass Storage (ums) works in Windows, Linux and OS X (EL Capitan). But, not in OS X (Yosemite). By applying the said patch, it extends the ums support. Signed-off-by: John Tobias <john.tobias.ph@gmail.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid XU3 (./test/py UMS + DFU tests) Tested-by: John Tobias <john.tobias.ph@gmail.com> Linux: - Run ums to expose all my eMMC partition - shows all correctly - Run ums to expose only 1 partition of my eMMC - show correctly Windows: - Run ums to expose all my eMMC partition - it detects but it prompts, if I want to format it (due to a non windows partition) - Run ums to expose only the FAT32 partition - it show the partition correctly.
2016-04-20arm: socfpga: socrates: Add eth0 alias to enable ethernetStefan Roese
This enables full ethernet usage, including U-Boot to write the board specific MAC address (ethaddr) into the DT blob before passing it to Linux. Without this, the ethaddr is not detected in U-Boot at all, resulting in this error upon bootup: ... Model: EBV SOCrates Net: Error: ethernet@ff702000 address not set. No ethernet found. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20arm: socfpga: Fix typos in DT files (environmnet -> environment)Stefan Roese
Fix a small typo in some of the SoCFPGA dts files that has spread via copy-and-paste. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Repair DQ window centering codeMarek Vasut
The code uses a lot of signed numbers, which ended up in variables of unsigned type, which resulted in all sorts of underflows. This in turn caused incorrect calibration on certain boards. Moreover, repair the readout of the DQ delay, which was being pulled from wrong register. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Staticize global variablesMarek Vasut
Just staticize global variables in sequencer, since there is no point in having these symbols available outside of the DDR code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut
Originally, the DLEVEL selects the debug level within the sequencer code, but only displays the messages on that particular debug level. Tweak the handling such that for particular debug level, debug messages on that level and lower are displayed. This allows better regulation of debug message verbosity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut
This one last set of delay configuration registers was not properly zeroed out originally, fix it and zero them out. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Remove unnecessary ODT mode configMarek Vasut
There is no point in resetting the ODT setting if the write test failed, since the code will always retry the calibration and thus reconfigure the ODT anyway OR the code will fail calibration and halt. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Remove unnecessary update of the SCCMarek Vasut
Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is followed by SCC manager update. Moreover, only this function triggers the SCC manager update internally. Thus, remove the internal invocation to avoid triggering the update twice. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Fix DRAM end value in protection ruleMarek Vasut
The hi address bitfield in the protection rule must be set to the last address in the region which the rule represents. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut
The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Tweak DQS tracking enable handlingMarek Vasut
In the most unlikely case the DQS tracking was to be disabled, make sure we do not errornously re-enable it. Note that DQS tracking is enabled on all systems observed thus far. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-20ddr: altera: Replace ad-hoc constant with macroMarek Vasut
The bit 22 is in fact DQS tracking enable bit (dqstrken) and there is a macro for this bit already, so use it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-04-19Add initial support for Technexion's PICO-IMX6UL-EMMC boardFabio Estevam
Add support for Technexion's PICO-IMX6UL-EMMC board. For information about this board, please visit: http://www.technexion.com/products/pico/pico-som/pico-imx6-emmc Signed-off-by: Richard Hu <richard.hu@technexion.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-04-19MX6UL: Add definition for UART6 base addressFabio Estevam
Define the UART6_BASE_ADDR for MX6UL. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
generated by cgit (git 2.34.1) at 2024-12-29 10:54:26 +0000