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Padding verification was done against static SHA/RSA pair arrays which
take up a lot of static memory, are mostly 0xff, and cannot be reused
for additional SHA/RSA pairings. The padding can be easily computed
according to PKCS#1v2.1 as:
EM = 0x00 || 0x01 || PS || 0x00 || T
where PS is (emLen - tLen - 3) octets of 0xff and T is DER encoding
of the hash.
Store DER prefix in checksum_algo and create rsa_verify_padding
function to handle verification of a message for any SHA/RSA pairing.
Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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checksum_algo's pad_len field isn't actually used to store the length of
the padding but the total length of the RSA key (msg_len + pad_len)
Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories. All refernces to the former locations are updated to
the current locations. For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.
Signed-off-by: Tom Rini <trini@konsulko.com>
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To start consolidating various TI-related code, introduce the ARCH_OMAP2
symbol. While we have removed omap2-specific boards some time ago,
matching up with the kernel naming here will help overall.
Signed-off-by: Tom Rini <trini@konsulko.com>
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After the latest changes, ext4 no longer has any fails.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
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Support was already implemented, but not hooked up. This fixes several
fails in the test cases.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
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A sparse file may have regions not mapped by any extents, at the start
or at the end of the file, or anywhere between, thus not finding a
matching extent region is never an error.
Found by python filesystem tests.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
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If a test uses a fixture which is expensive to setup, the fixture can
possibly created with session or module scope. As u_boot_console has
function scope, it can not be used in this case.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
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The IP supports two ports, A and B, each providing up to 32 gpios.
The driver already creates a 2nd gpio bank by reading the 2nd node
from DT, so this is quite a simple change to support the 2nd bank.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Make Android partition table the same as for AM57x EVM.
1. Make "bootloader" partition start from 0x300 sectors offset, so
DRA7 is bootable in Android mode (see
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR option).
2. Increase "bootloader" partition size, because size of u-boot.img is
about 632 KiB (when building DT defconfig, with FIT image enabled).
3. Specify "reserved" partition explicitly, rather than specifying
"efs" partition start. Reserved area will be used to store U-Boot
environment on eMMC. It's convenient to have it exposed explicitly
so we can read/write U-Boot environment.
4. Keep all Android partitions locations intact, by reducing
"reserved" partition size. CONFIG_ENV_SIZE is considered.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
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Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
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"fastboot oem format" command reuses "gpt write" command, which in turn
requires correct partitions defined in $partitions variable. This patch
adds such definition of Android partitions for DRA7XX EVM board.
By default $partitions variable contains Linux partition table. In order
to prepare Android environment one can run next commands from U-Boot
shell:
=> env set partitions $partitions_android
=> env save
After those operations one can go to fastboot mode and perform
"fastboot oem format" to create Android partition table.
While at it, enable CONFIG_RANDOM_UUID to spare user from providing
UUIDs for each partition manually.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
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Add support for distro_bootcmd on MMC and fall back to prior
behavior if distro_bootcmd fails.
Tested on Beagleboad xM to boot GRUB2 (and then Linux kernel) in EFI mode
from MMC.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Enable USB download gadget (needed for fastboot support) and all
dependencies.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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On "fastboot reboot-bootloader" we check "dofastboot" variable and do
"fastboot 0" command in U-Boot if it's 1. But there are boards which have
USB controller number other than 0, so it should be respected when
performing "fastboot" command.
This patch reuses CONFIG_FASTBOOT_USB_DEV option toprovide correct USB
controller number to "fastboot" command.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Some boards (like AM57x EVM) has USB OTG controller other than 0. So in
order to use correct controller number in compiled environment we should
define CONFIG_FASTBOOT_USB_DEV option.
For example, when doing "fastboot reboot-bootloader" we want to enter
fastboot mode automatically. But to do so we need to provide controller
number to "fastboot" command. If this procedure is defined in some config
which is common to bunch of boards, and boards have different USB
controller numbers, we can't just hardcode "fastboot 0" in the
environment. We need to use configurable option, which this patch adds.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Detect the board very early and avoid reading eeprom multiple times.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This is similar to Commit 93e6253d11030 ("ARM: OMAP4/5: Centralize
early clock initialization") that was done for OMAP4+, reflecting the same
for AM33xx and AM43xx SoCs to centralize clock initialization.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add setup_early_clocks that calls setup_clocks_for_console for
ti81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Update CONFIG_LS2080A to CONFIG_FSL_LSCH3 to make those workaround
implementing of erratum reusable for more SoCs.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
[YS: Reviese commit subject]
Reviewed-by: York Sun <york.sun@nxp.com>
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Change core clock to 1.2GHz in the configurations for SD and NAND boot.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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The current value to check whether the PHY was configured has dependency
on MC, it expects MC to start PCS AN, this is not true during boot up,
so it should be changed to remove the dependency.
The PHY's register space should be restore to default after accessing
extended space.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This deadloop is introduced by commit:
71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol
deadloop detail:
cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 =>
is_serdes_configured => fsl_serdes_init
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Defines get_svr() for mpc512x devices
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add these serdes protocols
Serdes1: 0x39, 0x4B, 0x4C, 0x4D
Serdes2: 0x47, 0x57
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
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LPUART0 is used by default, and it's using platform clock.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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It's not always true that LPUART clock is CONFIG_SYS_CLK_FREQ. This
patch provides a weak function get_lpuart_clk(), so that the clock
can be ovreridden on a specific board which uses different clock
for LPUART.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Reformat commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
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The patch adds support for Freescale ls1021a-iot board.
Signed-off-by: Feng Li <feng.li_2@nxp.com>
[YS: rewrite commit message, fix whitespace in Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
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There is the stmicro DSPI flash on LS12080ARDB.
Enable DSPI flash related configure options.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add optimization parameters like "quiet" in bootargs to reduce the system
boot time
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Early system initialization is being done before initf_dm is being called
in U-Boot. Then system will fail to boot if any of the DM enabled driver
is being called in this system initialization code. So, rearrange the
code a bit so that DM enabled drivers can be called during early system
initialization. This is inspired by commit e850ed82bce8 ("ARM: OMAP4+: Allow
arch specific code to use early DM")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Somehow an int returning function without a return statement sneaked
in, fix it.
Also fix some whitespace damage on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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s25fs512s and s25fl512s_256k have common id information
till 5 bytes and 6th byte have different family id
like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
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- fix single line comments
- remove unneeded spaces
- ascending order of include files
- rename SPI DATAFLASH to dataflash
- rename SPI DataFlash to dataflash
- return NULL replaced with error code
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This patch fixed the add_dataflash return logic,
so-that it can handle both jedec and older chips
same as Linux.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Flash id detection should be the first step to enumerate
the connected flash on the board, once ie done checking
with respective id codes locally in the driver all this
should be part of jedec_probe instead of id detection and
validated through flash_info{} table separatly.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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dataflash doesn't require options, memory_map from spi.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Dual flash code in spi are usually take the spi controller
to work with dual connected flash devices. Usually these
dual connection operation's are referred to flash controller
protocol rather with spi controller protocol, these are still
present in flash side for the usage of spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf
which are triggered from spi controller side.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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This option isn't used for anything, so get rid of it.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
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Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Fix sniper and kc1 migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
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spi_flash_write_bar-> write_bar
spi_flash_write_bar -> read_bar
spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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Use small 'd' in s25s512s ext_jedec
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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For readability use small letter's with flash name.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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Now the flash params table as renamed to spi_flash_ids structure,
so rename the sf_params.c to spi_flash_ids.c and remove the legacy.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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Remove unneeded/non-meaningful commit message on
params and flash.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.
For this:
- Removed spansion_s25fss_disable_4KB_erase code
- Add SECT_4K for S25FS512S chip
Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
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Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.
In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.
Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
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