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2012-09-07tegra: nand: Add Tegra NAND driverJim Lin
A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07tegra: fdt: Add NAND definitions to fdtSimon Glass
Add a flash node to handle the NAND, including memory timings and page / block size information. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07tegra: fdt: Add NAND controller binding and definitionsSimon Glass
Add a NAND controller along with a bindings file for review. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07tegra: Add NAND support to funcmuxSimon Glass
Add selection of NAND flash pins to the funcmux. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07nand: Try to align the default buffersSimon Glass
The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-05Merge remote-tracking branch 'u-boot-ti/master' into mAlbert ARIBAUD
2012-09-04am33xx: Remove redundant timer configTom Rini
We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that has been configuring and enabling the timer, so remove our code that does the same thing by different methods. Tested on EVM GP, SK-EVM and Beaglebone. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-04OMAP3: mt_ventoux: added video supportStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: video: add macros to set display parametersStefano Babic
Add a common macros to set the registers for horizontal and vertical timing. Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04video: drop duplicate set of DISPC_CONFIG registerStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: mt_ventoux: disable the buzzer at start-upStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: mt_ventoux: read MAC address from EEPROMStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: mt_ventoux: activate GPIO4Stefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: mt_ventoux: Correct board pinmuxStefano Babic
Fix some issues (some pins were not set as GPIOs) Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: twister : get MAC address from EEPROMStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: tam3517: add function to read MAC from EEPROMStefano Babic
The manufacturer delivers the TAM3517 SOM with 4 MAC address. They are stored on the EEPROM of the SOM. The patch adds a function to get their values and set the ethaddr variables. Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04OMAP3: add definition of CTRL_WKUP_CTRL registerArnout Vandecappelle (Essensium/Mind)
AM/DM37x SoCs add the CTRL_WKUP_CTRL register. It contains the GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads of gpio_126, gpio_127 and gpio_129. Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Cc: Tom Rini <trini@ti.com>
2012-09-04Merge remote-tracking branch 'u-boot-atmel/master' into mAlbert ARIBAUD
2012-09-04Fixes the crippled console output on PortuxG20.Markus Hubig
In order to use the serial interface on the PortuxG20 we need to enable the level converter first by setting the PC9 pin to high. The level converter needs some time to settle so we have to use the mdelay() function to wait for some time. Unfortunately we have no timers available at board_early_init_f() so we enable the serial output early within board_postclk_init(). Now the U-Boot output looks fine: | U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32) | | CPU: AT91SAM9G20 | Crystal frequency: 18.432 MHz | CPU clock : 396.288 MHz | Master clock : 132.096 MHz | DRAM: 64 MiB | WARNING: Caches not enabled | NAND: 128 MiB | In: serial | Out: serial | Err: serial | Net: macb0 | Hit any key to stop autoboot: 0 Signed-off-by: Markus Hubig <mhubig@imko.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04arm: Adds board_postclk_init to the init_sequence.Markus Hubig
The board_postclk_init() function can be used to perform operations that requires a working timer early within the U-Boot init_sequence. Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04atmel: eb_cpux9k2: add ram target configurationJens Scharsig
* add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config) Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04integrator: break out common configLinus Walleij
The configuration that is common for all Integrator boards may just as well be stored in a common include file as per pattern from other boards. This eases maintenance quite a bit. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03eb_cpux9k2: fix chip selectJens Scharsig
* fix chip select initialization for frame buffer, this will be increase frame buffer access speed Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-03lsxl: support power switchMichael Walle
This patch restores the Linkstation's original behaviour when powering off. Once the (soft) power switch is turned off, linux will reboot and the bootloader turns off HDD and USB power. Then it loops as long as the switch is in the off position, before continuing the boot process again. Additionally, this patch fixes the board function set_led(LED_OFF). Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03cosmetic: Better explain how to use the kirkwood kwbimage.cfg file.Karl O. Pinc
Hi, This adds to the documenation to explain how to use the kwbimage.cfg file necessary to generate an image with prefixed board setup values necessary for the kirkwood boards. Signed-off-by: Karl O. Pinc <kop@meme.com>
2012-09-03Cosmetic doc typo fixes to the kwbimage feature docsKarl O. Pinc
Signed-off-by: Karl O. Pinc <kop@meme.com>
2012-09-03arm/km: remove unused codeHolger Brunck
For some reasons we had an own implementaion of dram_init and dram_init_banksize. This is not needed anymore, use the standard kirkwood functions instead. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03arm/km: fix frequency of the SPI NOR FlashValentin Longchamp
According to our last HW measures, this could be raised while still compatible with the potential delays on the lines. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03km/ivm: fix string len check to support 7 char board namesValentin Longchamp
The fanless boards now have a 7-digit (XXXXX-F) board name. This triggers a border condition when reading this string in the IVM although this string is smaller than the currenly read string size, but only by 1 character. This patch corrects this by changing the size check condition for string length. It is the same change that was done in the platform for this same bug. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Stefan Bigler <stefan.bigler@keymile.com>
2012-09-03kw_spi: fix clock prescaler computationValentin Longchamp
The computation was not correct with low clock values: setting a 1MHz clock would result in an overlap that would then configure a 25Mhz clock. This patch implements a correct computation method according to the kirkwood functionnal spec. table 600 (Serial Memory Interface Configuration Register). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03km/arm: set SPI NOR Flash default parametersValentin Longchamp
These parameters are used by the the sf probe command that are used by our update script and they therefore need to be set for all of our boards. The timing is the same as for the ENV SPI NOR Flash (since it's the same physical device) and takes the boco2 delay on the bus into account. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2012-09-03edminiv2: orion5x: fix GPIO inits and valuesAlbert ARIBAUD
Orion5x did not actually write GPIO output values or input polarities, and ED Mini V2 had bad or missing values for GPIO settings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-02Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk
* 'agust@denx.de' of git://git.denx.de/u-boot-staging: tx25: Use generic gpio_* calls config: Always use GNU ld tools: add kwboot binary to .gitignore file fdt: Include arch specific gpio.h instead of asm-generic/gpio.h serial: CONSOLE macro is not used Conflicts: board/karo/tx25/tx25.c Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-09-01at91: 9x5: Enable PMECC for 5series ek board.Wu, Josh
Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.Wu, Josh
Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: voice.shen@atmel.com Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh
The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: atmel_nand: remove unused variables.Wu, Josh
Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh
atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01atmel: at91sam9x5: add spi flash boot supportBo Shen
Add at91sam9x5 series spi flash boot support Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321 serial flash SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on atmel_spi patch, or else, it will occur receive overrun Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01arm: sam9g10/sam9m10g45: remove CONFIG_ARCH_CPU_INITBo Shen
Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek Signed-off-by: Bo Shen <voice.shen@atmel.com> [rebase on TOT] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01arm:at91-boards: remove console_init_f where unnecessaryAndreas Bießmann
A lot of at91 boards have the console_init_f in board_init. This is useless cause it was called before by generic code in lib/board.c. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Jens Scharsig <esw@bus-elektronik.de> cc: Stelian Pop <stelian@popies.net> cc: Sedji Gaouaou<sedji.gaouaou@atmel.com> cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> cc: Eric Benard <eric@eukrea.com> Tested-by: voice.shen@atmel.com Tested-by: voice.shen@atmel.com Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-09-01at91sam9263ek: remove unnecessary console_init_fAndreas Bießmann
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Stelian Pop <stelian@popies.net>
2012-09-01spi: atmel: add WDRBT bit to avoid receive overrunBo Shen
The atmel at91sam9x5 series spi has feature to avoid receive overren Using the patch to enable it Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01atmel: at91sam9x5: fix name error for spiBo Shen
Fix the name error Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01Take over the maintainer for sam9g10 and sam9m10g45Bo Shen
As the maintainer for at91sam9g10ek and at91sam9m10g45ek can not reach any more. So I wish to take over the maintainer for sam9g10 and sam9m10g45 Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01arm : at91sam9x5 : fix a small bug for NANDBo Shen
fix a bug: when not boot from NAND, the NAND flash can not be detected. Using this to fix it Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01AT91: Small fix on AT91 USART initialization codeXu, Hong
Before reset dbgu transmitter, we just wait TXEMPTY to drain the transmitter register(Just in case). If not doing this, we may sometimes see several weird characters from DBGU. A short delay is also added to make sure the new serial settings are settled. Signed-off-by: Hong Xu <hong.xu@atmel.com> [cherry-picked from u-boot-atmel/old-next] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91sam9263ek: fix 'update' scriptAndreas Bießmann
The old update script uses 'load_addr' which is never set. Use 'fileaddr' instead which is automagically set by e.g. dhcp. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Stelian Pop <stelian@popies.net>
2012-09-01ARM : at91sam9x5 : Remove CONFIG_ARCH_CPU_INITBo Shen
Remove CONFIG_ARCH_CPU_INIT, no need it anymore Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01fsl_esdhc: Remove cache snooping for i.MXBenoît Thébaudeau
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init(). Since no_snoop was only used on i.MX, get rid of it BTW. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>