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2013-06-10ARM: DRA7xx: clocks: Fixing i2c_init for PMICLokesh Vutla
In DRA7xx Soc's voltage scaling is done using GPI2C. So i2c_init should happen before scaling. I2C driver uses __udelay which needs timer to be initialized. So moving timer_init just before voltage scaling. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: power Add support for tps659038 PMICLokesh Vutla
TPS659038 is the power IC used in DRA7XX boards. Adding support for this and also adding pmic data for DRA7XX boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: DRA7xx: Add control id code for DRA7xxLokesh Vutla
The registers that are used for device identification are changed from OMAP5 to DRA7xx. Using the correct registers for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP4+: pmic: Make generic bus init and write functionsLokesh Vutla
Voltage scaling can be done in two ways: -> Using SR I2C -> Using GP I2C In order to support both, have a function pointer in pmic_data so that we can call as per our requirement. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla
To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP5: clocks: Do not enable sgx clocksSricharan R
SGX clocks should be enabled only for OMAP5 ES1.0. So this can be removed. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10ARM: OMAP4+: Cleanup header filesLokesh Vutla
After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10OMAP5: Fix bug in omap5_es1_prcm structLubomir Popov
The newly introduced function setup_warmreset_time(), called from within prcm_init(), tries to write to the prm_rsttime OMAP5 register. The struct member holding this register's address is however initialized for OMAP5 ES2.0 only. On ES1.0 devices this uninitialized value causes a second (warm) reset at startup. Add .prm_rsttime address init to the ES1.0 struct. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Tom Rini <trini@ti.com>
2013-06-10OMAP5: add ABB setup for MPU voltage domainAndrii Tseglytskyi
Patch adds a call of abb_setup() function, and proper registers definitions needed for ABB setup sequence. ABB is initialized for MPU voltage domain. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
2013-06-10OMAP3+: introduce generic ABB supportAndrii Tseglytskyi
Adaptive Body Biasing (ABB) modulates transistor bias voltages dynamically in order to optimize switching speed versus leakage. Adaptive Body-Bias ldos are present for some voltage domains starting with OMAP3630. There are three modes of operation: * Bypass - the default, it just follows the vdd voltage * Foward Body-Bias - applies voltage bias to increase transistor performance at the cost of power. Used to operate safely at high OPPs. * Reverse Body-Bias - applies voltage bias to decrease leakage and save power. Used to save power at lower OPPs. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
2013-06-10am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW ↵Joel A Fernandes
driver Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot. Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
2013-06-08Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: drivers/serial/Makefile
2013-06-06ARM: tegra: only enable SCU on Tegra20Tom Warren
The non-SPL build of U-Boot on Tegra only runs on a single CPU, and hence there is no need to enable the SCU when running U-Boot. If an SMP OS is booted, and it needs the SCU enabled, it will enable the SCU itself. U-Boot doing so is redundant. The one exception is Tegra20, where an enabled SCU is required for some aspects of PCIe to work correctly. Some Tegra SoCs contain CPUs without a software-controlled SCU. In this case, attempting to turn it on actively causes problems. This is the case for Tegra114. For example, when running Linux, the first (or at least some very early) user-space process will trigger the following kernel message: Unhandled fault: imprecise external abort (0x406) at 0x00000000 This is typically accompanied by that process receving a fatal signal, and exiting. Since this process is usually pid 1, this causes total system boot failure. Signed-off-by: Tom Warren <twarren@nvidia.com> [swarren, fleshed out description, ported to upstream chipid APIs] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-06vf610twr: Drop unneeded 'status' variableFabio Estevam
No need to use the 'status' variable, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-06-06ARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PARTFabio Estevam
When running the "save" command several times on a mx6qsabresd we see: U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART. CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores the environment variables. On some imx boards it is been incorrectly used to pass the partition of kernel and dtb files for the 'mmcpart' script variable. Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable directly. Reported-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
2013-06-05am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.cTom Rini
We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards. Reviewed-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-06-04am33xx: Correct NON_SECURE_SRAM_START/ENDTom Rini
Prior to Sricharan's cleanup of the boot parameter saving code, we did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a problem that the address was pointing to the middle of our running SPL. Correct to point to the base location of the download image area. Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being used. As part of correcting these tests, make use of the fact that we've always been placing our stack outside of the download image area (which is fine, once the downloaded image is run, ROM is gone) so correct the max size test to be the ROM defined top of the download area to where we link/load at. Signed-off-by: Tom Rini <trini@ti.com> --- Changes in v2: - Fix typo noted by Peter Korsgaard
2013-06-04omap-common/hwinit-common.c: Mark omap_rev_string as staticTom Rini
Only called in this file, mark as static. Signed-off-by: Tom Rini <trini@ti.com>
2013-06-04Add support for Congatec Conga-QEVAl boardSARTRE Leo
Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-06-03wandboard: Add Boot Splash image with Wandboard logoOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-06-03wandboard: Enable HDMI splashscreenFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-06-03build: Use generic boot logo matchingOtavio Salvador
The boot logo matching is now done in following way: - use LOGO_BMP if it is set, or - use $(BOARD).bmp if it exists in tools/logos, or - use $(VENDOR).bmp if it exists in tools/logos, or - use denx.bmp otherwise. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Wolfgang Denk <wd@denx.de>
2013-06-03mx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signalAndrew Gabbasov
The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro (shifted and or'ed with chip select), so it's incorrect to pass that macro directly as an argument to gpio_direction_output() call. Also, SPI driver sets the direction and initial value of a gpio, used as a chip select signal, before any actual activity happens on the bus. So, it is safe to just remove the gpio_direction_output call, that works incorrectly, thus making no effect, anyway. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2013-06-03mx6qsabreauto: Add Port Expander resetRenato Frias
There are 3 IO expanders on the mx6qsabreauto all reset by the same GPIO, just set it to high to use the IO. Signed-off-by: Renato Frias <b13784@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2013-06-03mx6qsabreauto: Add i2c to mx6qsabreauto boardRenato Frias
Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed use gpio to set steering. Signed-off-by: Renato Frias <b13784@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2013-06-03mx6slevk: Allow booting a device tree kernelFabio Estevam
When the mx6slevk board support was added in U-boot there was no device tree support for mx6sl, so only a FSL 3.0.35 was tested at that time. Now that mx6slevk support is available we can boot a device tree kernel, by adjusting CONFIG_LOADADDR into a proper location, so that a non-dt and a dt kernels can be booted. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-06-03arm: mxs: Fix vectoring table craftingMarek Vasut
The vectoring table has to be placed at 0x0, but U-Boot on MX23/MX28 starts from RAM, so the vectoring table at 0x0 is not present. Craft code that will be placed at 0x0 and will redirect interrupt vectoring to proper location of the U-Boot in RAM. Signed-off-by: Marek Vasut <marex@denx.de> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-06-03arm: vf610: Add basic support for Vybrid VF610TWR boardAlison Wang
VF610TWR is a board based on Vybrid VF610 SoC. This patch adds basic support for Vybrid VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-03arm: vf610: Add Vybrid VF610 to mxc_ocotp documentAlison Wang
This patch adds Vybrid VF610 to mxc_ocotp document. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-03arm: vf610: Add uart support for Vybrid VF610Alison Wang
This patch adds lpuart support for Vybrid VF610 platform. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2013-06-03arm: vf610: Add watchdog support for Vybrid VF610Alison Wang
This patch adds watchdog support for Vybrid VF610 platform. Signed-off-by: Alison Wang <b18965@freescale.com>
2013-06-03net: fec_mxc: Add support for Vybrid VF610Alison Wang
This patch adds FEC support for Vybrid VF610 platform. In function fec_open(), RCR register is only set as RGMII mode. But RCR register should be set as RMII mode for VF610 platform. This configuration is already done in fec_reg_setup(), so this piece of code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII / FEC_RCNTRL_MII_MODE bits. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-03arm: vf610: Add Vybrid VF610 CPU supportAlison Wang
This patch adds generic codes to support Freescale's Vybrid VF610 CPU. It aligns Vybrid VF610 platform with i.MX platform. As there are some differences between VF610 and i.MX platforms, the specific codes are in the arch/arm/cpu/armv7/vf610 directory. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-03arm: vf610: Add IOMUX support for Vybrid VF610Alison Wang
This patch adds the IOMUX support for Vybrid VF610 platform. There is a little difference for IOMUXC module between VF610 and i.MX platform, the muxmode and pad configuration share one 32bit register on VF610, but they are two independent registers on I.MX platform. A CONFIG_IOMUX_SHARE_CONFIG_REG was introduced to fit this difference. Signed-off-by: Alison Wang <b18965@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-05-30arm: factorize relocate_code routineAlbert ARIBAUD
Replace all relocate_code routines from ARM start.S files with a single instance in file arch/arm/lib/relocate.S. For PXA, this requires moving the dcache unlocking code from within relocate_code into c_runtime_cpu_setup. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
2013-05-30arm: do not compile relocate_code() for SPL buildsAlbert ARIBAUD
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
2013-05-30tx25: copy SPL directly, not using relocate_code.Albert ARIBAUD
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
2013-05-30mx31pdk: copy SPL directly, not using relocate_code.Albert ARIBAUD
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Simon Glass <sjg@chromium.org>
2013-05-30Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD
Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
2013-05-28tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL buildAxel Lin
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_critAxel Lin
cpu_init_crit() can be skipped, but the code is still enabled requiring a platform to supply lowlevel_init(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28ARM: tegra: support SKU 7 of Tegra20Stephen Warren
Make U-Boot aware of the Tegra20 SKU 7, and treat it identically to any other Tegra20. My Whistler board has a SoC with this SKU. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28ARM: tegra: support SKU 1 of Tegra114Stephen Warren
Make U-Boot aware of the Tegra114 SKU 1, and treat it identically to any other Tegra114. This value is used on (at least some) Dalmore boards with a production rather than engineering chip. Such boards are in the hands of some partners who want to use upstream U-Boot. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28tegra: always build u-boot-nodtb-tegra.binStephen Warren
Even when eventually building u-boot-dtb-tegra.bin, separately building u-boot-nodtb-tegra.bin can be useful, since building it encapsulates the SPL padding step. If you want to tweak u-boot.dtb and regenerate u-boot-dtb-tegra.bin, it is then a simple cat operation. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28Tegra: clk: always use find_best_divider() for periph clocksAllen Martin
When adjusting peripheral clocks always use find_best_divider() instead of clk_get_divider() even when a secondary divider is not available. In the case where is requested clock is too slow to be derived from the parent clock this allows a best effort to get close to the requested clock. This comes up for commands like "sf" where the user can pass a clock speed on the command line or "sspi" where the clock is hardcoded to 1MHz, but the Tegra114 SPI controller can't go that low. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-05-28Tegra: Remove unused/non-existent spl linker script referenceTom Warren
Tegra builds use the common u-boot-spl.lds now. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-05-28Tegra: T30: Beaver: Fix board/board_name env vars, s/b beaver, not cardhuTom Warren
Did a 'strings u-boot-dtb-tegra.bin | less' and saw that both board and board_name == beaver. Didn't test as I have no T30 Beaver board here. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2013-05-24powerpc/mpc85xx: Clear L1 D-cache lockYork Sun
dcbi instruction has been used to clear D-cache lock. However, the cache lock is persistent for e6500 core. Use dcblc to clear the lock explicitly. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24SECURE BOOT - Removed deletion of TLB entries codeRuchika Gupta
Boot ROM code creates TLB entries for 3.5G space before entering the u-boot. Earlier we were deleting these entries after early initialization of CPU. In recent past, code has been added to invalidate all these entries before relocation of u-boot code. So this code to delete TLB entries after CPU initialization is no longer required. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Acked-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/b4860qds: Add LAW Target ID and Create LAW entry for MapleShaveta Leekha
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit (git 2.34.1) at 2024-12-27 02:21:10 +0000