summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-12-06armv8: sec_firmware: change el2_to_aarch32 SMC IDRajesh Bhagat
Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17, it is applicable to both TFA and non-TFA boot. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: fsl-layerscape: Update parsing boot sourceYork Sun
Workaround of erratum A010539 clears the RCW source field in PORSR1 register, causing failure of detecting boot source using this method. Use SMC call if U-Boot runs at EL2. If SMC is not implemented or running at EL3, continue to read PORSR1 and presume QSPI as boot source if erratum workaround A010539 is enabled and RCW source is cleared. Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: layerscape: skip OCRAM init for TFABOOTRajesh Bhagat
OCRAM initialization is performed by TFA, Hence skipped from u-boot. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: layerscape: add SMC calls for DDR size and bank infoRajesh Bhagat
Adds SMC calls for getting DDR size and bank info for TFABOOT. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: fsl-layerscape: bootcmd identification for TFABOOTPankit Garg
Adds bootcmd identificaton on basis on boot source, valid in TFABOOT configuration. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> [YS: remove unnecessary braces] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: layerscape: remove EL3 specific erratas for TFABOOTRajesh Bhagat
Removes EL3 specific erratas for TFABOOT, And now taken care in TFA. ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511, SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803, SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: fsl-layerscape: identify boot source from PORSR registerRajesh Bhagat
PORSR register holds the cfg_rcw_src field which can be used to identify boot source. Further, it can be used to select the environment location. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix multiple checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: layerscape: Add TFABOOT supportRajesh Bhagat
Adds TFABOOT support config option and add generic code to enable execution from DDR. Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2018-12-06drivers: ifc: dynamic chipselect mapping supportPankit Garg
IFC driver changes to implement the chipselect mappings at run time. Defines init_early_memctl_regs and init_final_memctl_regs with chipselect dynamic mapping for nor and nand boot. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3Pankit Garg
Change tlb base address from OCRAM to DDR when exception level is less than 3. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06armv8: layerscape: Enable routing SError exceptionYork Sun
In case SError happens at EL2, if SCR_EL3[EA] is not routing it to EL3, and SCR_EL3[RW] is set to aarch64, setting HCR_EL2[AMO] routes the exception to EL2. Otherwise this exception is not taken. Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-06driver/ifc: replace __ilog2 with LOG2 macroRajesh Bhagat
Replaces __ilog2 function call with LOG2 macro, required to use macros in global variables. Also, corrects the value passed in LOG2 for some PowerPC platforms. Minimum value that can be configured is is 64K for IFC IP. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix white space around operator] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04env: sf: define API to override sf environment addressRajesh Bhagat
Defines env_sf_get_env_addr API to override sf environment address, required to support multiple environment. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04env: allow flash and nand env driver to compile togetherRajesh Bhagat
Define env_ptr as static in flash and nand env driver to allow these to compile together. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04move data structure out of cpu.hYork Sun
Move static definitions to cpu.c file, as it doesn't allow the cpu.h file to be included in multiple c files. Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-03Prepare v2019.01-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03MAINTAINERS: board: qcom: db820c: update email.Jorge Ramirez-Ortiz
Update email address Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-12-03Revert "serial: ns16550: fix debug uart putc called before init"Simon Goldschmidt
This reverts commit 6f57c34473d37b8da5e6a3764d0d377d748aeef1 since it does not seem to work at least on rk3399. The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud rate prescaler register is readable only when USR[0] is zero. Since this bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather drop this than making the ns16550 debug uart more platform specific. Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com
2018-12-03dm: MIGRATION: Update migration plan for BLKTom Rini
The biggest part of migration to using CONFIG_BLK is that we need to have the various subsystems migrated first, so reword the plan here to reference the new deadlines. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03dm: MIGRATION: Add migration plan for CONFIG_SATATom Rini
As the core of the subsystem has been converted along with some of the drivers, formalize a deadline for migration. Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Marek Vasut <marex@denx.de> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Soeren Moch <smoch@web.de> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03dm: MIGRATION: Add migration plan for DM_USBTom Rini
As much of the USB system has been migrated to DM now, formalize a deadline for migration. Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03dm: MIGRATION: Add migration plan for DM_MMCTom Rini
Given that at this point the MMC subsystem itself has been migrated along with a number of subsystem drivers, formalize a deadline for migration. Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-03Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
2018-12-03Merge tag 'signed-rpi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for rpi - 2018-12-03 A few Raspberry Pi specific changes this time: - Allow 2nd MMC device - Support RPi 3 Model A+ - Allow UUID to find filesystem
2018-12-03Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-12-03 This release is fully packed with lots of glorious improvements in UEFI land again! - Make PE images more standards compliant - Improve sandbox support - Improve correctness - Fix RISC-V execution on virt model - Honor board defined top of ram (fixes a few boards) - Imply DM USB access when distro boot is available - Code cleanups
2018-12-03Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- MMC fixes for R-Car Gen3
2018-12-03Merge branch '2018-12-03-master-imports'Tom Rini
- Baltos platform updates - rtc m41t62 converted to DM. - PowerPC MPC8xx DM conversion - Verified boot updates
2018-12-03rpi: add 3 Model A+Jonathan Gray
Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE according to the list on raspberrypi.org. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03rpi: add URL of official revision code listJonathan Gray
Replace various third party lists of Raspberry Pi revision codes in a comment with the list on raspberrypi.org. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03spi, mpc8xx: migrate to DM_SPIChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board_r: fix build with DM_SPIChristophe Leroy
CC common/board_r.o common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function) initr_spi, ^ make[1]: *** [common/board_r.o] Error 1 Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03drivers: serial: get rid of non DM mpc8xx driverChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: migrate to DM_SERIALChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03drivers: serial: migrate mpc8xx to DMChristophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: use new DM watchdogChristophe Leroy
This patch switches MCR3000 board to the new DM watchdog. The change in u-boot.lds is because MCR3000.o grows a bit with this patch and doesn't fit anymore below env_offset on some versions of GCC. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03drivers: watchdog: add a DM driver for the MPC8xx watchdogChristophe Leroy
This patch adds a DM driver for the MPC8xx watchdog. Basically, the watchdog is enabled by default from the start and SYPCR register has to be writen once to set the timeout and/or deactivate the watchdog. Once written, it cannot be written again. It means that wdt_stop() can be called before wdt_start() to stop the watchdog, but cannot be called if wdt_start() has been called. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROLChristophe Leroy
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03powerpc, mpc8xx: clear top of stackChristophe Leroy
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
2018-12-03test: vboot: clean its filePhilippe Reynes
This update the its file used in vboot test to respect the new node style name defined in doc/uImage.FIT (for example: replace kernel@1 by kernel and fdt@1 by fdt-1) Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03test: vboot: add padding pss for rsa signaturePhilippe Reynes
The padding pss is now supported for rsa signature. This add test with padding pss on vboot test. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03configs: sandbox: enable padding pss for rsa signaturePhilippe Reynes
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03doc: uImage.FIT: signature.txt: add option paddingPhilippe Reynes
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rsa: add support of padding pssPhilippe Reynes
We add the support of the padding pss for rsa signature. This new padding is often recommended instead of pkcs-1.5. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rsa: add a structure for the paddingPhilippe Reynes
The rsa signature use a padding algorithm. By default, we use the padding pkcs-1.5. In order to add some new padding algorithm, we add a padding framework to manage several padding algorithm. The choice of the padding is done in the file .its. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rsa: use new openssl API to create signaturePhilippe Reynes
Previous implementation of the rsa signature was using the openssl API EVP_Sign*, but the new openssl API EVP_DigestSign* is more flexible. So we move to this new API. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03rtc: m41t62: Convert the RTC driver to support the driver model (DM)Lukasz Majewski
After this change the m41t62.c can be used with RTC subsystem (i.e. date command) which uses device model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-12-03rtc: m41t62: Extract common RTC handling code to facilitate DM conversionLukasz Majewski
This change facilitates the conversion of m41t62 RTC driver to device model (DM). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-12-03rtc: m41t62: Break i2c_write() arguments to fix checkpatch warningLukasz Majewski
No functional change for this commit. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-12-03Kconfig: Migrate CONFIG_RTC_M41T62 define to KconfigLukasz Majewski
This patch moves the RTC M41T62 config define to Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03eeprom: Add device model based I2C support to eeprom commandLukasz Majewski
After this change the 'eeprom' command can be used with DM aware boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
generated by cgit (git 2.34.1) at 2025-01-23 01:28:01 +0000