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2019-01-17pci: layerscape: Modify the EP and RC mode judge methodXiaowei Bao
Modify the RC and EP mode judge method, save the mode as a variable, the variable will be used by other function. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17ls1046aqds: Bypass xfi port fixup for KR modeFlorinel Iordache
u-boot makes a fixup for LS1046AQDS board to setup the properties 'fixed-link' and 'phy-connection-type' to 'xgmii' but in case of backplane mode this fixup is not correct because it causes the KR link to fail and so it must be bypassed in order to keep the link in KR mode as it is defined in DTS. Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> [YS: Fix compiling warning] Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: fsl-layerscape: properly configure qdma ICIDLaurentiu Tudor
The ICIDs for the qdma device are not configured through SCFG but through some registers found in the actual device register block. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17mmc: fsl_esdhc: make get_cd work well in dm_mmc_opsYinbo Zhu
This patch is to make get_cd work well when DM_MMC enabled Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17fsl-layerscape: dpaa: fix fsl-mc status in fdt with bootefiMian Yousaf Kaukab
fsl-mc lazyapply command applies dpl from efi_exit_boot_services(). Status of fsl-mc node in working fdt is updated at this stage. However, an efi application like grub may already have copied the fdt. So the updates to fdt done at efi_exit_boot_services() may not be visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply command is used. Fixes: b7b8410a8f (ls2080: Exit dpaa only right before exiting U-Boot) Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: ls1043a: correct the PCIe INTx fixupHou Zhiqiang
On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on rev1.1 there is only 1 for INTx, so the current fixup is inverse of the fact. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: ls1043a: add SVR definitions for 23x23 package siliconHou Zhiqiang
LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17configs: update TFABOOT defconfigs for SD boot supportRajesh Bhagat
update TFABOOT defconfig for SD boot on below NXP chasis2 and chasis3 platforms: ls1043a, ls1046a, ls1088a and ls2088a. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17env: fix allow to build multiple environmentsRajesh Bhagat
Patch fixes build error when enabling CONFIG_ENV_IS_IN_SPI_FLAS and CONFIG_ENV_IS_IN_MMC at the same time mentioned issue in below link: Refer: https://lists.denx.de/pipermail/u-boot/2018-February/319565.html build error when enabling CONFIG_ENV_IS_IN_SPI_FLASH and CONFIG_ENV_IS_IN_MMC at the same time. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: ls2088aqds: Add TFABOOT supportRajesh Bhagat
TFABOOT support includes: - ls2088aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: ls2088ardb: Add TFABOOT supportRajesh Bhagat
TFABOOT support includes: - ls2088ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - remove EL3 specific erratas for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: ls1088aqds: Add TFABOOT supportPankit Garg
TFABOOT support includes: - ls1088aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - MC address changes for TFABOOT - define BOOTCOMMAND for TFABOOT - ifc chip select changes for TFABOOT Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: ls1088ardb: Add TFABOOT supportPankit Garg
TFABOOT support includes: - ls1088ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - MC address changes for TFABOOT - define BOOTCOMMAND for TFABOOT - ifc chip select changes for TFABOOT Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17ls1043a: add support for nand-boot cmd for TFAPankit Garg
Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17drivers: ifc: restore the legacy flow for IFC configRajesh Bhagat
Restore the legacy flow along with TFABOOT flow for IFC configuration. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17armv8: fsl-layerscape: fixes for TFABOOT frameworkRajesh Bhagat
Fixes for TFABOOT framework - update eMMC bootsrc to SD_MMC - Increase buffer size for mcinitcmd from 256 to 512 - Fix mcinitcmd and bootcmd for Secure Boot Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-16arm: bootm: fix sp detection at end of address rangeSimon Goldschmidt
This fixes 'arch_lmb_reserve()' for ARM that tries to detect in which DRAM bank 'sp' is in. This code failed if a bank was at the end of physical address range (i.e. size + length overflowed to 0). To fix this, calculate 'bank_end' as 'size + length - 1' so that such banks end at 0xffffffff, not 0. Fixes: 15751403b6 ("ARM: bootm: don't assume sp is in DRAM bank 0") Reported-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2019-01-16tftp: prevent overwriting reserved memorySimon Goldschmidt
This fixes CVE-2018-18439 ("insufficient boundary checks in network image boot") by using lmb to check for a valid range to store received blocks. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [trini: Always build lib/lmb.o on LMB and lib/fdtdec.o on OF_LIBFDT] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-16lmb: remove unused extern declarationSimon Goldschmidt
lmb.h includes an extern declaration of "struct lmb lmb;" which is not used anywhere, so remove it. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-16bootm: use new common function lmb_init_and_reserveSimon Goldschmidt
This reduces duplicate code only. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-16fs: prevent overwriting reserved memorySimon Goldschmidt
This fixes CVE-2018-18440 ("insufficient boundary checks in filesystem image load") by using lmb to check the load size of a file against reserved memory addresses. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-16lib: lmb: extend lmb for checks at load timeSimon Goldschmidt
This adds two new functions, lmb_alloc_addr and lmb_get_unreserved_size. lmb_alloc_addr behaves like lmb_alloc, but it tries to allocate a pre-specified address range. Unlike lmb_reserve, this address range must be inside one of the memory ranges that has been set up with lmb_add. lmb_get_unreserved_size returns the number of bytes that can be used up to the next reserved region or the end of valid ram. This can be 0 if the address passed is reserved. Added test for these new functions. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-16fdt: parse "reserved-memory" for memory reservationSimon Goldschmidt
boot_fdt_add_mem_rsv_regions() adds reserved memory sections to an lmb struct. Currently, it only parses regions described by /memreserve/ entries. Extend this to the more commonly used scheme of the "reserved-memory" node. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-16lib: lmb: reserving overlapping regions should failSimon Goldschmidt
lmb_add_region handles overlapping regions wrong: instead of merging or rejecting to add a new reserved region that overlaps an existing one, it just adds the new region. Since internally the same function is used for lmb_alloc, change lmb_add_region to reject overlapping regions. Also, to keep reserved memory correct after 'free', reserved entries created by allocating memory must not set their size to a multiple of alignment but to the original size. This ensures the reserved region is completely removed when the caller calls 'lmb_free', as this one takes the same size as passed to 'lmb_alloc' etc. Add test to assert this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-16lmb: fix allocation at end of address rangeSimon Goldschmidt
The lmb code fails if base + size of RAM overflows to zero. Fix this by calculating end as 'base + size - 1' instead of 'base + size' where appropriate. Added tests to assert this is fixed. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-16test: add test for lib/lmb.cSimon Goldschmidt
Add basic tests for the lmb memory allocation code used to reserve and allocate memory during boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-16env: add spi_flash_read_env functionHoratiu Vultur
The spi_flash_read_env function is a wrapper over spi_flash_read, which enables the env to read multiple flash page size from flash until '\0\0' is read or the end of env partition is reached. Instead of reading the entire env size. When it reads '\0\0', it stops reading further the env and assumes that the rest of env is '\0'. This is an optimization for large environments that contain few bytes environment variables. In this case it doesn't need to read the entire environment and only few pages. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16mtd: nand: raw: allow to disable unneeded ECC layoutsStefan Agner
Each ECC layout consumes about 2984 bytes in the .data section. Allow to disable the default ECC layouts if a driver is known to provide its own ECC layout. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-01-16mips: mt7688: gardena-smart-gateway: Enable green power LED on startupStefan Roese
Set the correct power-up state (default-state) of the green power LED. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mips: mt7688: gardena-smart-gateway: Update mtdparts/mtdids for Kernel 4.19Stefan Roese
With the new SPI NOR framework in v4.19, we need to adapt the MTD parts so that the kernel cmdline parameter "mtdparts=" uses the correct naming for the devices. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MIPS: bmips: switch to CONFIG_OF_SEPARATEDaniel Schwierzeck
Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs. Based on https://patchwork.ozlabs.org/patch/1019791/ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MIPS: xilfpga: switch to CONFIG_OF_SEPARATEDaniel Schwierzeck
Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MIPS: pic32mzdask: switch to CONFIG_OF_SEPARATEDaniel Schwierzeck
Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MIPS: malta: switch to CONFIG_OF_SEPARATEDaniel Schwierzeck
Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MIPS: boston: switch to CONFIG_OF_SEPARATEDaniel Schwierzeck
Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MSCC: Add board support for Jaguar2 SOC familyHoratiu Vultur
Add board support and configuration for Jaguar2 SOC family. The detection of the board type in this family is based on the phy ids. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16MSCC: add device tree for Serval2 boardHoratiu Vultur
Add device tree based on evaluation board pcb112. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16MSCC: Add device tree for Jaguar2-48 boardHoratiu Vultur
Add device tree based on evaluation board pcb111. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16MSCC: Add device tree for Jaguar2 boardHoratiu Vultur
Add device tree based on evaluation board pcb110. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16MSCC: Add support for Jaguar2 SOC familyHoratiu Vultur
As the Ocelot and Luton SoCs, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16pinctrl: mscc: Add gpio and pinctrl for Jaguar2 SOC familyHoratiu Vultur
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common to support new numbe of pins and remove any platform dependency from mscc-common. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.cLars Povlsen
With the new mscc_bb_spi.c driver, there is no longer use for the gpio-mscc-bitbang-spi.c driver. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mips: mscc: DT: Update luton device tree to use fast SPI driverLars Povlsen
Thes patch change the luton base device tree to use the newly added SPI bitbang driver. It also updates the "mscc_luton_defconfig" to use the new driver. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mips: spi: mscc: Add fast bitbang SPI driverLars Povlsen
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller. Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mmc: jz_mmc: Compile-out write support if disabledEzequiel Garcia
Do not build write support, unless it's enabled. In the SPL case, this change will typically remove precious bytes (as write support is most often not needed in SPL). This is important on this platform, where the maximum SPL size is 14 KiB. With gcc v7.3, this change saves 144 bytes producing: size spl/u-boot-spl text data bss dec hex filename 9240 752 712 10704 29d0 spl/u-boot-spl To make the code easier to compile-out and more readable, a pair of read_data/write_data helpers are created. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mmc: Use proper IS_ENABLED macro to check block supportEzequiel Garcia
Use CONFIG_IS_ENABLED(BLK) instead of CONFIG_BLK, in order to fix the following build issues when CONFIG_SPL_MMC_WRITE is selected: drivers/mmc/mmc_write.c:69:7: error: conflicting types for 'mmc_berase' ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt) ^~~~~~~~~~ In file included from drivers/mmc/mmc_write.c:15:0: drivers/mmc/mmc_private.h:39:7: note: previous declaration of 'mmc_berase' was here ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt); ^~~~~~~~~~ drivers/mmc/mmc_write.c:187:7: error: conflicting types for 'mmc_bwrite' ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, ^~~~~~~~~~ In file included from drivers/mmc/mmc_write.c:15:0: drivers/mmc/mmc_private.h:37:7: note: previous declaration of 'mmc_bwrite' was here ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, ^~~~~~~~~~ Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16net: bcm6368: fix restart flow issuesÁlvaro Fernández Rojas
Correctly enable/disable bcm6368-net controller to avoid flow issues. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16MIPS: jz47xx: remove custom u-boot-spl.ldsDaniel Schwierzeck
There is no real difference between the generic variant and the custom variant except that the generic variant is more optimised. This also saves 24 Bytes in the SPL binary. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2019-01-16MIPS: optimize and fix ELF sectionsDaniel Schwierzeck
Discard ABI related sections which are not required for debugging. Rearrange debug sections similar to Linux. Remove the remaining explicitely specified sections in the unused part because those sections are not created anymore or because the linker puts them by default at the end of the ELF binary. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2019-01-16mips: ocelot: Enable use of serial gpio for LEDLars Povlsen
This enables the use of the MSCC serial GPIO driver to control the LEDs on the MSCC VCoreIII 'ocelot' pcb123 and pcb120. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>