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2018-05-11mmc: Changed the datatype of the variable to handle 64-bit archVipul Kumar
This patch changed the datatype of variable "start" from uint to ulong to work properly on 64-bit machines as well. Also the return type of get_timer() function is ulong. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynqmp: Add ZynqMP minimal R5 supportMichal Simek
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Add bif supportAlexander Graf
The officially described way to generate boot.bin files for ZynqMP is to describe the contents of the target binary using a file of the "bif" format. This file then links to other files that all get packed into a bootable image. This patch adds support to read such a .bif file and generate a respective ZynqMP boot.bin file that can include the normal image and pmu files, but also supports image partitions now. This makes it a handy replacement for the proprietary "bootgen" utility that is currently used to generate boot.bin files with FSBL. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11MAINTAINERS: Declare tools/zynqmp* as Xilinx maintainedAlexander Graf
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by Xilinx for the Zynq platforms. Let's match them accordingly in the MAINTAINERS file. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Move defines to headerAlexander Graf
We will add support for ZynqMP bif input files later, so let's move all structure definitions into a header file that can be used by that one as well. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Add partition read supportAlexander Graf
The zynqmp image format has support for inline partitions which are used by FSBL to describe payloads that are loaded by FSBL itself. While we can't create images that contain partitions (yet), we should still at least be able to examine them and show the user what's inside when we analyze an image created by bootgen. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Show model information instead of custom IDENT_STRINGMichal Simek
DISPLAY_BOARDINFO in OF case show model identification string from DT. Enable this feature instead of custom IDENT_STRING which does the same thing. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11arm64: zynqmp: Simplify boot_target variable compositionMichal Simek
Call calloc for space allocation only at one location and include if/else to sprintf. This will simplify run time device adding based on id aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11arm64: zynqmp: Setup MMU map for DDR at run timeNitin Jain
This patch fills the MMU map for DDR at run time based on information read from Device Tree or automatically detected from static configuration. The patch is needed because for systems which has for example 1GB of memory but MMU map is 2GB there could be spurious accesses which was seen in past when mapping is not fitting with actual memory installed. Signed-off-by: Nitin Jain <nitin.jain@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Enable cadence WDT for zcu100Michal Simek
Enable watchdog on zcu100 to make sure if there is a bug in the u-boot there is proper reset. Watchdog expires and PMU fw is informed and based on setting proper action is taken. The patch is enabling reset-on-timeout feature and also fixing fixed clock rate for watchdog where 100MHz is max (and also default) clock value. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Wire watchdog internalsMichal Simek
Enable watchdog in full U-Boot. Similar changes were done by: "arm: zynq: Wire watchdog internals" (sha1: e6cc3b25d721c3001019f8b44bfaae2a57255162) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11watchdog: cadence: Show used timeout valueMichal Simek
Debug message was showing timeout value which was passed to start function but there is a checking if this value can be setup. The patch is moving this debug printf function below checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Reset FPD Watchdog on zcu100Michal Simek
Low level configuration didn't reset FPD Watchdog that's why accessing it caused u-boot hang. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11nand: zynq: Send address cycles as per onfi parameter pageSiva Durga Prasad Paladugu
Send address cycles as per value read from onfi parameter page for Read and write commands instead of using a hard coded value. This may vary for different parts and hence use it from onfi parameter page value. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11nand: zynq: Add support for 16-bit buswidthSiva Durga Prasad Paladugu
This patch adds support for 16-bit buswidth by determining the bus width based on mio configuration. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11MAINTAINERS: zynqmp: Point to proper zynqmp folderMichal Simek
Point to Zynqmp arm64 cpu folder not to Zynq arm32. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11serial: zynq: Remove header depedency on arm header structureMichal Simek
There is no need to have arm hardware header in this driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11timer: Add Cadence TTC timer counter supportMichal Simek
This driver was tested on Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11microblaze: Dont enable UBI support by defaultSiva Durga Prasad Paladugu
This patch removes UBI support from defconfig and it can be enabled from menuconfig as per need. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Add new defconfig for zc1275 revBSiva Durga Prasad Paladugu
This patch enables support zc1275 revB board. It has SD added compared to revA. The same configuration will work for RevC boards aswell. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSIMichal Simek
In v2018 the patch "dm: ahci: Correct uclass private data" (sha1: bfc1c6b4838501d10aa48c0e92eaf70976f4b2dd) was causing an issue for ceva_sata. But this issue is not in v2018.05-rc1 but still converting to UCLASS_AHCI would make more sense. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Remove checkboard and enable DISPLAY_CPUINFOMichal Simek
Now that showing silicon version is part of the CPU info display, let's remove checkboard(). Note that the generic show_board_info() will still show the DT 'model' property. For instance: U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200) CPU: Zynq 7z045 Silicon: v1.0 Model: Zynq ZC706 Development Board I2C: ready Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>, and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> mini configuration doesn't need to show this information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Rework FPGA initializationMichal Simek
This commit moves the FPGA descriptor definition to mach-zynq, where it makes more sense. Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar> and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Enable debug_uart_init in spl when enabledMichal Simek
In past this code was commented and was used for debug purpose. But there is no reason not to enabled it based on macros. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-10Merge git://git.denx.de/u-boot-ubiTom Rini
2018-05-09Merge git://git.denx.de/u-boot-sunxiTom Rini
2018-05-09ubifs: avoid assert failed in ubifs.cPatrice Chotard
This patch solves assert failed displayed in the console during a boot. The root cause is that the ubifs_inode is not already allocated when ubifs_printdir and ubifs_finddir functions are called. Trace showing the issue: feed 'boot.scr.uimg', ino 94, new f_pos 0x17b40ece dent->ch.sqnum '7132', creat_sqnum 3886945402880 UBIFS assert failed in ubifs_finddir at 436 INODE ALLOCATION: creat_sqnum '7129' Found U-Boot script /boot.scr.uimg Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08bootm.c: Correct the flush_len used in bootm_load_os()Tom Rini
In do_bootm_states when doing BOOTM_STATE_LOADOS we use load_end uninitialized and Coverity notes this now. This however leads down another interesting path. We pass this pointer to bootm_load_os and that in turn uses this uninitialized value immediately to calculate the flush length, and is wrong. We do not know what load_end will be until after bootm_decomp_image is called, so we must only set flush_len after that. All of this also makes it clear that the only reason we pass a pointer for load_end to bootm_load_os is so that we can call lmb_reserve on success. Rather than initialize load_end to 0 in do_bootm_states we can just call lmb_reserve ourself. Reported-by: Coverity (CID: 175572) Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08image: fit: Show signatures and hashes for configurationsClément Péron
The signature/hash information are displayed for images but nor for configurations. Add subnodes printing in fit_conf_print() like it's done in fit_image_print() Signed-off-by: Clément Péron <peron.clem@gmail.com> [trini: Add guards around fit_conf_print to avoid warnings] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08arm: bitops: fix find_next_zero_bit() for case size < 32Grygorii Strashko
find_next_zero_bit() incorrectly handles cases when: - total bitmap size < 32 - rest of bits to process static inline int find_next_zero_bit(void *addr, int size, int offset) { unsigned long *p = ((unsigned long *)addr) + (offset >> 5); unsigned long result = offset & ~31UL; unsigned long tmp; if (offset >= size) return size; size -= result; offset &= 31UL; if (offset) { tmp = *(p++); tmp |= ~0UL >> (32-offset); if (size < 32) [1] goto found_first; if (~tmp) goto found_middle; size -= 32; result += 32; } while (size & ~31UL) { tmp = *(p++); if (~tmp) goto found_middle; result += 32; size -= 32; } [2] if (!size) return result; tmp = *p; found_first: [3] tmp |= ~0UL >> size; ^^^ algo can reach above line from from points: [1] offset > 0 and size < 32, tmp[offset-1..0] bits set to 1 [2] size < 32 - rest of bits to process in both cases bits to search are tmp[size-1..0], but line [3] will simply set all tmp[31-size..0] bits to 1 and ffz(tmp) below will fail. example: bitmap size = 16, offset = 0, bitmap is empty. code will go through the point [2], tmp = 0x0 after line [3] => tmp = 0xFFFF and ffz(tmp) will return 16. found_middle: return result + ffz(tmp); } Fix it by correctly seting tmp[31..size] bits to 1 in the above case [3]. Fixes: 81e9fe5a2988 ("arm: implement find_next_zero_bit function") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-05-08cmd: add ADC cli commandsNeil Armstrong
Add an 'adc' cli command to get information from adc devices and to read "single shot" data. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08pci: Don't use pci_indirect when DM is activeMario Six
Declaration of indirect PCI bridges is not compatible with DM: Both define PCI operations, but in different ways. Hence, don't use indirect bridges if DM is active. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08gdsys: drivers: Add gdsys_rxaui_ctrl driverMario Six
Add a driver for RXAUI control on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08clk: Add ICS8N3QV01 driverMario Six
Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08ihs_mdio: Make DM-compatibleMario Six
Make the ihs_mdio driver DM-compatible, while retaining the old functionality for not-yet-converted boards. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08ihs_mdio: Encapsulate register accessMario Six
To prepare for DM conversion, encapsulate all register accesses in function calls. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08db410c: set clk node to be probed before relocationRamon Fried
The clock node is used by the serial driver and it's needed before relocation. This patch ensures that the msm-serial driver can actually use the clock node. Signed-off-by: Ramon Fried <ramon.fried@linaro.org>
2018-05-08ARM: dts: sti: Add stih410-b2260-u-boot.dtsiPatrice Chotard
STiH410 has 2 PHYs wired on the DWC3 IP, USB2 and USB3 PHYs. As currently no U-boot driver is available for the USB3 PHY and to avoid issue during DWC3 drive probe, we use DWC3 IP with only USB2 PHY using stih410-b2260-u-boot.dtsi file. Fixes: 2fd4242cc50e ("ubs: xhci-dwc3: Enable USB3 PHY when available") Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08arm: ti: boot: Extract PARTS_DEFAULT to boot.hSam Protsenko
Eliminate code duplication: the same PARTS_DEFAULT was defined in am57xx_evm.h and in dra7xx_evm.h. Extract it to environment/boot.h and use in all OMAP5-based boards. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-05-08Merge git://git.denx.de/u-boot-mmcTom Rini
2018-05-08Merge git://git.denx.de/u-boot-uniphierTom Rini
2018-05-08lib/Kconfig: Mark OF_LIBFDT_OVERLAY as depending on OF_LIBFDTTom Rini
The overlay code is only useful when OF_LIBFDT is set, so mark it as depending on that first. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08adc: add Amlogic Meson SAR ADC driverNeil Armstrong
This patch adds the driver for the Amlogic Meson Successive Approximation Register (SAR) A/D Converter based on the Linux IIO driver thanks to the great work of Martin Blumenstingl. The driver has been adapted to U-Boot and the ADC UClass. This patch depends on the regmap "regmap: add regmap_update_bits() helper" patch and has been tested using the newly introducted "adc" CLI command in the "cmd: add ADC cli commands" patch. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08test: regmap: add read/modify/write testNeil Armstrong
Add calls to regmap_read/modify_bits/write even if the proper memory read/write calls are not executed in sandbox. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08regmap: add regmap_update_bits() helperNeil Armstrong
Add the regmap_update_bits() to simply the read/modify/write of registers in a single command. The function is taken from Linux regmap implementation. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08ARM: dts: stm32mp157: Add vrefbuf DT nodePatrice Chotard
Add vrefbuf device tree node. This allows to get a voltage reference for ADCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08configs: stm32mp15: Enable STM32_VREFBUF flagFabrice Gasnier
Enable vrefbuf on stm32mp15, to be used by ADC. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08clk: stm32mp1: Add VREF clock gatingFabrice Gasnier
Add VREF clock gating, that may be used by STM32 VREFBUF regulator. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08power: regulator: Add support for stm32-vrefbufFabrice Gasnier
Add regulator driver for STM32 voltage reference buffer which can be used as voltage reference for ADCs, DACs and external components through dedicated VREF+ pin. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08configs: stm32mp15_basic: Set regulator relative flagsPatrice Chotard
Enable DM_REGULATOR_STPMU1 flag to activate regulator driver for STM32MP15 SoC and CMD_REGULATOR flag to be able to set/get regulator state int U-boot command line. Disable PMIC_CHILDREN as this flag is not needed in SPL for STM32MP1. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>