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It turns out that the device_mode_data is rsb specific, rather then slave
specific, so integrate the rsb_set_device_mode() call into rsb_init().
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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CONFIG_TARGET_FOO was only used in board/sunxi/Makefile to select the
dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some
special handling of the bananapi/bananapro (both sun7i), all sun5i and sun7i
boards have been moved over to using a single dram_sun5i_autoconfig file,
and the tx clk delay handling for the Banana boards now has its own Kconfig.
IOW nothing is using CONFIG_TARGET_FOO anymore, so remove it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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And use this to set the GMAC Transmit Clock Delay Chain value on Banana
boards, rather then keying of CONFIG_TARGET_FOO.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Currently we've separate detailed dram settings for all sun5i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.
This has been tested on a A10s-Olinuxino, A13-Olinuxino, A13-OlinuxinoM,
mk802-a10s and r7-tv-dongle board.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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USB1_VBUS is not used, and USB2_VBUS uses the pin normally used to control
USB1_VBUS.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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We do not need i2c support in the SPL when there is no PMIC (some sun4i
boards), or when the PMIC is not using i2c such as on sun6i and sun8i.
This reduces the SPL size from (e.g.) 21812 to 19260 bytes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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This commit 904672e (lcd: refactor lcd console stuff into its
own file), which cause lcd console address is not initialized.
This patch initialize the lcd console use the default value,
will be update when splash screen is enabled.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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When build for Atmel related boards which support SPL,
it will generate boot.bin, also clean when it when do
"make clean" operation.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Microblaze currently doesn't use printf in SPL. So this one line was the only
reference to it and resulted in the printf functionality to be pulled in.
Exceeding the 4k size limit. Lets change the printf back to puts so that
Microblaze is fixed again. The only drawback is that the detected boot-device
number will not be printed. But this message alone should be helpful enough
to get an idea where the boot process is broken.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
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This information help with debugging issues with uart.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This change enables to change baudrate on command line.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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updated the zynq config to support the lthor
download protocol.
This lthor functionality helps us to load linux
images on to DDR/MMC and can boot linux using bootm.
In order to load images the user should run lthor
command run "thor_ram" from u-boot prompt and
then send the images from host using lthor utility.
Define g_dnl_bind_fixup for zynq so that correct vendor
and product ids assigned incase of DFU and lthor.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable DFU functionality in zynq.
This DFU functionality helps us to load linux
images on to DDR and can boot linux using bootm.
In order to load images the user should run dfu
command "dfu 0 ram 0" from u-boot prompt and then
send the images from host.
The malloc size has been increased to match the DFU
buffer requirements.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Dont send always emio value as zero for zynq_gem_initialize
send it based on config.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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No functional chagnes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Based on:
"am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env"
(sha1: 73a27a84e58cb99b4e64ed6a35eab5bc61f44f29)
Fix filesystem specific commands for loading.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Show board information in bootlog and enable it by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add missing addresses to the list.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Use full boot mode list in SPL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Set only the 0-3 bits of the FPGA_RST_CTRL register
as other bits should not be set to 1.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Added the lowlevel_init to enable the Neon instructions.
Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.
Also enable neon instructions for non-xilinx toolchain.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Refresh for newer kernel.
Prepare ENV settings for sheevaplugs to be OpenWRT ready.
+----------+
| UBOOT | >> 896 Kb (7x128) = uboot
+----------+
| ENV | >> 128 Kb = uboot_env
+----------+
| ROOT(FS) | >> 511 Mb @ 1 Mb = root -> rootfs (ubifs)
+----------+
With (CC) TRUNK OpenWRT build (QUICK HOWTO) :
<INTERRUPT>
Marvell>> nand erase.part root
Marvell>> ubi part root
Marvell>> ubi remove rootfs
Marvell>> ubi create rootfs
Marvell>> usb reset
Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs
Marvell>> ubi write 0x800000 rootfs ${filesize}
Marvell>> reset
Changes in v1:
- ADD generic board define
- ADD FDT support
- ADD HUSH interpreter
- Define new NAND partition mapping
Signed-off-by: Gerald Kerma <dreagle@doukki.net>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Stefan Roese <sr@denx.de>
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Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:
mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function)
u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;
This patch fixes above described problem.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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When diffing through the changes only the relevant changes
should be displayed.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
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Add deep sleep support on Freescale LS1021QDS platform.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
[York Sun: Fix conflict in fdt.c]
Reviewed-by: York Sun <yorksun@freescale.com>
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Enable an environment area.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This is now stored in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a hook to ensure that this information is saved.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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All memory to be reserved for use after relocation by adding a new call
to perform this reservation.
Signed-off-by: Simon Glass <sjg@chromium.org>
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As a temporary measure before the ICH driver moves over to driver model,
add device tree support to the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
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On x86 we use CMOS RAM to read and write some settings. Add basic support
for this, including access to registers 128-255.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The existing IP checksum function is only accessible to the 'coreboot' cpu.
Drop it in favour of the new code in the network subsystem.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add this to the enum so that we can use the various fdtdec functions. A
later commit will move this driver to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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