Age | Commit message (Collapse) | Author |
|
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.
So update acessor functions with common SEC acessor functions to take care
both type of endianness.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|
Freescale SEC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
SEC to common include
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|
U-boot binary size has been increased from 512KB to 768KB.
So update CONFIG_RESET_VECTOR_ADDRESS to reflect the same for
P1010 SPI Flash Secure boot target.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Modified subject to P1010RDB]
Reviewed-by: York Sun <yorksun@freescale.com>
|
|
The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
|
|
- fix debug pixel clk display and add unit
- fix some comments
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
|
|
Add a block to avoid a build error with the variable declaration.
Enable the option on sandbox to prevent an error being introduced in
future.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Signed-off-by: Tom Rini <trini@ti.com>
|
|
Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
|
With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).
Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
'u-boot-arm/master'
|
|
|
|
The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
|
|
Add MAINTAINERS entry.
Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
|
|
Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include <sys/endian.h> for FreeBSD.
Cc: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
|
|
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
|
|
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
|
|
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
|
|
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Bo Shen <voice.shen@atmel.com>
|
|
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
|
Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
|
|
The K2HK and K2E boards support SPL by default, so add
CONFIG_SPL option. Also export CONFIG_ARM, CONFIG_ARCH_KEYSTONE
and TARGET_K2*_EVM options to spl/.config as they are the same.
So now it's convinient to build gph images using only two commands:
make k2hk_evm_defconfig
make u-boot-spi.gph
Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
|
|
|
|
We need to set the 'BE' flag here for things to work right.
Signed-off-by: Tom Rini <trini@ti.com>
|
|
Since on powerpc phys_size_t can be unsigned long long, this printout
line can result in a not nice compile warning.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: Tom Rini <trini@ti.com>
|
|
Fix the spelling of "configs".
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
A SPL/TPL enabled target would was not recognized as
such by BSD sed, since it relies on a GNU extension.
Instead of or-ing just spell out both matches.
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
remove the seldomly used EXT2 support because the U-Boot binary will
not fit into the 512KiB flash otherwise.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
|
|
fix broken SPI access by adding/activating BOARD_EARLY_INIT_F
functionality and calling spi_init_f() from there.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
|
|
Signed-off-by: David Müller <d.mueller@elsoft.ch>
|
|
Signed-off-by: David Müller <d.mueller@elsoft.ch>
|
|
Signed-off-by: David Müller <d.mueller@elsoft.ch>
|
|
Signed-off-by: David Müller <d.mueller@elsoft.ch>
|
|
A number of network related files were imported from the LiMon
project; these contain a somewhat unclear license statement:
Copyright 1994 - 2000 Neil Russell.
(See License)
I analyzed the source code of LiMon v1.4.2 which was used for this
import. It does not contain any "License" file, but the top level
directory contains a file "COPYING", which turns out to be GPL v2
of June 1991. So it is legitimate to conclude that the LiMon derived
files are also to be released under GPLv2. Mark them as such.
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
Fix typo of commit d4e53f063dd25e071444b87303573e7440deeb89.
i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1.
It's value after reset is 0x00100001.
In order to clear bit 0, original code write 0xfffffffe to
CONTROL_PROG_IO1 and toggle almost all default values.
Original code affect following:
* disable i2c1 pullup resisters
* increase far end load setting for many modules
* setup invalid SC/LB combination
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Steve Kipisz <s-kipisz2@ti.com>
|
|
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
This board has been orphaned for more than 6 months.
It is the last board defining CONFIG_APM821XX.
The code inside #ifdef CONFIG_APM821XX should be removed too.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
This board has been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
|
In some cases, the last lines of SPL or TPL are not output to a file.
The entries remaining in the "unmatched" variable must be flushed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
The definitions for div ratio supposed to be in hex and were added
in dec by mistake.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
|
|
At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
|
|
scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().
Signed-off-by: Roger Quadros <rogerq@ti.com>
|
|
On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().
Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.
Signed-off-by: Roger Quadros <rogerq@ti.com>
|
|
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)
This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358()
44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access
Signed-off-by: Roger Quadros <rogerq@ti.com>
|