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2019-07-31mmc: mtk-sd: add WATCHDOG_RESET() to prevent watchdog timeoutWeijie Gao
When reading large data in once (reading 512MiB is tested on MT7623), a watchdog timeout is triggered due to watchdog not being fed. This patch adds WATCHDOG_RESET() to msdc_start_data() so the watchdog will be fed every 1024 blocks are read/written. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-07-31mmc: sdhci: fix chip detect gpio property nameBaruch Siach
The standard property name for chip-detect gpio is "cd-gpios". All in-tree DT files use only this name. Fixes: 451931ea700 ("mmc: sdhci: Read cd-gpio from devicetree") Cc: T Karthik Reddy <t.karthik.reddy@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-31mmc: mv_sdhci: fix uninitialized pointer deref on probeBaruch Siach
Since commit 3d296365e4e8 ("mmc: sdhci: Add support for sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc field. Move the mmc field initialization before sdhci_setup_cfg() call to avoid crash on mmc pointer dereference. Fixes: 3d296365e4e8 ("mmc: sdhci: Add support for sdhci-caps-mask") Cc: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2019-07-31test/py: add MMC/SD block write testJean-Jacques Hiblot
Add a standalone MMC block write test. This allows direct testing of MMC access rather than relying on doing so as a side-effect of e.g. DFU or UMS testing, which may not be enabled on all platforms. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2019-07-31test: dm: clk_ccf: test composite clkPeng Fan
Test composite clk with dm ccf Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: sandbox: add composite clkPeng Fan
Add composite clk to sandbox driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31configs: sandbox: Enable composite clkPeng Fan
Enable composite clk for sandbox test Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: gate: support sandboxPeng Fan
Introduce io_gate_val for sandbox clk gate test usage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: add composite clk supportPeng Fan
Import clk composite clk support from Linux Kernel 5.1-rc5 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk-provider: include clk-uclass.hPeng Fan
Because clk-provider use clk_ops, so let's include clk-uclass.h Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31dm: clk: ignore default settings when node not validPeng Fan
When the device not binded with a node, we need ignore the parents and rate settings. Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: imx: gate2 add set ratePeng Fan
Add set rate for imx clk-gate2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: imx: import clk heplersPeng Fan
Import some clk helpers from Linux Kernel for i.MX8MM usage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: fixed_rate: export clk_fixed_ratePeng Fan
Export the structure for others to use. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: divider set rate supporrtPeng Fan
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: add clk-gate supportPeng Fan
Import clk-gate support from Linux Kernel 5.1-rc5 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: export mux/divider opsPeng Fan
Export mux/divider ops and divider_recalc_rate for composite usage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: mux: add set parent supportPeng Fan
Add set parent support for clk mux Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: use clk_dev_bindedPeng Fan
Preparing to support composite clk. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31clk: introduce clk_dev_bindedPeng Fan
When support Clock Common Framework, U-Boot use dev for clk tree information, there is no clk->parent. When support composite clk, it contains mux/gate/divider, but the mux/gate/divider is not binded with device. So we could not use dev_get_uclass_priv to get the correct clk_mux/gate/divider. So add clk_dev_binded to let choose the correct method. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-31dw_mmc: turn on the IO supplyUrja Rannikko
Fixes the microSD slot on the ASUS C201. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com<mailto:peng.fan@nxp.com>>
2019-07-30Merge tag 'video-for-2019.10-rc1' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix EDID mode filtering - extend mxc_ipuv3_fb to enable backlight/display - include fb_base in global_data for DM_VIDEO - show frame buffer address via board info as used to be with legacy VIDEO support
2019-07-30Merge tag 'xilinx-for-v2019.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2019.10 fpga: - Xilinx virtex2 cleanup - Altera cyclon2 cleanup zynq: - Minor Kconfig cleanup - Add psu_init configuration for Z-turn board zynqmp: - Add support for pmufw config passing to PMU - script for psu_init conversion - zcu1275 renaming xilinx: - Add support for UltraZed-EV SoM
2019-07-30Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2019-07-30efi_selftest: sharpen ConvertPointer() testHeinrich Schuchardt
Now that ConvertPointer() is implemented throw an error if the result is incorrect. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30efi_loader: implement ConvertPointer()Heinrich Schuchardt
Implement the ConvertPointer() runtime service. Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30efi_loader: definition of efi_virtual_address_map()Heinrich Schuchardt
Use efi_uintn_t where the UEFI spec uses UINTN. Use efi_uintn_t also for the result of the division of two efi_uintn_t. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30efi_selftest: fix SetVirtualAddressMap unit testHeinrich Schuchardt
We read the address map before assigning the memory for the pages that will be mapped to virtual addresses. So these pages will overlap with the entry for EFI_CONVENTIONAL_MEMORY. We have to ensure that every page is described at most once in the map. Remove EFI_CONVENTIONAL_MEMORY from the map that we pass to SetVirtualAddressMap(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30doc: integrate UEFI documentation into Sphinx toctreeHeinrich Schuchardt
Change the UEFI documentation to Sphinx style and integrate it into the rest of the Sphinx generated documentation. Remove the inaccurate TODO list in doc/uefi/uefi.rst. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30efi_loader: efidebug.c function documentationHeinrich Schuchardt
make htmldocs produces a warning: ./cmd/efidebug.c:733: WARNING: Unexpected indentation. Correct the indentation. Remove 'See above for details of sub-commands.' which is not helpful in the Sphinx generated documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30efi_loader: always rebuild efi_crt0.oHeinrich Schuchardt
When changing the architecture without calling 'make clean' a subsequent make fails with lib/efi_loader/efi_crt0.o: file not recognized: File format not recognized Force efi_crt0.o to be always rebuild. Reported-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30efi_loader: re-enable GRUB workaround on 32bit ARMHeinrich Schuchardt
GRUB on ARM 32bit prior to version 2.04 lacks proper handling of caches. In U-Boot v2019.04 a workaround for this was inadvertently removed. The workaround is currently also needed for booting on systems with caches that cannot be managed via CP15 (e.g. with an i.MX6 CPU). Re-enable the workaround and make it customizable. Fixes: f69d63fae281 ("efi_loader: use efi_start_image() for bootefi") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-30arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabledMichal Simek
xilinx_zynqmp_mini configuration is throwing build error: readlink: missing operand Try 'readlink --help' for more information. because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and Makefile pass ifneq condition. Add SPL_BUILD dependency which is also reflected in Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30mxc_ipuv3_fb.c: enable a backlight on a panelHeiko Schocher
check if we get a panel device, if so, enable the backlight on it. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30mxc_ipuv3_fb.c: call display_enableHeiko Schocher
call display_enable, so a display gets enabled. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30bdinfo: show fb base with DM_VIDEOHeiko Schocher
show Framebuffer base with CONFIG_DM_VIDEO enabled. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30mxc_ipuv3_fb.c: set gd->fb_baseHeiko Schocher
set gd->fb_base so it can be shown with bdinfo command. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30global_data: enable fb_base for DM_VIDEOHeiko Schocher
with CONFIG_VIDEO we store fb base address in global data fb_base variable. Do this also in DM_VIDEO case. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-30cmd: fpga: Change return value to avoid printing usage textAlexander Dahl
In cmd/fpga.c the commands should return enum command_ret_t, e.g. CMD_RET_USAGE, CMD_RET_SUCCESS, or CMD_RET_FAILURE. What they actually do is passing a return value from different 'fpga_' functions. Passing on a return value of -1 from a called function leads to printing out usage text. In case of actually correct usage with correctly specified parameters but some fail at runtime printing out that usage text is distracting. The reason is most 'fpga_' functions return either FPGA_SUCCESS or FPGA_FAIL, the latter was equal to -1 which is the same value as CMD_RET_USAGE. So just passing on FPGA_FAIL lead to printing out usage. We should only return CMD_RET_USAGE in cases, where the user sent wrong input. Every other case should return CMD_RET_SUCCESS or CMD_RET_FAILURE, and not simply pass an error code. Simply changing FPGA_FAIL from -1 to 1 gets the job done. Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30fpga: altera: cyclon2: Check function pointer before callingAlexander Dahl
As already done for the 'pre' function, a check is added to not follow a NULL pointer, if somebody has not assigned a 'post' function. Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30fpga: altera: cyclon2: Fix indentationAlexander Dahl
Some code parts stood too far left … Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30fpga: altera: cyclon2: Fix most checkpatch warningsAlexander Dahl
Nothing special, but done before further cleanup. * spacing * braces * __FUNCTION__ → __func__ Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30fpga: altera: Add some more device sizesAlexander Dahl
There seems to be only one place, where this is checked against: `altera_validate()`. It should be non zero. Otherwise it is only used to display it, so it probably does not really matter at the moment. But we had the datasheet open anyway … Sizes in datasheet are bit counts, display here is in bytes. Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-07-30arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EVLuca Ceresoli
The board was added without adding a MAINTAINERS entry. Fixes: $ ./tools/genboardscfg.py -f WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0' WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0' $ Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30fpga: virtex2: Add slave serial programming supportRobert Hancock
This adds support for slave serial programming, in addition to the previously supported slave SelectMAP mode. There are two ways that this can be used: -Using the clk and wdata callbacks in order to write image data one bit at a time using pure bit-banging. This works, but is rather painfully slow with typical image sizes. -By specifying the wbulkdata callback instead, the image loading process can be offloaded to SPI hardware. In this mode the clk and wdata callbacks do not need to be specified. This allows the image to be loaded much faster, taking only a few seconds with even relatively large images. Slave serial programming has been tested on the Kintex-7 series of FPGAs. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30fpga: virtex2: Add additional clock cycles after DONE assertionRobert Hancock
Some Xilinx FPGA configuration options can result in the startup sequence extending past the end of the FPGA bitstream. Continue applying CCLK clock cycles for 8 cycles after DONE is asserted in order to ensure the startup sequence is complete, as recommended by Xilinx. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30fpga: virtex2: Split out image writing from pre/post operationsRobert Hancock
This is in preparation for adding slave serial programming support, which uses the same pre/post operations as slave SelectMAP, to avoid duplicating code. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30fpga: virtex2: added Kconfig optionRobert Hancock
Add an option to allow this driver to be selected with Kconfig. As noted in the description, this driver should also work with many newer Xilinx FPGA families as the programming methods are essentially the same. Also added a missing FPGA_XILINX dependency to the similar Spartan 3 driver. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30fpga: virtex2: cosmetic: Cleanup code styleRobert Hancock
Address Checkpatch warnings in virtex2 code prior to making other changes. No functional change intended. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30arm64: zynqmp: add support for Avnet UltraZed-EV Starter KitLuca Ceresoli
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the only publicly-available compatible carrier card. The SoM is based on the EV version of the Xilinx ZynqMP SoC+FPGA. The psu_init_gpl.c file has been generated from the board definition files at [0] using Vivado 2018.3 and then minimized by tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since it is not mentioned in device tree and fixed a checkpatch error. [0] https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/ultrazed_7ev_cc/1.1 Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2024-12-29 14:09:59 +0000