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2018-05-11MAINTAINERS: Declare tools/zynqmp* as Xilinx maintainedAlexander Graf
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by Xilinx for the Zynq platforms. Let's match them accordingly in the MAINTAINERS file. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Move defines to headerAlexander Graf
We will add support for ZynqMP bif input files later, so let's move all structure definitions into a header file that can be used by that one as well. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11tools: zynqmpimage: Add partition read supportAlexander Graf
The zynqmp image format has support for inline partitions which are used by FSBL to describe payloads that are loaded by FSBL itself. While we can't create images that contain partitions (yet), we should still at least be able to examine them and show the user what's inside when we analyze an image created by bootgen. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Show model information instead of custom IDENT_STRINGMichal Simek
DISPLAY_BOARDINFO in OF case show model identification string from DT. Enable this feature instead of custom IDENT_STRING which does the same thing. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11arm64: zynqmp: Simplify boot_target variable compositionMichal Simek
Call calloc for space allocation only at one location and include if/else to sprintf. This will simplify run time device adding based on id aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11arm64: zynqmp: Setup MMU map for DDR at run timeNitin Jain
This patch fills the MMU map for DDR at run time based on information read from Device Tree or automatically detected from static configuration. The patch is needed because for systems which has for example 1GB of memory but MMU map is 2GB there could be spurious accesses which was seen in past when mapping is not fitting with actual memory installed. Signed-off-by: Nitin Jain <nitin.jain@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Enable cadence WDT for zcu100Michal Simek
Enable watchdog on zcu100 to make sure if there is a bug in the u-boot there is proper reset. Watchdog expires and PMU fw is informed and based on setting proper action is taken. The patch is enabling reset-on-timeout feature and also fixing fixed clock rate for watchdog where 100MHz is max (and also default) clock value. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Wire watchdog internalsMichal Simek
Enable watchdog in full U-Boot. Similar changes were done by: "arm: zynq: Wire watchdog internals" (sha1: e6cc3b25d721c3001019f8b44bfaae2a57255162) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11watchdog: cadence: Show used timeout valueMichal Simek
Debug message was showing timeout value which was passed to start function but there is a checking if this value can be setup. The patch is moving this debug printf function below checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Reset FPD Watchdog on zcu100Michal Simek
Low level configuration didn't reset FPD Watchdog that's why accessing it caused u-boot hang. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11nand: zynq: Send address cycles as per onfi parameter pageSiva Durga Prasad Paladugu
Send address cycles as per value read from onfi parameter page for Read and write commands instead of using a hard coded value. This may vary for different parts and hence use it from onfi parameter page value. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11nand: zynq: Add support for 16-bit buswidthSiva Durga Prasad Paladugu
This patch adds support for 16-bit buswidth by determining the bus width based on mio configuration. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11MAINTAINERS: zynqmp: Point to proper zynqmp folderMichal Simek
Point to Zynqmp arm64 cpu folder not to Zynq arm32. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11serial: zynq: Remove header depedency on arm header structureMichal Simek
There is no need to have arm hardware header in this driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11timer: Add Cadence TTC timer counter supportMichal Simek
This driver was tested on Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11microblaze: Dont enable UBI support by defaultSiva Durga Prasad Paladugu
This patch removes UBI support from defconfig and it can be enabled from menuconfig as per need. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm64: zynqmp: Add new defconfig for zc1275 revBSiva Durga Prasad Paladugu
This patch enables support zc1275 revB board. It has SD added compared to revA. The same configuration will work for RevC boards aswell. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSIMichal Simek
In v2018 the patch "dm: ahci: Correct uclass private data" (sha1: bfc1c6b4838501d10aa48c0e92eaf70976f4b2dd) was causing an issue for ceva_sata. But this issue is not in v2018.05-rc1 but still converting to UCLASS_AHCI would make more sense. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Remove checkboard and enable DISPLAY_CPUINFOMichal Simek
Now that showing silicon version is part of the CPU info display, let's remove checkboard(). Note that the generic show_board_info() will still show the DT 'model' property. For instance: U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200) CPU: Zynq 7z045 Silicon: v1.0 Model: Zynq ZC706 Development Board I2C: ready Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>, and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> mini configuration doesn't need to show this information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Rework FPGA initializationMichal Simek
This commit moves the FPGA descriptor definition to mach-zynq, where it makes more sense. Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar> and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11arm: zynq: Enable debug_uart_init in spl when enabledMichal Simek
In past this code was commented and was used for debug purpose. But there is no reason not to enabled it based on macros. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-10Merge git://git.denx.de/u-boot-socfpgaTom Rini
2018-05-10SPDX: Convert a few files that were missed beforeTom Rini
As part of the main conversion a few files were missed. These files had additional whitespace after the '*' and before the SPDX tag and my previous regex was too strict. This time I did a grep for all SPDX tags and then filtered out anything that matched the correct styles. Fixes: 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style") Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10tools/file2include: avoid incorrect commentsHeinrich Schuchardt
Avoid creating incorrect comments like /* ...*/... */ by printing '.' instead of '*' inside comments. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10include: update log2 header from the Linux kernelHeinrich Schuchardt
Without the patch gcc 8 produces: warning: ignoring attribute ‘noreturn’ because it conflicts with attribute ‘const’ [-Wattributes] int ____ilog2_NaN(void); So let's update the include from Linux kernel v4.16. This removes static checks of ilog2() arguments. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10xyz-modem: va_start() must be matched by va_end()Heinrich Schuchardt
Every va_start() call must be matched by a va_end() call. scripts/checkpatch.pl required reformatting the complete function zm_dprintf(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-10tools/file2include: create Linux style SPDX headerHeinrich Schuchardt
file2include is used to convert a binary file to a C include. With the patch the SPDX header is written to the first line as expected by scripts/checkpatch.pl. Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-10bootm: fix 'memory-fixup' for vxWorks bootHannes Schmelzer
The check for having a memory node within the fdt blob is made wrong, we fix this here. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-10Fix Ymodem build when DEBUG and CONFIG_USE_TINY_PRINTF are selectedAlex Kiernan
Attempting to build with both DEBUG and CONFIG_USE_TINY_PRINTF along with CONFIG_SPL_YMODEM_SUPPORT fails at link time: common/built-in.o: In function `zm_dprintf': common/xyzModem.c:190: undefined reference to `vsprintf' Disable Ymodem debug if we don't have full vsprintf support. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-10board/freescale: Remove invalid fsl email addressesFabio Estevam
These fsl email addresses are no longer valid and they do not have a correspondent nxp.com entry. Remove all invalid fsl email addresses and mark the boards as orphan. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-10p1022ds: Change Timur's email addressFabio Estevam
timur@freescale.com is not a valid email for quite some time, so change it to Timur's updated email. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Timur Tabi <timur@tabi.org>
2018-05-10bootcount: display5: config: Enable boot count feature in the display5 boardLukasz Majewski
The boot count is enabled in both SPL and proper u-boot. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount ↵Lukasz Majewski
checking This patch is necessary for providing basic bootcount checking in the case of using "falcon" boot mode in that board. It forces u-boot proper boot, when we exceed the number of errors. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10bootcount: spl: Extend SPL to support bootcount incrementationLukasz Majewski
This patch adds support for incrementation of the bootcount in SPL. Such feature is necessary when we do want to use this feature with 'falcon' boot mode (which loads OS directly in SPL). Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-10bootcount: Rewrite autoboot to use wrapper functions from bootcount.hLukasz Majewski
The code has been refactored to use common wrappers from bootcount.h header. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10bootcount: Add function wrappers to handle bootcount increment and error ↵Lukasz Majewski
checking Those two functions can be used to provide easy bootcount management. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10bootcount: Add include guards into bootcount.h fileLukasz Majewski
This patch adds missing include guards for bootcount.h file. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10bootcount: spl: Enable bootcount support in SPLLukasz Majewski
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been added to allow drivers/bootcount code re-usage in SPL. This code is necessary to use and setup bootcount in SPL in the case of falcon boot mode. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10apalis_t30: fix optional pcie port reset for reliable pcie operationMarcel Ziswiler
Allow optionally bringing up the Apalis type specific 4 lane PCIe port as well as the PCIe switch as found on the Apalis Evaluation board. In order to avoid violating the PCIe reset timing do this by overriding the tegra_pcie_board_port_reset() function. Note however that both the Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe port are also left disabled in the device tree by default. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10apalis_t30: fix pcie port 0 and 1 pin muxingMarcel Ziswiler
Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe port 1 pin muxing. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10apalis_t30: describe pcie portsMarcel Ziswiler
Add some more comments describing the various PCIe ports available. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10apalis-tk1: fix pcie reset for reliable gigabit ethernet operationMarcel Ziswiler
It turns out that the current PCIe reset implementation in the PCIe board init function is not quite working reliably due to PCIe reset timing violations. Fix this by overriding the tegra_pcie_board_port_reset() function. Also allow optionally bringing up the PCIe switch as found on the Apalis Evaluation board. Note however that the Apalis PCIe port is also left disabled in the device tree by default. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10power: as3722: add as3722_ldo_set_voltage signature to header fileMarcel Ziswiler
Just like the already present as3722_sd_set_voltage() add the currently missing signature of the as3722_ldo_set_voltage() function to its header file. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10pci: tegra: introduce weak tegra_pcie_board_port_reset() functionMarcel Ziswiler
Introduce a weak tegra_pcie_board_port_reset() function by default calling the existing tegra_pcie_port_reset() function. Additionally add a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe port index if required. This allows overriding the PCIe port reset functionality from board specific code as e.g. required for Apalis T30 and Apalis TK1. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10power: as3722: fix ldo_get/set_enable for ldo index bigger than 7Marcel Ziswiler
Fix ldo_get_enable() and ldo_set_enable() functions for LDOs with an index > 7. Turns out there are actually two separate AS3722_LDO_CONTROL registers AS3722_LDO_CONTROL0 and AS3722_LDO_CONTROL1. Actually make use of both. While at it also actually use the enable parameter of the ldo_set_enable() function which now truly allows disabling as opposed to only enabling LDOs. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10apalis-tk1: add missing as3722 gpio0 configurationMarcel Ziswiler
As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module explicitly configure it to high-impedance as well. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10configs: apalis-tk1: fix boot failure using ext4 rootfsSanchayan Maity
Trying to boot from an ext4 rootfs fails due to us defaulting to ext3. While the downstream T20/T30 L4T kernel has issues with ext4 later TK1 L4T should work just fine with it. Hence enable ext4 for sdboot and usbboot on TK1. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10configs: colibri_t20: enable mtdMarcel Ziswiler
Enable CONFIG_MTD as well to make sure UCLASS_MTD is available Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10configs: harmony: enable live tree, mtd and ubiMarcel Ziswiler
U-Boot on Harmony recently got broken by ongoing driver model resp. live tree migration work: U-Boot 2018.03-rc3 (Feb 21 2018 - 15:43:08 +0100) TEGRA20 Model: NVIDIA Tegra20 Harmony evaluation board Board: NVIDIA Harmony DRAM: 1 GiB Video device 'dc@54200000' cannot allocate frame buffer memory -ensure the device is set up before relocation Error binding driver 'tegra_lcd': -28 Some drivers failed to bind Error binding driver 'generic_simple_bus': -28 Some drivers failed to bind initcall sequence 3ffa86d0 failed at call 00121dc0 (err=-28) This commit fixes this by enabling live tree, MTD and UBI for Harmony as well. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10mtd: nand: tegra: convert to driver model and live treeMarcel Ziswiler
The Tegra NAND driver recently got broken by ongoing driver model resp. live tree migration work: NAND: Could not decode nand-flash in device tree Tegra NAND init failed 0 MiB A patch for NAND uclass support was proposed about a year ago: https://patchwork.ozlabs.org/patch/722282/ It was not merged and I do not see on-going work for this. This commit just provides a driver model probe hook to retrieve further configuration from the live device tree. As there is no NAND ulass as of yet (ab)using UCLASS_MTD. Once UCLASS_NAND is supported, it would be possible to migrate to it. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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