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2018-03-13clk: clk_stm32f: Add DSI clock supportPatrice Chotard
DSI clock is available on STM32F769-disco and STM32F469-disco board. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Add set_rate for LTDC clockPatrice Chotard
Implement set_rate() for LTDC clock only, set_rate for other clocks will be added if needed. This is needed by future LTDC driver improvements. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clockPatrice Chotard
Configure SAI PLL configuration to generate LTDC pixel clock on the PLLSAIR output. PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() partPatrice Chotard
Rework the way SDMMC clock get rate is done in a more generic way : _ Add stm32_clk_get_pllsai_rate() which give the PLLSAI indicated output rate. _ Add stm32_clk_get_pllsai_vco_rate() which give the VCO internal rate. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: No more need of 48Mhz from PLL_SAIPatrice Chotard
Initially, 48Mhz for SDIO clock was generated from SAI pll for STM32F469 and STM32F746 SoCs, but this solution was not suitable for STM32F429 SoCs. A generic solution is to used the PLL_Q output as 48Mhz clock for all STM32F SOCs family. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Fix RCC_PLLSAICFGR mask definesPatrice Chotard
Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Fix stm32_clk_get_rate()Patrice Chotard
Wrong parameter was passed to stm32_clk_pll48clk_rate(). sysclk (PLL_p output value) was passed instead of VCO value. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckinPatrick Delaunay
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature. When using an external driver (a voltage switch transceiver), it's advised to select SDMMC_CKIN feedback clock input to sample the received data. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13mmc: stm32: sdmmc2: add hardware flow control supportPatrick Delaunay
The hardware flow control functionality is used to avoid FIFO underrun (TX mode) and overrun (RX mode) errors. The behavior is to stop SDMMC_CK during data transfer and freeze the SDMMC state machines. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13board: stm32: switch to DM STM32 timerPatrice Chotard
Use available DM stm32_timer driver instead of dedicated mach-stm32/stm32fx/timer.c. Remove all defines or files previously used for timer usage in arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx Enable DM STM32_TIMER for STM32F4/F7 and H7. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13ARM: dts: stm32: Add timer support for STM32F7Patrice Chotard
Add missing timer node to enable timer5 for STM32F7 SoCs family Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32h7: Fix prescaler for Domain 3Patrice Chotard
d1cfgr register was used to calculate the domain 3 prescaler value instead of d3cfgr. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32h7: Fix stm32_clk_get_rate() for timerPatrice Chotard
For timer clock, an additional prescaler is used which was not taken into account previously. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Fix stm32_clk_get_rate() for timerPatrice Chotard
For timer clock, an additionnal prescaler is used which was not taken into account previously. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13timer: stm32: Add timer support for STM32 SoCs familyPatrice Chotard
This timer driver is using GPT Timer (General Purpose Timer) available on all STM32 SOCs family. This driver can be used on STM32F4/F7 and H7 SoCs family Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13Merge git://git.denx.de/u-boot-rockchipTom Rini
2018-03-13Merge branch 'next' of git://git.denx.de/u-boot-videoTom Rini
2018-03-13rk3288: vyasa: Add eMMC boot supportJagan Teki
RK3288 Vyasa has eMMC boot support, with JP4 open. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: Add usb otg for rk3288-vyasaJagan Teki
Add usb otg support for rk3288-vyasa, board support usb1 otg power through otg_vbus_drv and naming conversion followed as per schematic. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: Add usb host for rk3288-vyasaJagan Teki
Add usb host support for rk3288-vyasa, board support hub power through phy_pwr_en and usb2 host power through usb2_pwr_en and naming conversion followed as per schematic. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: rk3288-vyasa: defconfig: Enable gmac supportJagan Teki
Enable gmac support for rk3288-vyasa board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: Add gmac support for rk3288-vyasa boardJagan Teki
Sync gmac dts node from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: Add regulators for rk3288-vyasaJagan Teki
Add supporting regulators for rk3288-vyasa board, dc12_vbat is parent regulatorand followed regulators as are child regulators. regulator naming conversion followed as per schematic for better readability and easy for identification. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: rk3288-vyasa: Use vmmc-supply from PMICJagan Teki
rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd, so use the same by renaming vcc33_sd to vcc_sd(as per schematic) and drop explicit regulator definition from root. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: rk3288-vyasa: Remove vdd_log from rk808, DCDC_REG1Jagan Teki
vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so remove the same and update the regulator-name as 'vdd_arm' to sync with existing rk3288 board dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13ARM: dts: rockchip: Sync rk3288-vyasa dts from LinuxJagan Teki
Sync rk3288-vyasa board dts from Linux for proper updates and maintenance - rk3288-vyasa.dts: Similar to Linux dts - rk3288-vyasa-u-boot.dtsi: u-boot dts changes Also updated MAINTAINERS for these dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: add text_offset to kernel_addr_r on aarch64 platformsKlaus Goger
Booting a aarch64 Linux kernel requires the image to be placed text_offset bytes from a 2MB aligned address. See https://www.kernel.org/doc/Documentation/arm64/booting.txt booti_setup() takes care about this alignment and will relocate the image if not properly aligned with memmove(). This can require up to double the size of the loaded image and therefore accidentally overwrite content placed there (i.e ramdisk_addr_r) for large kernel images. By adding text_offset to the default kernel_addr_r we can prevent that from happening for kernels larger 18MB and also save a few cycles. We can assume a text_offset of 0x80000 for most cases, all others will be handled by booti_setup() anyway. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: pwm: convert to use live dtKever Yang
use live dt api to get base addr Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk1108: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3328: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3288: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk322x: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3188: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3036: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13sunxi: Add A20-SOM204-EVB-eMMC boardStefan Mavrodiev
A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired to MMC2 slot. This patch adds defconfig and dts files for this board. The dts is same with mainline kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13sunxi: Add A20-SOM204-EVB boardStefan Mavrodiev
This is new System-On-Module platform with universal dimm socket for easy insertation. The EVB board is designed to be universal with future modules. Base features of A20-SOM204 board includes: * 1GB DDR3 RAM * AXP209 PMU * KSZ9031 Gigabit PHY * AT24C16 EEPROM * Status LED * LCD connector * GPIO connector There will be variants with the following options: * Second LAN8710A Megabit PHY * 16MB SPI Flash memory * eMMC card * ATECC508 crypto device The EVB board has: * Debug UART * MicroSD card connector * USB-OTG connector * Two USB host * RTL8723BS WiFi/BT combo * IrDA transceiver/receiver * HDMI connector * VGA connector * Megabit ethernet transceiver * Gigabit ethernet transceiver * SATA connector * CAN driver * CSI camera * MIC and HP connectors * PCIe x4 connector * USB3 connector * Two UEXT connectors * Two user LEDs Some of the features are multiplexed and cannot be used the same time: CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3. This patch adds defconfig and dts files for this board. The dts is same with mainline kernel, except some nodes are removed to make file compatible with existing dtsi file. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13Move CONFIG_PHY_ADDR to KconfigStefan Mavrodiev
CONFIG_PHY_ADDR is used for old-style configuration. This makes impossible changing the PHY address, if multiple boards share a same config header file (for example include/configs/sunxi-common.h). Moving this to Kconfig helps overcoming this issue. It's defined as entry inside PHYLIB section. After the implemention, moveconfig was run. The issues are: - edb9315a - CONFIG_PHYLIB is not enabled. Entry is deleted. - ds414 - CONFIG_PHYLIB is in incompatible format: { 0x1, 0x0 }. This entry is also deleted. - devkit3250 - The PHY_ADDR is in hex format (0x1F). Manually CONFIG_PHY_ADDR=31 is added in the defconfig. After the changes the suspicious defconfigs passes building. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [jagan: rebased on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13net: sun8i_emac: Fix PHY initializationSamuel Holland
The previous code tried to update the PHY parameters without waiting for autonegotiation to complete. This caused wrong values to be written to the EMAC in sun8i_adjust_link(). As a result, any commands that called eth_start() before autonegotiation completed would find the network nonfunctional. Fix this by using the correct function to start up the PHY. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13ARM: sunxi: Build u-boot-sunxi-with-spl.bin on ARM64 as wellTuomas Tynkkynen
In README.sunxi64 we tell the user how to optionally create u-boot-sunxi-with-spl.bin by manually running cat. Instead, have the build system create the file automatically just like it does for 32-bit sunxi boards. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13ARM: sunxi: Move u-boot-sunxi-with-spl.bin rule to MakefileTuomas Tynkkynen
We're going to need this logic for 64-bit builds as well, so move it out from under arch/arm/cpu/armv7. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13mmc: sunxi: support cd-invertedHeinrich Schuchardt
With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13sunxi: Add reg property for USB OTG node in sun8i-a83t.dtsiChen-Yu Tsai
When the OTG node was added, its reg property for its address space was missing. With commit f4f9896ac310 ("musb: sunxi: Use base address from device tree"), the OTG controller's address is derived from the device tree exclusively. The missing property results in U-boot crashing when MUSB is initialized. Fixes: b0bea6678981 ("sunxi: Add USB and R_PIO nodes to sun8i-a83t.dtsi") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
2018-03-13sunxi: Pine64: temporarily remove extra Pine64 non-plus DTAndre Przywara
With the merge of the new u-boot.itb size check now the build for pine64_plus_defconfig breaks, as this file gets too large: ============= u-boot.itb exceeds file size limit: limit: 516096 bytes actual: 521852 bytes excess: 5756 bytes make: *** [u-boot.itb] Error 1 ============= One easily fixable reason is that we actually have two .dtbs in our FIT image, one for the regular Pine64+ board, and one for the non-plus version. The only difference U-Boot cares about is the 100Mbit Ethernet PHY used on the non-plus version, however Ethernet isn't enabled in the non-plus DT anyway. So we could avoid the non-plus special handling, and remove that extra .dtb from the FIT image, which saves a few KBs and brings us back below the limit. The Pine64 would boot with a Pine64+ .dtb, and would fail to enable Ethernet. Given that it didn't work in the first place, this is not a regression. Once we switch to a non-MMC environment, we can bring this back, then with a proper .dtb and hopefully working Ethernet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-13arm: sunxi: Move spl spi sunxi code to mach-sunxiJagan Teki
This SUNXI variant SPL SPI code doesn't use either SPI or SPL_FLASG subsystems due to size constraints and also placing this code in drivers/mtd/spi will unnecessary build SPI_FLASH code(if defined) which never required, hence moved to arch area. And also renamed the file according to kconfig which resembles proper name. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13spi: omap3: Skip set_mode, set_speed from claimJagan Teki
set_mode, set_seed functions has separate function pointers in dm_spi_ops, so use them in relevent one instead of calling from claim_bus. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13spi: atcspi200: Drop non-dm codeJagan Teki
Boards adp-ae3xx_defconfig, nx25-ae250_defconfig already enabled DM_SPI, so non-dm code make no use of it hence droped. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13Prepare v2018.03Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13imx: hab: Convert DCD non-NULL error to warningBryan O'Donoghue
commit 8c4037a09a5c ("imx: hab: Ensure the IVT DCD pointer is Null prior to calling HAB authenticate function.") makes the DCD field being NULL a dependency. This change though will break loading and executing of existing pre-signed binaries on a u-boot update i.e. if this change is deployed on a board you will be forced to redo all images on that board to NULL out the DCD. There is no prior guidance from NXP that the DCD must be NULL similarly public guidance on usage of the HAB doesn't call out this NULL dependency (see boundary devices link). Since later SoCs will reject a non-NULL DCD there's no reason to make a NULL DCD a requirement, however if there is an actual dependency for later SoCs the appropriate fix would be to do SoC version checking. Earlier SoCs are capable (and happy) to authenticate images with non-NULL DCDs, we should not be forcing this change on downstream users - particularly if it means those users now must rewrite their build systems and/or redeploy signed images in the field. Fixes: 8c4037a09a5c ("imx: hab: Ensure the IVT DCD pointer is Null prior to calling HAB authenticate function.") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com> Cc: Breno Lima <breno.lima@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Link: https://boundarydevices.com/high-assurance-boot-hab-dummies Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11doc: mxc_hab: Update i.MX HAB documentationBreno Lima
The README.mxc_hab is outdated and need improvements, add the following modifications: - Reorganize document and remove duplicate content - Add CST download link - Update CST package name - Align command lines with CST v2.3.3 - Update U-Boot binary name - Remove CSF padding since is not documented in AN4581 Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-03-11doc: mxc_hab: Move HAB related info to the appropriate docBreno Lima
Currently the High Assurance Boot procedure is documented in two places: - doc/README.imx6 - doc/README.mxc_hab It is better to consolidate all HAB related information into README.mxc_hab file, so move the content from README.imx6 to README.mxc_hab. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>