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2017-04-18x86: Display the SPL banner only onceSimon Glass
At present on a cold reboot we must reset the CPU to get it to full speed. With 64-bit U-Boot this happens in SPL. At present we print the banner before doing this, the end result being that we print the banner twice. Print the banner a little later (after the CPU is ready) to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-18x86: Drop leading spaces in cpu_x86_get_desc()Simon Glass
The Intel CPU name can have leading spaces. Remove them since they are not useful. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-17Prepare v2017.05-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-16Merge git://git.denx.de/u-boot-rockchipTom Rini
2017-04-16Merge git://git.denx.de/u-boot-dmTom Rini
2017-04-15rockchip: rk3399: spl: add UART0 support for SPLPhilipp Tomsich
The RK3399-Q7 ("Puma") SoM exposes UART0 as the Qseven UART (i.e. the serial line available via standardised pins on the edge connector and available on a RS232 connector). To support boards (such as the RK3399-Q7) that require UART0 as a debug console, we match CONFIG_DEBUG_UART_BASE and add the appropriate iomux setup to the rk3399 SPL code. As we are already touching this code, we also move the board-specific UART setup (i.e. iomux setup) into board_debug_uart_init(). This will be called from the debug UART init when CONFIG_DEBUG_UART_BOARD_INIT is set. As the RK3399 needs to use its board_debug_uart_init() function, we have Kconfig enable it by default for RK3399 builds. With everything set up to define CONFIG_BAUDRATE via defconfig and with to have the SPL debug UART either on UART0 or UART2, the configs for the RK3399 EVB are then update (the change for the RK3399-Q7 is left for later to not cause issues on applying the change). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: pmic: Enable RK808 for rk3399 evberic.gao@rock-chips.com
For using mipi display, we need to enable lcd3v3 which supplied by rk808,so enable rk808 first. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: i2c: Enable i2c for rk3399eric.gao@rock-chips.com
To enable mipi display, we need to enable pmic rk808 first for lcd3v3 power,which use i2c0 to communicate with soc. So enable i2c0. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: rk3399: Add missing sentinel in sysconeric.gao@rock-chips.com
when enable PMIC rk808,the system will halt at very early stage,log is shown as bellow. INFO: plat_rockchip_pmu_init(1211): pd status 3e INFO: BL31: Initializing runtime services INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9 time 44561b, 0 (<<----Just stop here) It's caused by the absence of "{ }" in syscon_rk3399.c ,which will lead to memory overflow like below.According to Sysmap file ,we can find the function buck_get_value of rk808 is just follow the compatible struct,the pointer "of_match" point to "buck_get_value",but it is not a struct and don't have member of compatible, In this case, system crash. So,on the face, it looks like that rk808 is guilty.but he is really innocent. while (of_match->compatible) { <<---------- if (!strcmp(of_match->compatible, compat)) { *of_idp = of_match; return 0; } of_match++; } Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-04-15rockchip: ARM64: split RK3399-Q7 board off the RK3399-EVB boardKlaus Goger
The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230 connector) system-on-module from Theobroma Systems, featuring the Rockchip RK3399. It provides the following feature set: * up to 4GB DDR3 * on-module SPI-NOR flash * on-module eMMC (with 8-bit interace) * SD card (on a baseboad) via edge connector * Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY * HDMI/eDP/MIPI displays * 2x MIPI-CSI * USB - 1x USB 3.0 dual-role (direct connection) - 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub) * on-module STM32 Cortex-M0 companion controller, implementing: - low-power RTC functionality (ISL1208 emulation) - fan controller (AMC6821 emulation) - USB<->CAN bridge controller Note that we use a multi-payload FIT image for booting and have Cortex-M0 payload in a separate subimage: we thus rely on the FIT image loader to put it into the SRAM region that ATF expects it in. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixed build warning on puma-rk3399: Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: dts: rk3399-puma: make the DTS dual-licensedPhilipp Tomsich
The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed. This updates the licensing info in the rk3399-puma.dts. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: sysreset: rk3188: Make sure remap is off on warm-resetsHeiko Stübner
The warm-reset of rk3188 socs keeps the remap setting as it was, so if it was enabled, the cpu would start from address 0x0 of the sram instead of address 0x0 of the bootrom, thus making the reset hang. Therefore make sure the remap is disabled before attempting a warm reset. Cold reset is not affected by this at all. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: rk3399: do not use lower addressKever Yang
The lower address is reserved for ATF, do not use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: rk3188: enable remap functionHeiko Stübner
Most Rockchip socs have the ability to either map the bootrom or a sram area to the starting address of the cpu by flipping a bit in the GRF. Newer socs leave this untouched and mapped to the bootrom but the legacy loaders on rk3188 and before enabled the remap functionality and the current smp implementation in the Linux kernel also requires it to be enabled, to bring up secondary cpus. So to keep smp working in the kernel, mimic the behaviour of the legacy bootloaders and enable the remap functionality. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: cosmetic: Move rock board to its correct positionHeiko Stübner
Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved the rock board in between some rk3288 board, probably as a result of rebasing. So move it back to its original position above all rk3288 boards. Fixes: 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: Add USB to the default boot targetsEddie Cai
Now that most rockchip SoC based board have usb host support, enable USB boot targets by default. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build errors when CONFIG_CMD_USB not defined: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: tinker: configs: Add USB, PXE, DHCP to the default boot targetsEddie Cai
tinker board support ethernet and usb host, so enable USB, PXE and DHCP support. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: dts: rk3399-puma: disable 'fifo-mode' in sdmmcPhilipp Tomsich
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15rockchip: spl: rk3399: disable DDR security regions for SPLPhilipp Tomsich
The RK3399 hangs during DMA of the Designware MMC controller, when performing DMA-based transactions in SPL due to the DDR security settings left behind by the BootROM (i.e. accesses to the first MB of DRAM are restricted... however, the DMA is likely to target this first MB, as it transfers from/to the stack). System security is not affected, as the final security configuration is performed by the ATF, which is executed after the SPL stage. With this fix in place, we can now drop 'fifo-mode' in the DTS for the RK3399-Q7 (Puma). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-14board: sama5d3_xplained: Enable early debug UARTWenyou Yang
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-04-14board: sama5d3_xplained: Clean up codeWenyou Yang
Due to the introduction of the pinctrl and clk driver, and using device tree files, remove the unneeded hardcoded pin configuration and clock enabling code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-04-14board: sama5d3_xplained: Update to support DM/DTWenyou Yang
Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Fix build error with sama5d3_xplained_mmc: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-14board: sama5d3xek: Enable early debug UARTWenyou Yang
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-04-14board: sama5d3xek: Clean up codeWenyou Yang
Due to the introduction of the pinctrl and clk driver, and using device tree files, remove the unneeded hardcoded pin configuration and clock enabling code from the board file. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Remove CONFIG_PHY_MICREL as per previous patch: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-14board: sama5d3xek: Update to support DM/DTWenyou Yang
Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Add back CONFIG_PHY_MICREL to prevent a build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2017-04-14dm: led: Add a new 'led' commandSimon Glass
When driver model is used for LEDs, provide a command to allow LED access. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14led: Mark existing driver as legacySimon Glass
The existing 'led' command does not support driver model. Rename it to indicate that it is legacy code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: led: Add support for blinking LEDsSimon Glass
Allow LEDs to be blinked if the driver supports it. Enable this for sandbox so that the tests run. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: led: Support toggling LEDsSimon Glass
Add support for toggling an LED into the uclass interface. This can be efficiently implemented by the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: led: Add support for getting the state of an LEDSimon Glass
It is useful to be able to read the LED as well as write it. Add this to the uclass and update the GPIO driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: led: Adjust the LED uclassSimon Glass
At present this is very simple, supporting only on and off. We want to also support toggling and blinking. As a first step, change the name of the main method and use an enum to indicate the state. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: led: Rename struct led_uclass_platSimon Glass
These structures are normally named with 'uc' instead of 'uclass'. Change this one for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: led: Add a missing blank line in the Kconfig fileSimon Glass
There should be a blank line between each option. Add one before LED_GPIO. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14sandbox: Add some test LEDsSimon Glass
Add some LEDs to the standard sandbox device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ziping Chen <techping.chan@gmail.com>
2017-04-14dm: scsi: fix divide-by-0 error in scsi_scan()Jean-Jacques Hiblot
With DM_SCSI enabled, blk_create_devicef() is called with blkz = 0, leading to a divide-by-0 exception. scsi_detect_dev() can be used to get the required parameters (block size and number of blocks) from the drive before calling blk_create_devicef(). Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14scsi: move the partition initialization out of the scsi detectionJean-Jacques Hiblot
We might want to get information about the scsi device without initializing the partition. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14scsi: make the LUN a parameter of scsi_detect_dev()Jean-Jacques Hiblot
This is a cosmetic change. target and LUN have kind of the same role in this function. One of them was passed as a parameter and the other was embedded in a structure. For consistency, pass both of them as parameters. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14arm: omap: sata: compile out board-level sata code when CONFIG_DM_SCSI is ↵Jean-Jacques Hiblot
defined When CONFIG_DM_SCSI is defined, the SATA initialization will be implemented in the scsi-uclass driver. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-14arm: omap: sata: move enable sata clocks to enable_basic_clocks()Mugunthan V N
All the clocks which has to be enabled has to be done in enable_basic_clocks(), so moving enable sata clock to common clocks enable function. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-04-14buildman: Translate more strings to latin-1Tom Rini
When writing out some of our results we may now have UTF-8 characters in there as well. Translate these to latin-1 and ignore any errors (as this is for diagnostic and given the githash anything else can be reconstructed by the user. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2017-04-14usb: return 0 from usb_stor_get_info even if removable mediaTroy Kisky
This fixes a regression caused by commit 07b2b78ce4bc8ae25e066c65245eaf58c0d9a67c dm: usb: Convert USB storage to use driver-model for block devs which caused part_init to be called when it was not previously. Without this patch, the following happens when a USB sd card reader is used. => usb start starting USB... USB0: Port not available. USB1: USB EHCI 1.00 scanning bus 1 for devices... 3 USB Device(s) found scanning usb for storage devices... Device NOT ready Request Sense returned 02 3A 00 ### ERROR ### Please RESET the board ### This happens because dev_desc->blksz is 0. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2017-04-14usb: dwc2: invalidate the dcache before starting the DMAEddie Cai
We should invalidate the dcache before starting the DMA. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2017-04-14usb: dwc3: gadget: make cache-maintenance on event buffers more robustPhilipp Tomsich
Merely using dma_alloc_coherent does not ensure that there is no stale data left in the caches for the allocated DMA buffer (i.e. that the affected cacheline may still be dirty). The original code was doing the following (on AArch64, which translates a 'flush' into a 'clean + invalidate'): # during initialisation: 1. allocate buffers via memalign => buffers may still be modified (cached, dirty) # during interrupt processing 2. clean + invalidate buffers => may commit stale data from a modified cacheline 3. read from buffers This could lead to garbage info being written to buffers before reading them during even-processing. To make the event processing more robust, we use the following sequence for the cache-maintenance: # during initialisation: 1. allocate buffers via memalign 2. clean + invalidate buffers (we only need the 'invalidate' part, but dwc3_flush_cache() always performs a 'clean + invalidate') # during interrupt processing 3. read the buffers (we know these lines are not cached, due to the previous invalidation and no other code touching them in-between) 4. clean + invalidate buffers => writes back any modification we may have made during event processing and ensures that the lines are not in the cache the next time we enter interrupt processing Note that with the original sequence, we observe reproducible (depending on the cache state: i.e. running dhcp/usb start before will upset caches to get us around this) issues in the event processing (a fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the first time interrupt handling is invoked) when running USB mass storage emulation on our RK3399-Q7 with data-caches on. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-04-14usb: dwc3: ensure consistent types for dwc3_flush_cachePhilipp Tomsich
The dwc3_flush_cache() call was declared and used inconsistently: * The declaration assumed 'int' for addresses (a potential issue when running in a LP64 memory model). * The invocation cast the address to 'long'. This change ensures that both the declaration and usage of this function consistently uses 'uintptr_t' for correct behaviour even when the allocated buffers (to be flushed) reside outside of the lower 32bits of memory. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-04-14usb: gadget: g_dnl: don't set iProduct nor iSerialNumberFelipe Balbi
Both these numbers are calculated in runtime and dynamically assigned to the device descriptor during bind(). Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-14usb: gadget: g_dnl: only set iSerialNumber if we have a serial#Felipe Balbi
We don't want to claim that we support a serial number string and later return nothing. Because of that, if g_dnl_serial is an empty string, let's skip setting iSerialNumber to a valid number. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-14usb: gadget: g_dnl: hold maximum string descriptorFelipe Balbi
A USB String descriptor can be up to 255 characters long and it's not NULL terminated according to the USB spec. This means our MAX_STRING_SERIAL should be 256 (to cope with NULL terminator). Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-14video: Fix crash when scroll screeneric.gao@rock-chips.com
After enabling log printing to lcd, when the screen starts scrolling, system crashes. Log is shown as bellow: "Synchronous Abort" handler, esr 0x96000045 "Synchronous Abort" handler, esr 0x96000045 Checking the source code, we found that the variable "pixels" gets a wrong value: int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length; "pixels" here means the value of pixels for a character, rather than the bytes for a character. So the variable "pixels" is 4 times bigger than it's exact value, which will cause the memory overflow when the cpu runs the following code: for (i = 0; i < pixels; i++) *dst++ = clr; <<---- Signed-off-by: Eric Gao <eric.gao@rock-chips.com>