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2013-05-24powerpc/p5040: enable PBL tool supportShaohui Xie
Provided a default RCW for P5040, then it can use PBL to build ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/t4qds: use clock measurement for sysclk and ddr clockEd Swarthout
Use QIXIS measurement registers to obtain sysclk and ddr clock. This allows using non-standard clock speeds, set by directly writing to clock chip or store the values in qixis clock data eeprom. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/qixis: add clock measurement registersEd Swarthout
QIXIS includes frequency measurement functions for each major processor clock input. After reset (and after clocks are stable), QIXIS measures the clocks against a reference frequency and stores the results in CLK_FREQ registers. A base register supplies a multiplier which allows directly obtaining the measured value, without requiring knowledge of the target system or QIXIS core frequency. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/mpc8xxx: Allow DDR overclockYork Sun
Allow DDR clock runs faster than SPD specifes. This may cause memory failure, but the user should know what is going to happen when using higher than expected DDR clock. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/chassis2: Change core numbering schemeYork Sun
To align with chassis generation 2 spec, all cores are numbered in sequence. The cores may reside across multiple clusters. Each cluster has zero to four cores. The first available core is numbered as core 0. The second available core is numbered as core 1 and so on. Core clocks are generated by each clusters. To identify the cluster of each core, topology registers are examined. Cluster clock registers are reorganized to be easily indexed. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/mpc8xxx: Add T1040 and variant SoCsYork Sun
T1040 and variants have e5500 cores and are compliant to QorIQ Chassis Generation 2. The major difference between T1040 and its variants is the number of cores and the number of L2 switch ports. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/T4160: Merge T4160 and T4240 in config_mpc85xx.hYork Sun
T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/p5040: enable NAND, SD, SPI boot supportShaohui Xie
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24Add e6500 L2 replacement policy selectionJames Yang
This is compile-time config. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24T4240/ramboot: enable PBL tool for T4240Shaohui Xie
Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use PBL tool to produce the ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/t4240qds: Add VDD overrideYork Sun
Allow VDD voltage overriding with a command. This is an add-on feasture of VID. To override VDD, use command vdd_override with the value of voltage in mV, for example vdd_override <voltage in mV, eg. 1050> The above example will set the VDD to 1.050 volt. Any wrong value out of range of 0.8188 to 1.2125 volt or invalid string is ignored. In addition to the command, if overriding VDD is needed earlier in booting process, save an variable and reboot: setenv t4240qds_vdd_mv <voltage in mV> saveenv Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/mpc85xx: check if core is disabled for showing statusYork Sun
"cpu <num> status" should check if core is disabled before printing the spin table location. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24net/phy: fix select line for TN80xxShaohui Xie
TN80xx has same PHY ID as TN2020, but it needs different setting to register 30.93 which used to select line, so we read register 30.32 which has bit 15:12 to indicate PHY hardware version, for TN20xx we will get 3 or 2, for TN80xx we will get 5 or 4. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24Enable L2 cache parity/ECC error checkingJames Yang
Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24powerpc/t4240qds: Add board detail for bdinfo commandYork Sun
Print more detail information including core voltage, RCW source, switch settings, etc. with bdinfo command. Signed-off-by: York Sun <yorksun@freescale.com> CC: Wolfgang Denk <wd@denx.de> CC: Tom Rini <trini@ti.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24common: Update cmd_bdinfo for PPCYork Sun
Add board detail function to print more individual board information. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24cmd_mem: fix cp commandMasahiro Yamada
The "cp" command has not worked since commit 0628ab8ec59834f98ede267edd21ddb8ba0bb57b, because of the following lines, which set the destination and the source to the same address. buf = map_sysmem(addr, bytes); src = map_sysmem(addr, bytes); Tested-by: Tom Rini <trini@ti.com> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-05-24ext4: assign get_fs()->dev_desc before using itStephen Warren
Commit 50ce4c0 "fs/ext4: Support device block sizes != 512 bytes" modified ext4fs_set_blk_dev() to calculate total_sect based on get_fs()->dev_desc->log2blksz rather than SECTOR_SIZE. However, this value wasn't yet assigned. Move the assignment earlier so the code doesn't crash or hang. Cc: Egbert Eich <eich@suse.com> Tested-by: Tom Rini <trini@ti.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-23arm: Enable -ffunction-sections / -fdata-sections / --gc-sectionsTom Rini
While other architectures have enabled these gcc / ld options for some time on U-Boot itself, ARM has only been doing this on SPL. Enable this on full U-Boot as well now. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@ti.com>
2013-05-23ARM: Add Seagate GoFlex Home supportSuriyan Ramasami
Add Seagate GoFlex Home support Start with dockstar configuration define support for RTC, DATE, SATA and EXT4FS Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
2013-05-23ARM: vexpress: enable bootz and hush parser for all VExpress boardsAndre Przywara
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23ARM: vexpress: add support for Versatile Express Cortex-A15-TC2Andre Przywara
This adds support for the Cortex-A15-TC2 core tile for the Versatile Express board by ARM. This is mostly a copy of the A5 support file, but will be extended later with A15 specific options. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23ARM: vexpress: create A5 specific board configRyan Harkin
This patch creates a new config for the A5 dual core tile that includes the generic config for the Versatile Express platform. The generic config has been modified to provide support for the Extended Memory Map, as used on the A5 core tile. A5 does not support the legacy memory map. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23ARM: vexpress: refactoring of Versatile Express CA9x4 supportRyan Harkin
The current ca9x4_ct_vxp platform contains support for a Versatile Express motherboard with a quad core A9 core tile. This patch separates the Versatile Express motherboard code and the A9 specific code, to ease supporting more core tiles in the next patches. Andre: merged the first two of Ryan's original patches and did some checkpatch fixes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-05-23cfi_flash: return NULL for invalid base address inputMasahiro Yamada
When base address given was out of valid flash address ranges, flash_get_info() function returned the pointer to the last element of flash_info[i] array. This patch changes this function to return NULL pointer in such a case, which is more correct behaviour. The function flash_protect_default() calls flash_protect() immediately after flash_get_info() invocation. With this correction, flash_protect() function would be able to return soon, for NULL flash_info. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-23cosmetic: cfi_flash: delete a space after an unary operatorMasahiro Yamada
Linux Kernel Documentation/CodingStyle says: Do not add a space after unary operators such as &, *, ... Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-23cfi_flash: Fix unaligned accesses to cfi_qry structureAndrew Gabbasov
Packed structure cfi_qry contains unaligned 16- and 32-bits members, accessing which causes problems when cfi_flash driver is compiled with -munaligned-access option: flash initialization hangs, probably due to data error. Since the structure is supposed to replicate the actual data layout in CFI Flash chips, the alignment issue can't be fixed in the structure. So, unaligned fields need using of explicit unaligned access macros. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Stefan Roese <sr@denx.de>
2013-05-22nand/fsl_ifc: Convert to self-initPrabhakar Kushwaha
Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2013-05-22mtd: nand: use ssize_t instead of size_t to prevent infinite loophtbegin
When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop will loop forever. After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l will still be 0 as expected. Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Ben Gardiner <bengardiner@nanometrics.ca> Cc: Scott Wood <scottwood@freescale.com>
2013-05-22mtd: nand: fix the partial page write conditionhtbegin
When writelen is mtd->writesize - 1, it is still a partial page write Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
2013-05-22nand: adjust erase/read/write partition/chip size for bad blocksHarvey Chapman
Adjust the sizes calculated for whole partition/chip operations by removing the size of bad blocks so we don't try to erase/read/write past a partition/chip boundary. Signed-off-by: Harvey Chapman <hchapman@3gfp.com>
2013-05-22nand/fsl_elbc: detect page size at runtimeScott Wood
This avoids needing a separate U-Boot config when some revisions of a board have small-page NAND and other revisions have large-page NAND (except for NAND SPL targets). CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and it gets in the way of this change. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-05-21ARM: at91: add NAND partition table and indexBo Shen
Add NAND partition table, EK board support boot up NAND flash using the same NAND partition table Add Index in this file Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21ARM: at91: add at91sam9x5 and sama5d3x informationBo Shen
This patch add following EK information - at91sam9n12ek, at91sam9x5ek - sama5d3xek Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21ARM: at91: fix and update README.at91 documentBo Shen
This patch implement following things - The link no longer accessable - Remove the error configuration command - Update soldered data flash memory map - Update at91sam9m10g45ek memory size to 128MiB Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21ARM: atmel: add sama5d3xek supportBo Shen
Add sama5d3xek support with following feature - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector - boot from SPI flash support - boot from SD card support - LCD support - EMAC support - USB OHCI support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21USB: ohci-at91: support sama5d3x devicesBo Shen
Add OHCI support for sama5d3x devices Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-21ARM: at91: add Atmel sama5d3 SoC new pmc registerBo Shen
Add Atmel sama5d3 SoC new pmc register Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-17Update MAINTAINERS file for sandboxSimon Glass
This currently has no maintainer listed. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-17Update MAINTAINERS file for x86Simon Glass
This still shows the previous maintainer. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-17.gitignore: add GNU GLOBAL filesMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-05-17fdt_support: Use CONFIG_NR_DRAM_BANKS if definedDoug Anderson
It appears that there are some cases where we have more than 4 banks of memory. Use CONFIG_NR_DRAM_BANKS if it's defined to handle this. This will take up a little extra stack space (64 bytes extra if we go up to 8 banks), but that seems OK. Signed-off-by: Doug Anderson <dianders@chromium.org>
2013-05-17bootm: Avoid 256-byte overflow in fixup_silent_linux()Doug Anderson
This makes fixup_silent_linux() use malloc() to allocate its working space, meaning that our maximum kernel command line should only be limited by malloc(). Previously it was silently overflowing the stack. Note that nothing about this change increases the kernel's maximum command line length. If you have a command line that is >256 bytes it's up to you to make sure that kernel can handle it. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
2013-05-16wandboard: fix typo in READMELuka Perkov
Fix typo in wandboard README file. Signed-off-by: Luka Perkov <luka@openwrt.org>
2013-05-16video: mxsfb: Add an entry for mx23evk/mx28vk video modesFabio Estevam
Currently the mxsfb driver takes the display timings from the 'videomode' environment variable. Provide an example on how to set 'videomode' for using splash screen on mx23evk and mx28vk boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Marek Vasut <marex@denx.de>
2013-05-16mx23evk: Add splash screen supportFabio Estevam
Enable display support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-16mx28evk: Add splash screen supportFabio Estevam
Enable display support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-05-16imx: spl: Merge libimx-common make rulesBenoît Thébaudeau
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-05-16README: Correct reference for CONFIG_SUPPORT_RAW_INITRDTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-05-15powerpc/esdhc: Correct judgement for DATA PIO modeHaijun.Zhang
The logic for the whether to configure for polling or DMA was mistakenly reversed in this patch: Commit 7b43db92110ec2f15c5f7187a165f2928464966b drivers/mmc/fsl_esdhc.c: fix compiler warnings Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> CC: Sun Yusong-R58495 <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>