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Move the spl_perform_fixups() into rk3399.c so that we can
use common spl board file later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The driver need a mapping to get the dts node by boot srouce ID.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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rk3368 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The driver need a mapping to get the dts node by boot srouce ID.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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rk3328 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Add the CONFIG_ROCKCHIP_STIMER_BASE so that we can use the stimer
init function in tpl.c and spl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The driver need a mapping to get the dts node by boot srouce ID.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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"u-boot,spl-boot-order" is more flexible and other rockchip SoCs
has convert to use it, migrate to use the new dts property.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We are using "u-boot,spl-boot-order" now and re-use the
definition from rk3288-u-boot.dtsi, so remove it directly here.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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rk3288 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Mov edram_init_banksize() into rk3288.c so that we can re-use
the common SPL board file later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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phycore_init() is use for phycore board only, it should be move back
to phycore-rk3288.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Only firefly-rk3288 has the dts node "u-boot,boot-led",
while CONFIG_SPL_LED is not enable, move code to firefly-rk3288
now in case someone need this code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Show the SPL BANNER earlier so that we know already get into SPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Update to fix warning:
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/optee@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /configurations/conf@1
has a unit name, but no reg property
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The driver need a mapping to get the dts node by boot srouce ID.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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rk322x has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Use arch_cpu_init() to init SoC secure region and move it to
rk322x.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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rk3188 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The driver need a mapping to get the dts node by boot srouce ID.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Clean up the rk3188.c so that we can re-use the common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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SPL bootrom support is a boot device just like mmc and etc,
use formal boot device instead of jump to bootrom directly.
Enable the Kconfig by default if ROCKCHIP_BACK_TO_BROM is enabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The SoC feature init will be better to use arch_cpu_init() and
goes to soc file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Init CPU frquency in clock driver instead of in SPL board file,
this will help for use common board file later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The common spl board file handles board_init_f() in SPL,
and with board_early_init_f() and arch_cpu_init() callback,
other operateion after board_init_f() should go to board specific
spl_board_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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boot_devices may defined in soc file, and used in board file,
we need to delear it in header file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The boot source from BootRom is store at a fix offset of IRAM,
update to use the common macro instead of rk3399 specific one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Rockchip SoCs have internal sram for bootrom data area and for
sdram init program space. Introduce the base address in case
we need to use it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The CONFIG_SYS_NS16550_MEM32 already defined in
rockchip_common.h, no need to define again in soc
level header.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The default value of CONFIG_SYS_BOOTM_LEN is 0x800000 i.e, 8MB which
causes board reset because of larger uImage size.
This was tested on rk3288 Amarula Vyasa and rk3288 Asus Tinker
boards.
Error log snippet:
Booting using the fdt blob at 0x1f00000
Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
resetting ...
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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- Add in lzma-alone for current binman tests
- Update to Ubuntu's xenial-20190720 tag (latest).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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We need pyelftools here to run rather than skip some tests.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Minor driver-model fixes and tweaks
A few device-tree fixes
Binman support for extracting files from an image
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Reduce power domain calls when CONFIG_POWER_DOMAIN is disabled.
With gcc v8.2, this change saves 104 bytes.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Also, make command line example indentation consistent.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
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Right now when using clk_of_xlate_default(), clk->data
remains un-initialized because clk_get_bulk() does not
initialize memory on allocation of clock structure.
This can cause problems when data is used to match if
two clocks pointers are exactly the same underlying
clocks, for example.
Fix it by initializing clk->data to 0.
Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The uclass_next_device() routine continues a previously started device
iteration. Change the description that is copied from
uclass_first_device().
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries
endianness is not adjusted at all. Fix this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
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The comments of dev_read_name() wrongly describe "node" as its
parameter.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Per device tree spec, "status" property can have a value of "okay",
or "disabled", but not "disable".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Without a valid ofnode, it's meaningless to call clk_set_defaults()
to process various properties.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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It is possible that a timer device has a null ofnode, hence there is
no need to further parse DT for the clock rate.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Currently, fdt_get_base_address() returns 0 if the "reg" property is
missing. Since 0 is a valid value, it is not suitable for the error
handling. Return OF_BAD_ADDR instead.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Current test coverage is likely sufficient for the logic used to place
sections in the image. However it seems useful to add a test specifically
for nested sections, since these could have some unusual interactions.
Add a new test for this and aligned sections. This test failed before the
refactor to drop the bsection.py file (Section class), but passes now.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is useful to be able to extract all binaries from the image, or a
subset of them. Add a new 'extract' command to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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CBFS is a bit like a section but with a custom format. Provide the list of
entries and the compression type to binman so that it can extract the data
from the CBFS, just like any other part of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is useful to be able to extract entry contents from an image to see
what is inside. Add a simple function to read the contents of an entry,
decompressing it by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Binman generally operates silently but in some cases it is useful to see
what Binman is actually doing at each step. Enable some logging output
with different logging levels selectable via the -v flag.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support for listing the entries in an image. This relies on the image
having an FDT map.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When support for sections (and thus hierarchical images) was added to
binman, the decision was made to create a new Section class which could
be used by both Image and an Entry_section class. The decision between
using inheritance and composition was tricky to make, but in the end it
was decided that Image was different enough from Entry that it made sense
to put the implementation of sections in an entirely separate class. It
also has the advantage that core Image code does have to rely on an entry
class in the etype directory.
This work was mostly completed in commit:
8f1da50ccc "binman: Refactor much of the image code into 'section'
As a result of this, the Section class has its own version of things like
offset and size and these must be kept in sync with the parent
Entry_section class in some cases.
In the last year it has become apparent that the cost of keeping things in
sync is larger than expected, since more and more code wants to access
these properties.
An alternative approach, previously considered and rejected, now seems
better.
Adjust Image to be a subclass of Entry_section. Move the code from Section
(in bsection.py) to Entry_section and delete Section. Update all tests
accordingly.
This requires substantial changes to Image. Overall the changes reduce
code size by about 240 lines. While much of that is just boilerplate from
Section, there are quite a few functions in Entry_section which now do not
need to be overiden from Entry. This suggests the change is beneficial
even without further functionality being added.
A side benefit is that the properties of sections are now consistent with
other entries. This fixes a problem in testListCmd() where some properties
are missing for sections.
Unfortunately this is a very large commit since it is not feasible to do
the migration piecemeal. Given the substantial tests available and the
100% code coverage of binman, we should be able to do this safely.
Signed-off-by: Simon Glass <sjg@chromium.org>
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