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2019-07-19ram: rk3399: Add phy pctrl reset supportJagan Teki
Add support for phy pctrl reset support for both channel 0, 1. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Use rank mask in wdql data trainingJagan Teki
Add rank_mask based on the rank number, this would keep the wdql data training loop based on the desired rank mask value instead of looping for all values. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Use rank mask in ca data trainingJagan Teki
Add rank_mask based on the rank number, this would keep the ca data training loop based on the desired rank mask value instead of looping for all values. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Clear PI_175 interrupts in data trainingJagan Teki
Clear the PI_175 interrupts before processing actual data training in all relevant calls. This would help to clear interrupt from previous training. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Handle data training return typesJagan Teki
data trainings calls like ca, wl, rg, rl, wdql have proper return types with -EIO and the return type missed to handle in data_training function. This patch, add proper return type checks along with useful debug statement on each data training calls. Incidentally this would help to prevent the sdram initialization hang for single channel dram and when the code is trying to initialize second channel with proper return type of relevant data training call might failed. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19clk: rockchip: rk3399: Fix check patch warnings and checksJagan Teki
- CHECK: spaces preferred around that '*' - CHECK: spaces preferred around that '/' - CHECK: space preferred before that '|' - WARNING: macros should not use a trailing semicolon - CHECK: Unnecessary parentheses around 'fbdiv <= min_fbdiv' - CHECK: Unnecessary parentheses around 'parent->id == SCLK_MAC' - CHECK: Unnecessary parentheses around 'parent->dev == clk->dev' - WARNING: line over 80 characters - CHECK: Prefer kernel type 'u8' over 'uint8_t' - Add proper macro definitions arrangements Note: there are still line over 80 characters and other warnings but fixing those making code look unreadable, so I kept it as it is. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19arm: include: rockchip: Add DDR4 enumJagan Teki
Add DDR4 enum number in common header. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19arm: include: rockchip: Move dramtypes to common headerJagan Teki
dramtype enum numbers as common across all dram controllers in rockchip, so move the eneum values in common header. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Move common sdram structures in common headerJagan Teki
Move common sdram structures like sdram_cap_info, sdram_base_params into sdram_common header, this would help to reuse the same from another controllers like px30. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: s/rk3399_base_params/sdram_base_paramsJagan Teki
Most of the ddr parameters are common in rk3399_base_params structure and which would reuse it in another controller like px30 in future. So, rename the structure from rk3399_base_params into sdram_base_params. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rockchip: rk3399: Add cap_info structureJagan Teki
Group common ddr attributes like - rank - col - bk - bw - dbw - row_3_4 - cs0_row - cs1_row - ddrconfig into a common cap_info structure for more code readability and extend if possible based on the new features. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Order tsel variablesJagan Teki
Order tsel* variable declarations and assignment in proper and meaningful way. No functionality change. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: s/ca_tsel_wr_select_p/tsel_wr_select_ca_pJagan Teki
Rename ca_tsel_wr_select_p to tsel_wr_select_ca_p based on the bsp code. No functionality change. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: s/ca_tsel_wr_select_n/tsel_wr_select_ca_nJagan Teki
Rename ca_tsel_wr_select_n to tsel_wr_select_ca_n based on the bsp code. No functionality change. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: s/tsel_wr_select_p/tsel_wr_select_dq_pJagan Teki
Rename tsel_wr_select_p to tsel_wr_select_dq_p based on the bsp code. No functionality change. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: s/tsel_wr_select_n/tsel_wr_select_dq_nJagan Teki
Rename tsel_wr_select_n to tsel_wr_select_dq_n based on the bsp code. No functionality change. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Handle pctl_cfg return typeJagan Teki
Add proper return type handling of pctl_cfg with meaningful print statement. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: s/sdram_params/paramsJagan Teki
Rename variable name of struct rk3399_sdram_params from sdram_params with params for more code readability. No functionality change. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Some trivial code fixesJagan Teki
- Add proper spaces in data training, rk3399_dmc_init, pctl_cfg - Order include files - Move macro after include files Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19ram: rk3399: Fix code warningsJagan Teki
Fix checkpatch warninigs on sdram_rk3399.c like - Avoid CamelCase - Unnecessary parentheses - Alignment should match open parenthesis - multiple blank lines - misspelled - spaces preferred around that '>>' Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19rockchip: rock960-rk3399: fix mail format in MAINTAINER fileKever Yang
The mail format should have '<>', or else the patman won't recognize it correctley. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19rockchip: dts: rk3399: Add 'same-as-spl' for Rock PI 4Andy Yan
Let the board continue boot from the storage device where it bootup. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
2019-07-19rockchip: dts: rk3399: Add spl-boot-order for Rock PI 4Andy Yan
RK3399 use sdhci for eMMC and DW MMC for SD Card, and spl will only try to boot from SDMMC if we don't specify other boot device for spl-boot-order. So add sdhci and sdmmc for spl-boot-order here. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19configs: rockchip: rock960: enable USB3 supportPeter Robinson
Enable USB3 support via the dwc3 XHCI driver. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-07-19configs: rockchip: rock960: Add support for USB ethernet adaptersPeter Robinson
As the Rock960 doesn't have an onboard wired ethernet interface it's useful to have some common USB wired ethernet devices added to enable testing. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-07-19configs: rockchip: rock960: enable DMA for SDHCI controllerPeter Robinson
Enable the SDMA controller so the eMMC connected to the SDHCI controller (sdhci@fe330000) can make use of it. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-07-19configs: rockchip: rock960: enable pmic and regulator commandsPeter Robinson
We have both PMIC and Regulator functionality so it's useful to be able to see output and debug with the commands enabled. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-07-19configs: rockchip: rock960: drop options for non-existent HWPeter Robinson
The Rock960 doesn't contain SPI flash so drop related config options. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-07-19arm64: rockchip: rock960: sync dts files from Linux 5.2-rc6Peter Robinson
Sync the dts files for the Rock960 boards from Linux to get the latest changes and fixes for the devices. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-07-19rockchip: xhci: Remove RK3399 supportMark Kettenis
Remove RK3399 compatible strings as this driver is no longer used on that SoC. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19usb: xhci-dwc3: Add USB2 PHY configurationMark Kettenis
Configure USB2 PHY register based on "phy_type" property and handle all the quirks that are relevant for Rockchip RK3399 SoCs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19usb: dwc3-of-simple: Add support for RK3399Mark Kettenis
Add compatible string for RK3399 and enable it by default on Rockchip platforms with USB3 support. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19rockchip: clk: rk3399: handle clk_enable requests for USB3Mark Kettenis
The "simple" OF glue layer for the Designware USB3 core enables all refernced clocks. These need to be need to be implemented otherwise the driver fails to probe. A dummy implementation that simply returns success is sufficient since the RK3399 comes out of reset with all clock gates open. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-18Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2019-07-18net: unaligned copying of unsigned longHeinrich Schuchardt
The inline functions net_read_u32() and net_copy_u32() have been created to copy unaligned u32. But this is not obvious to the compiler. GCC 9.1 introduces a check -Werror=address-of-packed-member which leads to a build error on Travis CI: net/bootp.c: In function ‘dhcp_send_request_packet’: net/bootp.c:1011:27: error: taking address of packed member of ‘struct bootp_hdr’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 1011 | net_copy_u32(&bp->bp_id, &bp_offer->bp_id); Change the type of the function parameters to void * to avoid the build error. Reported-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18net: assign maintainer for include/net.hHeinrich Schuchardt
include/net.h currently has no maintainer. Assign include/net.h to the maintainer of the NET subsystem. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18net: designware: remove mdio bus on probe failureSimon Goldschmidt
The designware eth driver registers an mdio bus during probe, but if no PHY is found, this bus is never removed although probe failes and the driver is shown as not probed in the dm tree. This later leads to errors when e.g. the mii or mdio commands try to use available mdio buses because the mdio bus is still registered but all corresponding data structures are invalid because probe failed. Fix this by unregistering the mdio bus on probe failure (just as it is unregistered in the .remove callback, too). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18cmd: mdio: prevent data abort when no mdio bus is foundSimon Goldschmidt
Calling 'mdio read ...' currently leads to a data abort when no mdio bus is found. To fix this, check if 'bus' is a valid pointer before accessing it. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18test: dm: add a test for MDIO MUX DM uclassAlex Marginean
Adds a test using a makeshift MDIO MUX. The test is based on the existing MDIO test. It uses the last emulated PHY register to verify MUX selection. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-18test: dm_mdio: add a 2nd register to the emulated PHYAlex Marginean
This 2nd register is used by the follow-up MDIO MUX test. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18doc: bindings: Add description for MDIO MUX dts nodesAlex Marginean
Adds a short bindings document describing the expected structure of a MDIO MUX dts node. This is based on Linux binding and the example is in fact copied from there. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-18net: add MDIO_MUX DM classAlex Marginean
Adds a class for MDIO MUXes, which control access to a series of downstream child MDIOs. MDIO MUX drivers are required to implement a select function used to switch between child buses. MUX children are registered as MDIO buses and they can be used just like regular MDIOs. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18net: add comments to phy APIsAlex Marginean
Added a comment on the limitations of phy_find_by_mask API when scanning MDIO buses with multiple PHYs present. Added short descriptions to the other APIs in phy.h for consistency. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-18drivers: net: phy: Ignore PHY ID 0 during PHY probingAlex Marginean
Current code fails to probe some C45 PHYs that also respond to C22 reads. This is the case for PHYs like Aquantia AQR112, Marvell 88X2242 (as previously posted on the u-boot list). If the PHY ID reads all 0s just ignore it and try the next devad. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18drivers: net: phy: Use Aquantia driver for AQR112, AQR412Alexandru Marginean
adds AQR112 and AQR412 to the list of supported PHYs using existing AQR code. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18Merge branch '2019-07-17-master-imports'Tom Rini
- Various FS/disk related fixes with security implications. - Proper fix for the pci_ep test. - Assorted bugfixes - Some MediaTek updates. - 'env erase' support.
2019-07-18Revert "test: Disable pci_ep test for now"Tom Rini
We now have a proper fix for this test, stop disabling it in CI. This reverts commit ae8d23a668755d804748a1cf848426b28338b3d5. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-18pci_ep: fix wrong addressing to barnoRamon Fried
barno was mistakely readed from the target structure, resulting in undefined behavious depending on the previous memory content. fix that. Fixes: bb413337826e ("pci_ep: add pci endpoint sandbox driver") Signed-off-by: Ramon Fried <rfried.dev@gmail.com> [trini: Drop unused bar_idx] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-18board: Arcturus: ucp1020: Removing obsoleted stuffOleksandr Zhadan
Removed one of the defconfig(obsoleted) file and unused CONFIG_MMC_SPI definition to avoid confusion about if this board using non-DM stuff or not. uCP1020 is completely DM free board, tested and runs well. Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com> Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-18blk: Invalidate block cache when switching hwpartWeijie Gao
Some storage devices have multiple hw partitions and both address from zero, for example eMMC. However currently block cache invalidation only applies to block write/erase. This can cause a problem that data of current hw partition is cached before switching to another hw partition. And the following read operation of the latter hw partition will get wrong data when reading from the addresses that have been cached previously. To solve this problem, invalidate block cache after a successful select_hwpart operation. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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