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2013-01-30powerpc/t4240qds: Print FPGA detail versionPrabhakar Kushwaha
Qixis FPGA has tag data contains image name and build date. It is helpful to identify the FPGA image precisely. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/t4240qds: Add support to dump switch settings on t4240qds boardShaveta Leekha
This function is called by "qixis_reset switch" command and switch settings are calculated from qixis FPGA registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/b4860qds: Add support to dump switch settings on b4860qds boardShaveta Leekha
This function is called by "qixis_reset switch" command and switch settings are calculated from FPGA/qixis registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/qixis: enable qixis dump command and add switch dumping commandShaveta Leekha
Remove #ifdef so that "qixis dump" command is always available Add "qixis_reset switch" command to dump switch settings Qixis doesn't have 1:1 switch mapping. We need to reverse engineer from registers to figure out switch settings. Not all bits are available. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/b4860qds: Added Support for B4860QDSYork Sun
B4860QDS is a high-performance computing evaluation, development and test platform supporting the B4860 QorIQ Power Architecture processor. B4860QDS Overview ------------------ - DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 4 GB of memory in two ranks of 2 GB. - DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 2 GB of memory. Single rank. - SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point 16x16 switch VSC3316 - SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point 8x8 switch VSC3308 - USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode. - B4860 UART port is available over USB-to-UART translator USB2SER or over RS232 flat cable. - A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA connector ports 0 and 2 for AMC mode. - The B4860 configuration may be loaded from nine bits coded reset configuration reset source. The RCW source is set by appropriate DIP-switches: - 16-bit NOR Flash / PROMJet - QIXIS 8-bit NOR Flash Emulator - 8-bit NAND Flash - 24-bit SPI Flash - Long address I2C EEPROM - Available debug interfaces are: - On-board eCWTAP controller with ETH and USB I/F - JTAG/COP 16-pin header for any external TAP controller - External JTAG source over AMC to support B2B configuration - 70-pin Aurora debug connector - QIXIS (FPGA) logic: - 2 KB internal memory space including - IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK, DDRCLK1, 2 and RTCCLK. - Two 8T49N222A SerDes ref clock devices support two SerDes port clocks - total four refclk, including CPRI clock scheme Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/mpc85xx:Fix Core cluster configuration loopPrabhakar Kushwaha
Different personalities/derivatives of SoC may have reduced cluster. But it is not necessary for last valid DCFG_CCSR_TP_CLUSTER register to have DCFG_CCSR_TP_CLUSTER[EOC] bit set to represent "End of Clusters". EOC bit can still be set in last DCFG_CCSR_TP_CLUSTER register of orignal SoC which may not be valid for the personality. So add initiator type check to find valid cluster. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30board/freescale/common:Add support of QTAG registerPrabhakar Kushwaha
QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE fields. These fields have FPGA build version, image name and build date information. Add support to parse these fields to have complete FPGA image information. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/mpc85xx:Add support of B4420 SoCPoonam Aggrwal
B4420 is a reduced personality of B4860 with fewer core/clusters(both SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies. Key differences between B4860 and B4420 ---------------------------------------- B4420 has: 1. Fewer e6500 cores: 1 cluster with 2 e6500 cores 2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster. 3. Single DDRC 4. 2X 4 lane serdes 5. 3 SGMII interfaces 6. no sRIO 7. no 10G Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/mpc85xx: Few updates for B4860 cpu changesPoonam Aggrwal
- Added some more serdes1 and serdes2 combinations serdes1= 0x2c, 0x2d, 0x2e serdes2= 0x7a, 0x8d, 0x98 - Updated Number of DDR controllers to 2. - Added FMAN file for B4860, drivers/net/fm/b4860.c Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/mpc8544ds: Add USB controller support for MPC8544DSHongtao Jia
USB controller in uboot is a required feature for MPC8544DS. Without this support there is no 'usb' command in uboot. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMsHongtao Jia
The controller interleaving only takes the usable memory mapped to cs0. In the case of bank interleaving not enabled, only half of dual-rank DIMM will be used. For single-rank DIMM bank interleaving will be auto disabled. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/t4240qds: Update IFC timing for NOR flashYork Sun
Relax parameters to give address latching more time to setup. Tighten parameters to make it overall faster. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30boards/T4240qds:Fix IFC AMASK init as per FPGA register spacePrabhakar Kushwaha
T4240QDS's QIXIS FPGA has 4k register space size and IFC controller's Address Mask Registers is initialised 64K size. So Fix the Address Mask Register initilisation as 4K Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30board/T4240qds:Fix TLB and LAW size of NAND flashPrabhakar Kushwaha
The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's Address Mask Registers is initialised with the same. So Update TLB and LAW size of NAND flash accordingly. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/mpc85xx: Reserve default boot pageYork Sun
The boot page in memory is already reserved so OS won't overwrite. As long as the boot page translation is active, the default boot page also needs to be reserved in case the memory is 4GB or more. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/t4qds: move VSC3316 config data from t4qds.h to t4qds.cTimur Tabi
Static variables should be defined in C files, not header files, because otherwise every C file that #includes the header file will generate a duplicate of the variables. Since the vsc3316_xxx[] arrays are only used by t4qds.c anyway, just put the variables there. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30powerpc/p2041: move Lanes mux to board early initShaohui Xie
Lanes mux currently is configured in eth.c when initializing FMAN ethernet ports, but SRIO and PCIe also need lanes mux, so we move the lanes mux to p2041rdb.c which implements a board-specific initialization and will be called at early stage. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-29Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
2013-01-29Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxTom Rini
2013-01-29Remove unused CONFIG_SYS_I2C_BUS[_SELECT]Michael Jones
"CONFIG_SYS_I2C_BUS" and "CONFIG_SYS_I2C_BUS_SELECT" don't appear anywhere outside of config files. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2013-01-29i2c: mxs: Staticize the functions in the driverMarek Vasut
The local functions in the mxs i2c driver are not marked static, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de>
2013-01-27MIPS: start.S: don't save flush_cache parameters in advanceGabor Juhos
Saving the parameters in advance unnecessarily complicates the code. The destination address is already saved in the 's2' register, and that register is not clobbered by the copy loop. The size of the copied data can be computed after the copy loop is done. Change the code to compute the size parameter right before calling flush_cache, and set the destination address parameter in the delay slot of the actuall call. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27MIPS: start.S: simplify relocation offset calculationGabor Juhos
The current code uses four instructions and a temporary register to calculate the relocation offset and to adjust the gp register. The relocation offset can be calculated directly from the CONFIG_SYS_MONITOR_BASE constant and from the destination address. The resulting offset can be used to adjust the gp pointer. This approach makes the code a bit simpler because it needs two instructions only. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27MIPS: start.S: save reused arguments earlier in relocate_codeGabor Juhos
Save the reused parameters at the beginning of the 'relocate_code' function. This makes the function a bit more readable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27MIPS: start.S: set sp register directlyGabor Juhos
The current code uses two instructions to load the stack pointer into the 'sp' register. This results in the following assembly code: 468: 3c088040 lui t0,0x8040 46c: 251d0000 addiu sp,t0,0 The first instuction loads the stack pointer into the 't0' register then the value of the 'sp' register is computed by adding zero to the value of the 't0' register. The same issue present on the 64-bit version as well: 56c: 3c0c8040 lui t0,0x8040 570: 659d0000 daddiu sp,t0,0 Change the code to load the stack pointer directly into the 'sp' register. The generated code is functionally equivalent to the previous version but it is simpler. 32-bit: 468: 3c1d8040 lui sp,0x8040 64-bit: 56c: 3c1d8040 lui sp,0x8040 Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27MIPS: start.S: fix boundary check in relocate_codeGabor Juhos
The loop code copies more data with one than necessary due to the 'ble' instuction. Use the 'blt' instruction instead to fix that. Due to the lack of suitable hardware the Xburst specific code is compile tested only. However the change is quite obvious. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-22MIPS: start{, 64}.S: fill branch delay slots with NOP instructionsGabor Juhos
The romReserved and romExcHandle handlers are accessed by a branch instruction however the delay slots of those instructions are not filled. Because the start.S uses the 'noreorder' directive, the assembler will not fill the delay slots either, and leads to the following assembly code: 0000056c <romReserved>: 56c: 1000ffff b 56c <romReserved> 00000570 <romExcHandle>: 570: 1000ffff b 570 <romExcHandle> In the resulting code, the second branch instruction is placed into the delay slot of the first branch instruction, which is not allowed on the MIPS architecture. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-22MIPS: convert IO port accessor functions to 'static inline'Gabor Juhos
The currently used 'extern inline' directive causes the following compiler warnings if CONFIG_SWAP_IO_SPACE is defined: <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc_p' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl_p' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc_p' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw_p' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc_p' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl_p' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc_p' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw_p' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw' which is not static [enabled by default] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-22MIPS: use inline directive for __in*s functionsGabor Juhos
All other IO accessor functions are using the 'inline' directive. Use that also for the __in*s to make it consistent with the other variants. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-16Merge remote-tracking branch 'mpc83xx/next'Kim Phillips
2013-01-16README.mips: update known issues and TODOsDaniel Schwierzeck
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-01-16README.qemu-mips: move README file from board to doc directoryDaniel Schwierzeck
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-01-16MIPS: qemu-mips: update and fix example usage in READMEDaniel Schwierzeck
By now U-Boot supports Qemu MIPS for little and big endian as well as 32 bit and 64 bit. Update and fix the example usage in the README to reflect this. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-01-16MIPS: qemu-mips: add '-M mips' switch to the example usage commandGabor Juhos
Using the example command from the README file does not work as expected. qemu shows a text similar to the one below and it hangs. $ qemu-system-mips -L . -nographic Could not open option rom 'pxe-pcnet.rom': No such file or directory qemu-system-mips: pci_add_option_rom: failed to find romfile "vgabios-cirrus.bin" qemu: terminating on signal 15 from pid 19726 This happens because qemu emulates a Malta board by default if the machine type is not defined explicitely on the command line. For a working test, the '-M mips' switch is required: $ qemu-system-mips -M mips -L . -nographic Could not open option rom 'vgabios.bin': No such file or directory U-Boot 2013.01-rc2-00132-g1e8e648-dirty (Jan 08 2013 - 09:06:42) Board: Qemu -M mips CPU: 24Kf proc_id=0x19300 DRAM: 128 MiB ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB Flash: 0 Bytes *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: NE2000 Hit any key to stop autoboot: 0 qemu-mips # Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Vlad Lungu <vlad.lungu@windriver.com>
2013-01-16MIPS: qemu-mips: fix a typo in READMEGabor Juhos
The 'Limitations & comments' section refers to the '-m mips' switch which is not valid. The '-m' switch can be used for setting the virtual RAM size: $qemu-system-mips --help | grep '^-m ' -m megs set virtual RAM size to megs MB [default=128] $ The correct switch for specifying the machine type is '-M'. Fix the text to refer to that. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Vlad Lungu <vlad.lungu@windriver.com>
2013-01-16MIPS: bootm.c: add support for 'prep' and 'go' subcommandsGabor Juhos
The bootm command supports subcommands since long time however those subcommands are not yet usable on MIPS. The patch is based on the ARM implementation, and it adds support for the 'prep' and 'go' subcommands only. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-16MIPS: bootm.c: separate environment initializationGabor Juhos
Move the environment initialization code into a separate function. This make the code reusable for bootm subcommands. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-16MIPS: bootm.c: separate linux jump codeGabor Juhos
Move the actual jump code into a separate function. This make the code reusable for bootm subcommands. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-16MIPS: bootm.c: use debug macro to print debug messageGabor Juhos
The '## Transferring control ...' message is printed only if DEBUG is enabled. Get rid of the 'ifdef DEBUG' statement and use the debug macro instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
2013-01-15Prepare v2013.01Tom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-01-14pxa: Save lr register in relocate_code functionŁukasz Dałek
When u-boot is compiled for PXA25x processor, pxa/start.S is calling cpu_init_crit by BL instruction. BL is overwriting lr register so relocate_code is going into infinite loop. This patch preservs lr register in r12 before calling cpu_init_crit and after function returns restores it. Signed-off-by: Lukasz Dalek <luk0104@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2013-01-14Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2013-01-14Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini
2013-01-14twl4030: fix 'could could' in error messagesPeter Meerwald
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
2013-01-14watchdog.h: Move hw_watchdog_init prototype to end, guardTom Rini
In commit abbab70 we added a prototype for hw_watchdog_init, in a Freescale i.MX watchdog driver. We did not however guard it with an __ASSEMBLY__ check and broke some platforms. Move this to the end of the file with other prototypes and guard it. Signed-off-by: Tom Rini <trini@ti.com>
2013-01-14VIDEO: better document the correct use of CONFIG_FB_ADDRWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Anatolij Gustschin <agust@denx.de>
2013-01-14lcd: restore ability to display 8 bpp BMPs on 16 bpp LCDsNikita Kiryanov
Commit fb6a9aab7ae78c (LCD: display 32bpp decompressed bitmap image) broke the check that allowed U-Boot to display 8 bpp BMPs on a 16 bpp LCD screen, effectively turning this feature off. Restore this feature by changing the check back to the same meaning it originally had. To avoid future confusion, the check has also been rephrased to make its meaning clear. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-01-14Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-01-14Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-01-14video: exynos_fb: Make a call to draw_logo only when CONFIG_CMD_BMP is selectedAjay Kumar
Previously, the call to draw_logo() was happening irrespective of whether we have selected logo or LCD console. With this patch we call draw_logo() only when CONFIG_CMD_BMP is selected. This would even fix the following compilation warning: exynos_fb.c: In function 'draw_logo': exynos_fb.c:74:8: warning: variable 'addr' set but not used [-Wunused-but-set-variable] exynos_fb.c:73:9: warning: variable 'y' set but not used [-Wunused-but-set-variable] exynos_fb.c:73:6: warning: variable 'x' set but not used [-Wunused-but-set-variable] Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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