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2019-04-25arm: socfpga: clean up board config filesSimon Goldschmidt
Remove outdated defines (not used any more, outdated due to DM conversion) from various socfpga files in include/config. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Series-version: 3 Series-changes: 2 - added (this) patch with further cleanups to the socfpga board config files
2019-04-25arm: socfpga: remove CONFIG_SYS_BOOTMAPSZSimon Goldschmidt
socfpga_common.h defines CONFIG_SYS_BOOTMAPSZ to 64 MiB. Since having this define overrides the 'bootm_size' env variable for the whole socfpga platform, let's remove this define from socfpga_common.h and instead rely on the 'bootm_size' env variable (which is initialized to 160 MiB in the same file's default env). This gives users the chance to override it in their own environment. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Series-to: Marek Vasut <marex@denx.de> Series-to: u-boot@lists.denx.de Cover-letter: arm: socfpga: clean up socfpga_common.h This series cleans up the include/configs/socfpga_common.h file a bit. It removes some defines that are used nowhere and cleans up some leftovers after various subsystems have been converted to use DM. END
2019-04-25arm: socfpga: clean up socfpga_common.hSimon Goldschmidt
Remove outdated macros and comments (not used any more, outdated due to DM conversion) from socfpga_common.h. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Series-changes: 3 - changed commit message: s/defines/macros and comments/ Series-changes: 2 - remove even more outdated things
2019-04-25arm: socfpga: move vining_fpga to DM_I2CSimon Goldschmidt
All socfpga boards except for vining_fpga use DM_I2C. Enable DM_I2C for this board and set the EEPROM defines via Kconfig (enabling CONFIG_I2C_EEPROM from MISC). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Series-changes: 2 - added (this) patch to move socfpga_vining to DM_I2C
2019-04-25arm: socfpga: gen5: reduce SPL pre-reloc mallocSimon Goldschmidt
By enabling debug prints in malloc_simple, we can see that SPL for socfpga gen5 does by far not need the 8 KiB malloc pool currently allocated for SPL in pre-reloc phase. On socfpga_socrates, 1304 bytes are currently used (and this increases by ~200 bytes only for the sdram/reset fixes in socfpga-next). To prevent wasting precious SRAM space, let's reduce the initial heap used for SPL to 2 KiB. This is still some hundred bytes more than currently used. Also, the gen5 SPL enables stack and heap in DDR memory pretty early. Only the initial uclass/dm parsing, serial console and DDR initialization is done in the initial heap, so these 2 KiB should be enough for all boards. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2019-04-25arm: socfpga: imply/default common config optionsSimon Goldschmidt
This commit moves common config options used in all socfpga boards to select/imply in Kconfig. This both cleans up the defconfig files as well as makes future changes easier. Options implied/defaulted for all sub-arches: - SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS Options implied/defaulted for implied for A10 & gen5: - FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE Options implied/defaulted for gen5: - SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2019-04-25arm: socfpga: put initial U-Boot stack into DDRSimon Goldschmidt
If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to do that, too. The reason to do so is that this way, U-Boot initial stack can be larger than SPL initial stack. In situations where we want to save the SPL in SRAM for next boot without reloading, this prevents overwriting the SPL DTB in SRAM if U-Boot stack usage gets too high. To achieve this, the malloc definition for a10 is moved up and sligthly changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2019-04-25arm: socfpga: fix comment about SPL memory layoutSimon Goldschmidt
The comment about SPL memory layout for socfpga gen5 is outdated: the initial malloc memory is now at the end of the SRAM, gd is below it (see board_init_f_alloc_reserve). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2019-04-25configs: socfpga: socrates: enable rtc supportSimon Goldschmidt
This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the socrates board. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-04-25arm: socfpga: socrates: make rtc workSimon Goldschmidt
This patch makes the on-board RTC work on the socfpga_socrates board. This rtc is present on the board, but it does not work (fails with a timeout). This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82 RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up on the SCL line seems to be missing. To work around this, enable the weak-pull-up feature on this pin. After applying this patch, the rtc timeout is gone and the 'date' command can access the rtc chip. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-04-25rtc: m41t62: add compatible for m41t82Simon Goldschmidt
This adds a compatible string for m41t82. This ensures that this driver can be used for m41t82 in DM mode, too (asit was usable for this model in non-DM mode before). In addition, the HT bit has to be reset during probe, since the m41t82 chip sets it when entering battery standby mode. This patch ensures this driver works on socfpga_socrates. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-04-25i2c: designware: fix reset handling on socfpga gen5Simon Goldschmidt
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide reset-names). The actual bug was to check 'if (&priv->reset_ctl)', which is never false. While at it, convert the driver to use 'reset_get_bulk' instead of looking at a specific named reset and also make it release the reset on driver remove before starting the OS. Fixes: 622597dee4f6 ("i2c: designware: add reset ctrl to driver") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-25Revert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used without ↵Simon Goldschmidt
DM_I2C_COMPAT" This reverts commit 65a97e7fcf54feb7c4ebe1aee8a572830af4cf51. The 'eeprom' command has been converted to work with DM_I2C in a patch submitted around the same time as this commit: commit 0c07a9b4078d ("eeprom: Add device model based I2C support to eeprom command") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-25eeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUSSimon Goldschmidt
The current device model enabled eeprom code only works if CONFIG_SYS_I2C_EEPROM_BUS is set. This patch makes it work without that define so that the bus number passed to 'eeprom_init' is used. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-24socfpga: add Simon Goldschmidt as co-custodianSimon Goldschmidt
This updates MAINTAINERS and git-mailrc to add me as a co-custodian for socfpga. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Marek Vasut <marex@denx.de>
2019-04-24Merge branch '2019-04-22-master-imports'Tom Rini
- Add and enable brcmnand driver on a number of relevant platforms. Also add and enable LED drivers on more bcm platforms. - Various ARMv8 fixes/improvements, including extending PSCI functionality. - fs_loader improvments - Various FIT/SPL improvements - PCI bugfixes - Poplar platform ethernet support - MediaTek MMC improvements - Android boot improvements
2019-04-24image: android: fix 'iminfo' typoEugeniu Rosca
Fix below CP warning triggered by the 'iminfo' output in another patch: WARNING: 'addrress' may be misspelled - perhaps 'address'? Fixes: 4f1318b29c7a20 ("common: image: minimal android image iminfo support") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
2019-04-24image: android: allow booting lz4-compressed kernelsEugeniu Rosca
According to Android image format [1], kernel image resides at 1 page offset from the boot image address. Grab the magic number from there and allow U-Boot to handle LZ4-compressed KNL binaries instead of hardcoding compression type to IH_COMP_NONE. Other compression types, if needed, can be added later. Tested on H3ULCB-KF using the image detailed in [2]. [1] Excerpt from include/android_image.h +-----------------+ | boot header | 1 page +-----------------+ | kernel | n pages +-----------------+ | ramdisk | m pages +-----------------+ | second stage | o pages +-----------------+ [2] => iminfo 4c000000 ## Checking Image at 4c000000 ... Android image found kernel size: 85b9d1 kernel address: 48080000 ramdisk size: 54ddbc ramdisk addrress: 4a180000 second size: 0 second address: 48000800 tags address: 48000100 page size: 800 os_version: 1200012a (ver: 0.9.0, level: 2018.10) name: cmdline: buildvariant=userdebug Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-04-24test: env: Enable env unit tests by defaultHeinrich Schuchardt
If CONFIG_UNIT_TEST is enabled we should enable the individual tests by default to ensure good test coverage. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-04-23ARMv8: PSCI: Fix PSCI_TABLE relocation issueLars Povlsen
This fixes relaction isses with the PSCI_TABLE entries in the psci_32_table and psci_64_table. When using 32-bit adress pointers relocation was not being applied to the tables, causing PSCI handlers to point to the un-relocated code area. By using 64-bit data relocation is properly applied. The handlers are thus in the "secure data" area, which is protected by /memreserve/ in the FDT. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-04-23bootm: Simplying cache flush codeTrent Piepho
The cache flush of the kernel load area needs to be aligned outward to the DMA cache alignment. The operations are simpler if we think of this as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find the length of the flushed region by subtracting the former from the latter. Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Trent Piepho <tpiepho@impinj.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23malloc: Fix memalign not honoring alignment prior to full malloc initAndreas Dannenberg
When using memalign() in a scenario where U-Boot is configured for full malloc support with simple malloc not explicitly enabled and before the full malloc support is initialized, a memory block is being allocated and returned without the alignment parameter getting honored. Fix this issue by replacing the existing memalign pre-full malloc init logic with a call to memalign_simple() this way ensuring proper alignment of the returned memory block. Fixes: ee038c58d519 ("malloc: Use malloc simple before malloc is fully initialized in memalign()") Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-23spl: spl_nand.c: Add NAND loading messageStefan Roese
This patch adds a short message to the SPL NAND loader, which displays the source and destinations addresses including the size of the loaded image, like this: U-Boot SPL 2019.04-rc3-00113-g486efd8aaf (Mar 15 2019 - 14:18:02 +0100) Trying to boot from NAND Loading U-Boot from 0x00040000 (size 0x000a0000) to 0x22900000 I find this message quite helpful - hopefully others do so as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-04-23ARM: MediaTek: Add support for MT8516 SoCFabien Parent
Add support for MediaTek MT8516 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-04-23pinctrl: add driver for MT8516Fabien Parent
Add Pinctrl driver for MediaTek MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23clk: mediatek: add driver for MT8516Fabien Parent
Add clock driver for MediaTek MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com> [trini: Redo whitespace] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-23clk: mediatek: add support for SETCLR_INV and NO_SETCLR flagsFabien Parent
Add the implementation for the CLK_GATE_SETCLR_INV and CLK_GATE_NO_SETCLR flags. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23mmc: mtk-sd: fix configuration option checkFabien Parent
We either need to use IS_ENABLED(CONFIG_FOO) or CONFIG_IS_ENABLED(FOO). IS_ENABLE(FOO) will always return false. This commit fixes the comparison by using the CONFIG_IS_ENABLED(FOO) syntax. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-04-23mmc: mtk-sd: add support for MT8516Fabien Parent
Add config for handling MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23mmc: mtk-sd: add source_cg clock supportFabien Parent
Some MediaTek SoC need an additional clock "source_cg". Enable this new clock. We reuse the same clock name as in the kernel. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23poplar: enable Ethernet driver supportShawn Guo
The 'phy' reset of gmac device in kernel device tree is not generic enough for u-boot to use, so we need to overwrite the 'resets' property as needed. With this device tree fixup and poplar_defconfig changes, Ethernet starts working on Poplar board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23net: add higmacv300 Ethernet driver for HiSilicon platformShawn Guo
It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon SoCs like Hi3798CV200. It's based on a downstream U-Boot driver, but quite a lot of code gets rewritten and cleaned up to adopt driver model and PHY API. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23reset: add reset driver for HiSilicon platformShawn Guo
It adds a Driver Model compatible reset driver for HiSlicon platform. The driver implements a custom .of_xlate function, and uses .data field as reset register offset and .id field as bit shift. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23reset: add polarity field into struct reset_ctlShawn Guo
Some reset controllers support different polarities for reset operation, so let's add a polarity field into struct reset_ctl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKSThierry Reding
If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale with the number of DRAM banks, otherwise we will end up with too little space in the hose->regions array to store all system memory regions. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23pci: Add boundary check for hose->regionsThierry Reding
Make sure that we don't overflow the hose->regions array, otherwise we would end up overwriting the hose->region_count field and cause mayhem to ensue. Also print an error message when we'd be overflowing because it indicates that there aren't enough regions available and the number needs to be increased. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23ARM: da850evm: Remove legacy MMC codeAdam Ford
With the migration to DM in SPL and the DT support, the old legacy code is no longer neaded, so this patch removes it Signed-off-by: Adam Ford <aford173@gmail.com>
2019-04-23bcm963158: enable led supportPhilippe Reynes
Enable the led support in the configuration of the board bcm963158. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23dt: bcm963158: enable led controllerPhilippe Reynes
Enable the led controller in the device tree of the board bcm963158. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23dt: bcm63158: add led controllerPhilippe Reynes
Add the led controller in the bcm63158 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23led: bcm6858: allow to use this driver on ARCH_963158Philippe Reynes
Allow the led bcm6858 driver to be used on bcm63158. They have the same led controller. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23bcm968580xref: enable led supportPhilippe Reynes
Enable the led support in the configuration of the board bcm968580xref. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23dt: bcm968580xref: enable led controllerPhilippe Reynes
Enable the led controller in the device tree of the board bcm968580xref. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22dt: bcm6858: add led controllerPhilippe Reynes
Add the led controller in the bcm6858 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22led: add initial support for bcm6858Philippe Reynes
The driver add the support of the led IP on bcm6858. This led IP can drive up to 32 leds, and can handle blinking. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-22arm: arm64 32bit address relocationIbai Erkiaga
Current relocation code is limited to 21bit PC-relative addressing which might not be enough for bigger code sizes. The following patch increases the addressing to 32bit PC-relative. This feature is specially interesting if U-Boot is build without optimiation (-O0) as the text section is increased significativelly. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
2019-04-22travis: Add srecord packageMarek Vasut
At least MIPS Boston currently uses srec_cat tool to fiddle with srecords. There will be other platforms coming, so install the tool to prevent build problems. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Tom Rini <trini@konsulko.com>
2019-04-22Add target to generate initial environmentStefano Babic
The initial environment is linked to the u-boot binary. Modifying the environment from User Space with the env tools requires that the tools are always built together with the bootloader to be sure that they contain the initial environment in case no environment is stored into persistent storage or when a board boots with just the default environment. This makes difficult for distros to provide a general package to access the environment. A simpler way is if the tools are generic for all boards and a configuration file is given to provide the initial environment. The patch just generates the initial environment by extracting it from the compiled object. This file can then be used for tools in user space to initialize the environment. Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-04-22spl: ymodem: Add support for loading full fitImagesMarek Vasut
Add support for loading fully featured fitImages over YModem in SPL. This is useful when various advanced features of full fitImages are needed in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com>
2019-04-22fit: load all fragments from the extra configurationsPeter Ujfalusi
Currently only the first fdt is loaded from the extra configuration of FIT image. If the configuration have multiple fdt, load them all as well. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>