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2020-05-15Merge branch '2020-05-15-misc-bugfixes'Tom Rini
- A number of symbol name consistency updates - JFFS2 bugfix - Use /* fallthrough */ for now to help at least gcc know when we're intentionally not 'break;'ing in a switch statement, we'll adopt fallthrough; later on. - Assorted other fixes
2020-05-15lib: rsa: avoid overriding the object name when already specifiedJan Luebbe
If "object=" is specified in "keydir" when using the pkcs11 engine do not append another "object=<key-name-hint>". This makes it possible to use object names other than the key name hint. These two string identifiers are not necessarily equal. Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Bastian Krause <bst@pengutronix.de> Reviewed-by: George McCollister <george.mccollister@gmail.com>
2020-05-15MAINTAINERS: POWERPC MPC8XX: Update email addressChristophe Leroy
Our email addresses have changed from @c-s.fr to @csgroup.eu Update entry in MAINTAINERS Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2020-05-15tools: ftdgrep: use /* fallthrough */ as neededHeinrich Schuchardt
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled. Let's use it consistently. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-15tools: mkimage: use /* fallthrough */ as neededHeinrich Schuchardt
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled. Let's use it consistently. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-15common/board_f: avoid -Wtype-limits warningHeinrich Schuchardt
CONFIG_SYS_SDRAM_BASE maybe zero. Avoid a build warning when compiling with -Wtype-limits. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-15spl: Always define preloader_console_initSamuel Holland
A large number of boards call preloader_console_init unconditionally. Currently, they fail to build with CONFIG_SPL_SERIAL=n, because the function is undefined in that case. To fix the build, always define preloader_console_init, but make it no-op when CONFIG_SPL_SERIAL=n. For the few boards that did check for CONFIG_SPL_SERIAL before calling preloader_console_init, remove the checks, since the function can now be called unconditionally. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-15lib: rsa: Also check for presence of r-squared propertyJan Kiszka
Better than crashing later if it is missing. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-05-15Makefile: add file 'defconfig' to clean targetHeinrich Schuchardt
File 'defconfig' is a build artifact of 'make savedefconfig'. Remove it when cleaning. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-15JFFS2: Add useful fields into listsPetr Borsodi
The inode list uses version and ino, the dirent list uses version and pino. This information is collected during scanning, reducing accesses to flash and significantly speeding up ls and read. Signed-off-by: Petr Borsodi <petr.borsodi@i.cz>
2020-05-15JFFS2: Process obsolete nodes as well as accurate onesPetr Borsodi
Obsolete nodes (ie. without the JFFS2_NODE_ACCURATE flag) were ignored because they had seemingly invalid crc. This could lead to finding the phantom node header in obsolete node data. Signed-off-by: Petr Borsodi <petr.borsodi@i.cz>
2020-05-15drivers/reset/Kconfig: fix typoTrevor Woerner
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32Trevor Woerner
Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRATrevor Woerner
Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner
Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15arm: orion5x: finish moving SoC to mach-orion5xTrevor Woerner
The SPL linker script had been left in arch/$(ARCH)/cpu/$(CPU)/$(SOC); therefore move it to the already-established arch/$(ARCH)/mach-$(SOC) location. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner
Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15arch/arm/Makefile: sort machine namesTrevor Woerner
The comment immediately above the block of machine directory names implored users to keep the macro names sorted, but, alas, this is no longer the case. Put the list of machine directory names back in alphanumerical order by CONFIG_* macro name, as the comment asks. Sort all the symbols as though they all followed the convention of having the string "ARCH_" in the middle of their definitions. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15arm: lpc32xx: move SoC to mach-lpc32xxTrevor Woerner
Following the example of most other SoCs in arch/$(ARCH)/cpu/$(CPU)/$(SOC) move the lpc32xx code from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpc32xx. Following the checklist from commit 01f14456306c ("ARM: prepare for moving SoC sources into mach-*"): [1] move files from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpx32xx [2] add machine entry to arch/arm/Makefile [3] remove "obj-y += ..." from arch/arm/cpu/arm926ejs/Makefile [4] fix the Kconfig file path in arch/arm/Kconfig [5] (no MAINTAINERS update) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rsa: don't use malloc.h in rsa-sign.cJonathan Gray
stdlib.h is the header for malloc since at least c89/c90. There is no system malloc.h on OpenBSD and trying to use malloc.h here falls back to the U-Boot malloc.h breaking the build of qemu_arm64. Fixes: 336d4615f8 ("dm: core: Create a new header file for 'compat' features") Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2020-05-15configs: mt7629: support usb host and udiskChunfeng Yun
Enable modules to support download image from usb Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-05-15Makefile: remove m68k GCC 3.4 workaroundMasahiro Yamada
This code dates back to 2006, commit 483a0cf804df ("Fixes for gcc 3.4 based m68k toolchain,"). GCC 3.4 is so old. We do not support it. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-05-15lib: Allow MD5 to be enabled in SPLSimon Glass
At present the MD5 option cannot be enabled by board configs since it has no Kconfig name. It is generally enabled, so long as FIT support is present. But not all boards use FIT, particularly in SPL Fix this and add an option for SPL as well. This allows board code to call md5() even if FIT support is not enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-15pci: Fix typo in definition for PCI_DEVSimon Glass
Fix a typo in the comment. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-15usb: Update struct usb_device to indicate speed enumSimon Glass
The speed member actually uses an enum, so add this to the comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-14kbuild: spl: Add shrunk arch-dtbs to targets listJan Kiszka
This avoids needless rebuilding. Fixes: 2f57c95100f2 ("spl: dm: Make it possible for the SPL to pick its own DTB from a FIT") CC: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-05-14kbuild: spl: Fix parallel buildJan Kiszka
The dts dir must exists when running this rule. That missing dependency broke e.g. "make -j" for the am65x targets. Fixes: 2f57c95100f2 ("spl: dm: Make it possible for the SPL to pick its own DTB from a FIT") CC: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-05-14Merge tag 'u-boot-stm32-20200514' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - stm32mp1: migrate MTD and DFU configuration in Kconfig - stm32mp1: add command stm32prog - stm32mp1: several board and arch updates - stm32mp1: activate data cache in SPL and before relocation - Many improvment for AV96 board and DHCOR SoM (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM) - clk: stm32mp1: fix CK_MPU calculation - DT alignment of stm32mp1 device tree with Linux 5.7-rc2
2020-05-14Merge tag 'rpi-next-2020.07' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi - fix phy configuration for RPi4's bcmgenet - sync RPi4's env size with other RPi configs - add kconfig option to reserver more pages in the EFI mem map - add support for SDMA which is used by RPi4 - fix corner case boot bug for RPi3 32-bit
2020-05-14ARM: dts: stm32mp1: DT alignment with Linux 5.7-rc2Patrick Delaunay
DT alignment with Linux 5.7-rc2, including the kernel commits 431c89e6f323 ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards 79e965053872 ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards 877db62ea516 ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards 7519e95ba5f8 ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards f68e2dbc591a ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1 d6210da4f8bf ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x b65b6fc56925 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c 1c1cf5996cfb ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1 bef15fc0fad9 ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1 b7fc0a87b9ac ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx a5e557655285 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards 8bc631b650a6 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1 fccd6a577bb3 ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board cc775a83db65 ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151 c5fae093511b ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1 9879e2165758 ARM: dts: stm32: add USB OTG pinctrl to stm32mp15 82ac8a81f985 ARM: dts: stm32: add USB OTG full support on stm32mp151 8714b26e2863 ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node a7959919709e ARM: dts: stm32: Add UART8 pins A pinmux entry on stm32mp1 4d7c53a684da ARM: dts: stm32: Add USART3 pins A pinmux entry on stm32mp1 80ab128332ee ARM: dts: stm32: Add SAI2A pins B pinmux entry on stm32mp1 ab7f98c0c546 ARM: dts: stm32: Add Ethernet0 RMII pins A pinmux entry on stm32mp1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14clk: stm32mp1: fix CK_MPU calculationLionel Debieve
When the CK_MPU used PLL1_MPUDIV, the current rate is wrong. The clock must use stm32mp1_mpu_div as a shift value. Fix the check value used to enter PLL_MPUDIV. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14mmc: stm32_sdmmc2: change the displayed config namePatrick Delaunay
Change the mmc displayed name in U-Boot for stm32_sdmmc2 driver to “STM32 SD/MMC”. This stm32_sdmmc2 driver is for version 2 of the ST HW IP SDMMC but the displayed name "STM32 SDMMC2" is confusing for user, between the instance of SDMMC and the device identifier of MMC. For example on EV1 board, we have: STM32MP1> mmc list STM32 SDMMC2: 0 (SD) STM32 SDMMC2: 1 (eMMC) Changed to more clear: STM32MP1> mmc list STM32 SD/MMC: 0 (SD) STM32 SD/MMC: 1 (eMMC) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14arm: stm32mp: activate data cache on DDR in SPLPatrick Delaunay
Activate cache on DDR to improve the accesses to DDR used by SPL: - CONFIG_SPL_BSS_START_ADDR - CONFIG_SYS_SPL_MALLOC_START Cache is configured only when DDR is fully initialized, to avoid speculative access and issue in get_ram_size(). Data cache is deactivated at the end of SPL, to flush the data cache and the TLB. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14arm: stm32mp: activate data cache in SPL and before relocationPatrick Delaunay
Activate the data cache in SPL and in U-Boot before relocation. In arch_cpu_init(), the function early_enable_caches() sets the early TLB, early_tlb[] located .init section, and set cacheable: - for SPL, all the SYSRAM - for U-Boot, all the DDR After relocation, the function enable_caches() (called by board_r) reconfigures the MMU with new TLB location (reserved in board_f.c::reserve_mmu) and re-enable the data cache. This patch allows to reduce the execution time, particularly - for the device tree parsing in U-Boot pre-reloc stage (dm_extended_scan_fd =>dm_scan_fdt) - in I2C timing computation in SPL (stm32_i2c_choose_solution()) For example, the result on STM32MP157C-DK2 board is: 1,6s gain for trusted boot chain with TF-A 2,2s gain for basic boot chain with SPL For information, as TLB is added in .data section, the binary size increased and the SPL load time by ROM code increased (30ms on DK2). But early malloc can't be used for TLB because arch_cpu_init() is executed before the early poll initialization done in spl_common_init() called by spl_early_init() So it too late for this use case. And if I initialize the MMU and the cache after this function it is too late, as dm_init_and_scan and fdt parsing is also called in spl_common_init(). And .BSS can be used in board_init_f(): only stack and global can use before BSS init done in board_init_r(). So .data is the better solution without hardcoded location but if you have size issue for SPL you can deactivate cache for SPL only (with CONFIG_SPL_SYS_DCACHE_OFF). Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: stm32: Hog GPIO PF7 high on DHCOM to unlock SPI NOR nWPMarek Vasut
The SPI NOR nWP line is connected to GPIO PF7 on the SoM, pull the GPIO line high by default to clear SPI NOR WP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: stm32: Define I2C EEPROM bus and address on DHCOMMarek Vasut
Define I2C EEPROM bus and address, so that the 'eeprom' command uses the correct ones and does not generate the following error: eeprom_rw_block: Cannot find udev for a bus 0 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: dts: stm32: Synchronize DDR setttings on DH SoMsMarek Vasut
Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put them into use by the board file instead of the default ones. These new DRAM settings are a better fit for the SoMs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: dts: stm32: Fix AV96 and DHCOR splitMarek Vasut
The commit 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board") was not applied correctly and in full, and omitted an important split of the SoM into 3V3 and 1V8 options. The Avenger96 board is based on the 1V8 IO option of the DHCOR SoM, however this is an optional modification of the 3V3 IO DHCOR SoM with extra on-SoM regulator to cater for the 96boards 1V8 IO requirements. Reinstate the split between the 1V8 and 3V3 IO variants. Fixes: 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14stm32mp1: Fix warning display when 1.5A power supply is usedPatrice Chotard
On DK1/2 board, when a 1.5A power supply is detected, a warning message is displayed. In this message, "1.5mA" is displayed instead of "1.5A". Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14configs: stm32mp1: activate CONFIG_ERRNO_STRPatrick Delaunay
Add support of errno_str, used in command pmic and regulator. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14configs: stm32mp1: activate Ethernet PHY RealtekChristophe Roullier
Need Realtek driver to manage in RTL8211F the configuration of the LED. Initialize LCR (LED Control Register) to configure green LED for Link, yellow LED for Active Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14ARM: dts: stm32mp15: use DDR3 files generated by STM32CubeMXPatrick Delaunay
Use the DDR3 dtsi files generated by STM32CubeMX 5.6.0 Speed Bin Grade = using DDR3-1066G / 8-8-8 and all others parameters at default value. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14gpio: stm32: support gpio ops in SPLPatrick Delaunay
The GPIO support is needed in SPL to managed the SD cart detect used on stm32mp157c-ev1 and dk2 board. So this patch activates the associated code in stm32_gpio.c. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: add timeout for I/O compensation readyPatrick Delaunay
This patch avoids infinite loop when I/O compensation failed, it adds a 1s timeout to detect error. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: remove bootdelay configuration for usb or serial bootPatrick Delaunay
It is not allowed to change the user setting of bootdelay, so remove the check of the boot-source to disable it dynamically in board_late_init() Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14board: stm32mp1: set environment variable fdtfilePatrick Delaunay
For booting Linux in the generic distro mechanism and support of FDTDIR in extlinux.conf , cmd/pxe.c retrieves the FDT file name from "fdtfile" environment variable. Dynamically build this variable with compatible of STMicroelectronics boards. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: gt9147 IRQ before reset on EV1Patrick Delaunay
Software workaround for I2C issue on EV1 board, configure the IRQ line for touchscreen before LCD reset to fix the used I2C address. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: update management of boot-ledPatrick Delaunay
Force boot-led ON and no more rely on default-state. This patch avoid device-tree modification for U-Boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14board: stm32mp1: Keep error led ON in case of low power detectionPatrice Chotard
Since commit commit dd2810851eb1 ("stm32mp1: board: support of error led on ed1/ev1 board") the attended behavior was no more respected in case of low power source detection on DK2. The expected behavior is either the error LED keeps blinking for ever, or blinks 2 or 3 times and must stay ON. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14arm: stm32mp: spl: update error management in board_init_fPatrick Delaunay
Call hang when an error is detected for probe of any driver needed for console or DDR init: clk, reset and pincontrol NB: previous behavior with a return in board_init_f() was not correct; DDR is not initialized and SPL execution can't continue Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
generated by cgit (git 2.34.1) at 2025-01-01 03:51:08 +0000