| Age | Commit message (Collapse) | Author |
|---|
|
Some functions have different behaviour when the given address is 0
(assumed to be NULL by the function).
find_ram_base() does not return 0 anymore so it's safe to remove those
offsets.
Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
|
|
Some functions test that the given address is not NULL (0) and fail or
have a different behaviour if that's the case (e.g. hexport_r).
Let's make the RAM base address to be not zero by setting it to 2MiB if
that's the case.
2MiB is chosen because it represents the size of an ARM LPAE/v8 section.
Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
|
|
The error message should start with `## Error: ` so that it's easily
detectable by tests without needing to have a complex regexp for
matching all possible error message patterns.
Let's add the `## Error: ` prefix to the error messages since it's the
one already in use.
Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
|
|
HSE and LSE bypass shall support both analog and digital signals.
This patch add a way to select digital bypas case in the device tree
and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register
during clock tree initialization.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Add ADC clock gating, that may be used by STM32 ADC.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Alignment with kernel clock driver
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
This patch add clk_enable/clk_disable/clk_get_rate support for
- DSI_PX
- LTDC_PX
- DSI_K (only get rate)
These clocks are needed for LTDC and DSI drivers with latest device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
the function compute the VCO PLL freq, used in
- stm32mp1_read_pll_freq()
- pll_set_rate()
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
# Conflicts:
# drivers/clk/clk_stm32mp1.c
|
|
This patch define RCC_PLLNCFGR2_SHIFT to reuse it in
the pll function for set rate.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
|
|
Configure clock tree for all the devices.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Add support of stm32mp157c-ev1, the evaluation board with pmic stpmu1
(ev1 = mother board + daughter ed1) with device tree.
EV1 is the selected board by default in basic defconfig.
PS: CONFIG_PINCTRL_FULL activation avoid to increase
SYS_MALLOC_F_LEN (Early malloc usage: 2034)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
needed for RCC MISC driver and sysreset with syscon
in SPL
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.
We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
This patch rebase the stm32mp1 device tree source from
linux kernel v4.18-rc1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Use new API syscon_node_to_regmap in sysreset_syscon driver
for compatible "syscon-reboot"; that's avoid the need of explicit
syscon binding for "regmap" handle.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
For qemu-x86 the date command produces wrong days of the week:
Date: 2018-07-06 (Saturday) Time: 18:02:03
Date: 2018-07-07 (unknown day) Time: 21:02:06
According to a comment in the Linux driver the mc146818 only updates the
day of the week if the register value is non-zero.
Sunday is 1, saturday is 7 unlike in U-Boot (see data sheet
https://www.nxp.com/docs/en/data-sheet/MC146818.pdf).
So let's use our library function to determine the day of the week.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
|
|
Extend BOOTDELAY help text to cover its additional usage within the
bootmenu command.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
|
|
The test for (CONFIG_BOOTDELAY >= 0) has been in U-Boot since the
beginning, but the meaning of it has changed over time. Allow the
default to be set for any value, including -ve ones. This allows
(for example) CONFIG_ENV_IS_NOWHERE to have values for bootdelay in
its compiled in environment.
The only thing this changes is where the default for bootdelay can be
fetched from; before this change you get a compiled in default, after
you'll pull it from the default value in the environment, but both values
will be the same. Also if there's a value set in the environment then
that will take precedence (as before).
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
|
|
The comparison
logical > item->logical + item->length
in btrfs_map_logical_to_physical is wrong and should be instead
logical >= item->logical + item->length
For example, if
item->logical = 4096
item->length = 4096
and we are looking for logical = 8192, it is not part of item (item is
[4096, 8191]). But the comparison is false and we think we have found
the correct item, although we should be searing in the right subtree.
This fixes some bugs I encountered.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
|
|
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
|
|
RAW mode ARGS sector doesn't have to be used for all falcon boot. Skip
loading ARGS sectors if not defined.
Signed-off-by: York Sun <york.sun@nxp.com>
|
|
The wrapper #ifndef is currently missing in acpi_table.h. Add it to
prevent it from being included multiple times.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
write_acpi_tables() currently touches ACPI hardware to switch to
ACPI mode at the end. Move such operation out of this function,
so that it only does what the function name tells us.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
acpi_find_fadt(), acpi_find_wakeup_vector() and enter_acpi_mode()
are something unrelated to ACPI tables generation. Move these to
a separate library.
This also fixes several style issues reported by checkpatch in the
original codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
This converts all x86 boards over to DM sysreset.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
In preparation for the reset driver conversion, eliminate the
reset_cpu() call in the FSP init path as it's too early for the
reset driver to work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
It's good to print a message when doing reset.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This adds a reset driver for tangier processor.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
This adds the DM sysreset driver for EFI application support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This adds a generic reset driver for x86 processor.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This adds full reset bit in the reset register value in the ACPI FADT
table, so that kernel can do a thorough reboot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Our implementation of rtc_to_tm() cannot handle dates of more than
0x7fffffff seconds after 1970-01-01.
Adopt the Linux kernel implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
|
|
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
- add a devicetree for each variant (mmc, spi, nand)
- drop unneeded code from board and bur/common
- drop unneeded stuff from config header files
- minor adaptions to be compliant with driver model (requesting gpio,..)
- harmonize the commandset over all brppt1 targets
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
This is needed for having access to the devices below this bus, most
important is uart and boot-device (spi, mmc, ...) in SPL stage.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
With this commit we do:
- set the bootdelay in all brppt1 defconfigs to 0, this makes
development easier, since we can break into serial console.
- move CONFIG_BOOTCOMMAND from header file to defconfig
- introduce b_mode variable for selecting the final boot-target.
This b_mode represents the boot-switch, which can found on most b&r
targets. On the brppt1 this boot-switch is derived from some gpio and
the bootcounter within the RTC block, making it so possible to force
a boot-target (as example for repair-case).
- refactor the environment for booting new flexible way
primary we want to get some bootscr.img within the mass-storage,
this script then loads everything needed for the boot.
For legacy reason we implement the t30lgcy#x boot targets, booting the
already delivered linux-images.
- make space for the cfgscr within mtdparts on brppt1_nand
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
On other OS, not one provided by B&R, it is not guaranteed that there
are factory-settings within a devicetree. So we must not treat the
absence of them as error.
Further we've the fact that on different version of the device-tree
files there are different namings of the factory-settings, we consider
this with searching for an alternative name.
changing things as following:
- don't treat as error if the bootloader version cannot written into
devicetree.
- since the naming of the factory-settings are different in different
versions of the provided device-tree we search for the alternate name
"/fset"
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
The falcon mode was never used on this board, there is also no plan to
use it. So drop this dead code.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
If a board-code calls the pmicsetup(u32 mpupll) with a mpupll value
!= 0 it wants to force some frequency with the value provided by mpupll.
Setting up 1 GHz is wrong here.
Nobody did take notice about that yet, since every board calls this
function with zero.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
This interface names may vary over different products, to consider this
fact we replace the interface label "IF1" and "IF2" on the summary
screen with some more generic wording "MAC1" and "MAC2".
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
On this linux target long time ago the OS is using DRM driver for
handling video output, the pre initialization of u-boot and the display
summary screen is obsolete. With this patch we drop the LCD-support from
thisd board.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
Since we're going to drop LCD-support on brppt1 boards, we have to make
this stuff here optional and remove the #error path.
We also move out the ft_board_setup(...) from this #ifdef because
there's no relationship with the LCD-code and on the other hand this is
still needed in future even with LCD-support off.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
The linux systems running on the brppt1 targets are using modern DRM
drivers since long time ago. Further we are going to drop the LCD
support completely on this board, so the simple-framebuffer setup
becomes obsolete.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
This patch drops the lcd-screen setup, the summary screen and getting
mac-addresses based on a previous loaded device-tree for linux targets.
Selecting those linux target is simple, since we have only the brppt1.
In detail we do:
- drop the common lcd-setup code which relys on a fdt_blob
- drop the common dtb loading mechanism
- drop the now obsolete CONFIG_USE_FDT from board header and whitelist.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
|
|
Add basic smem sandbox testing.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Add Sandbox driver for SMEM. mostly stub operations.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Added necessary nodes for Qualcomm smem driver.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Added necessary nodes for Qualcomm smem driver.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.
Adapted from the Linux driver (4.17)
Changes from the original Linux driver:
* Removed HW spinlock mechanism, which is irrelevant
in U-boot particualar use case, which is just reading from the smem.
* Adapted from Linux driver model to U-Boot's.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
