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2020-06-02imx: Remove ARCH= references from documentationTom Rini
When building U-Boot we select the architecture via Kconfig and not ARCH being passed in via the environment or make cmdline. Cc: Adam Ford <aford173@gmail.com> Cc: Vanessa Maegima <vanessa.maegima@nxp.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02amlogic: Remove ARCH= references from documentationTom Rini
When building U-Boot we select the architecture via Kconfig and not ARCH being passed in via the environment or make cmdline. Cc: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Cc: u-boot-amlogic@groups.io Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02Azure: Add 'tools-only' build for macOS X hostsTom Rini
Add building the 'tools-only' target on macOS X 'Catalina'. Hopefully this will catch changes to host tools that are incompatible on BSD style environments. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02mkimage: Default to adding a crc32 hash with '-f auto'Simon Glass
This option currently does not add any sort of hash to the images in the FIT. Add a hash node requesting a crc32 checksum, which at least provides some protection. The crc32 value is easily ignored (e.g. in SPL) if not needed. and takes up only about 48 bytes per image, including overhead. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Denk <wd@denx.de>
2020-06-02tools: fw_env: Fix warning when reading too littleHarald Seiler
When using CONFIG_ENV_IS_IN_FAT and the config-file specifies a size larger than what U-Boot wrote into the env-file, a confusing error message is shown: $ fw_printenv Read error on /boot/uboot.env: Success Fix this by showing a different error message when read returns too little data. Signed-off-by: Harald Seiler <hws@denx.de>
2020-06-02image: android: fix abootimg supportChristian Gmeiner
abootimg creates images where all load addresses are 0. Android Boot Image Info: * file name = artifacts/fastboot.img * image size = 31381504 bytes (29.93 MB) page size = 2048 bytes * Boot Name = "" * kernel size = 9397406 bytes (8.96 MB) ramdisk size = 21981144 bytes (20.96 MB) * load addresses: kernel: 0x00000000 ramdisk: 0x00000000 tags: 0x00000000 Without this fix we end in a data abort: Booting kernel at 0x15000000... * kernel: cmdline image address = 0x15000000 Kernel load addr 0x00000000 size 9178 KiB Kernel command line: ip=dhcp console=ttymxc0,115200n8 kernel data at 0x15000800, len = 0x008f649e (9397406) * ramdisk: cmdline image address = 0x15000000 RAM disk load addr 0x00000000 size 21473 KiB ramdisk start = 0x158f7000, ramdisk end = 0x16def35c kernel loaded at 0x00000000, end = 0x00000000 Loading Kernel Image data abort pc : [<8ff8c004>] lr : [<5d7ac70f>] sp : 8f57ed64 ip : 48f17668 fp : 00000000 r10: 00000002 r9 : 8f58aed0 r8 : 03fa4c58 r7 : 5e842497 r6 : fbe73965 r5 : 7c459955 r4 : df020fde r3 : 1b7aa45b r2 : 007f23fe r1 : 15104820 r0 : 00104000 Flags: nzCv IRQs off FIQs off Mode SVC_32 (T) Code: f07c e8b1 51f8 3a20 (e8a0) 51f8 Resetting CPU ... resetting ... Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-06-02dma-mapping: Add header file for ARCH_DMA_MINALIGNSimon Glass
This is defined in the asm/cache.h header file. Update this header file to include it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-06-02usb: ohci: Add header file for ARCH_DMA_MINALIGNSimon Glass
This is defined in the asm/cache.h header file. Update this header file to include it so it gets the same value consistently across U-Boot. This fixes 'usb host' on omapl138_lcdk. Fixes: 90526e9fbac ("common: Drop net.h from common header") Reported-by: Adam Ford <aford173@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-06-02test/py: use actual core count for parallel buildsHeinrich Schuchardt
When building U-Boot we should not blindly use make -j8 but consider the actual core count given by os.cpu_count(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2020-06-01Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Corrected some FSP-M/FSP-S settings for Chromebook Coral - ICH SPI driver and mrccache fixes for obtaining the SPI memory map - Fixed various warnings generated by latest version IASL when compiling ACPI tables
2020-06-02x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridgeBin Meng
PCI Firmware specification requires _UID() and doesn't require _ADR() to be set. Replace latter by former. This fixes the following warning reported by ACPICA 20200430: Warning 3073 - Multiple types (Device object requires either a _HID or _ADR, but not both) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02x86: baytrail: acpi: Replace _ADR() by _UID() in description of PCI host bridgeBin Meng
PCI Firmware specification requires _UID() and doesn't require _ADR() to be set. Replace latter by former. This fixes the following warning reported by ACPICA 20200430: Warning 3073 - Multiple types (Device object requires either a _HID or _ADR, but not both) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02x86: baytrail: acpi: Create buffers outside of the methodsBin Meng
Create buffers outside of the methods as ACPICA 20200430 complains about this: Remark 2173 - Creation of named objects within a method is highly inefficient, use globals or method local variables instead (\_SB.PCI0.LPCB.IURT._CRS) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02x86: tangier: acpi: Drop _HID() where enumerated by _ADR()Andy Shevchenko
ACPICA complains that either _HID() or _ADR() should be used. For General Purpose DMA we may not drop the _ADR() because the device is enumerated by PCI. Thus, simple drop _HID(). Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: tangier: acpi: Drop _ADR() where _HID() is presentAndy Shevchenko
ACPICA complains that either _HID() or _ADR() should be used. Drop _ADR() where _HID() is present. Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: tangier: acpi: Replace _ADR() by _UID() in description of PCI host bridgeAndy Shevchenko
PCI Firmware specification requires _UID() and doesn't require _ADR() to be set. Replace latter by former. Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: tangier: acpi: Create buffers outside of the methodsAndy Shevchenko
Create buffers outside of the methods as ACPICA 20200214 complains about this: Remark 2173 - Creation of named objects within a method is highly inefficient, use globals or method local variables instead Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: minnowmax: Add support for Winbond flashSimon Glass
This allows the use of the Dediprog em100pro so I can test SPI flash on this board in my lab. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: apl: Add hex offsets for registers in FSP-SSimon Glass
When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: coral: Correct some FSP-S settingsSimon Glass
Some settings were modified slightly in the device-tree conversion. Return these to their original values. This includes some audio settings and a few others that have changed. Note that we still rely on the FSP defaults for most values, so there is no need to specify a value if the FSP default is suitable. This makes WiFi work again. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: apl: Add hex offsets for registers in FSP-MSimon Glass
When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: coral: Correct some FSP-M settingsSimon Glass
Some settings were modified slightly in the device-tree conversion. Return these to their original values. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: mrccache: Allow use before driver model is activeSimon Glass
The change to avoid searching the device tree does not work on boards wich don't have driver model set up this early, for example minnowmax. Put back the old code (converted to livetree) as a fallback for these devices. Also update the documentation. This is tested on minnowmax, link, samus and coral. Fixes: 87f1084a630 (x86: Adjust mrccache_get_region() to use livetree) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02x86: spl: Print the error on SPL failureSimon Glass
The error code is often useful to figure out what is going on. Printing it does not increase code size much, so print out the error and then hang. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: spi: Rewrite logic for obtaining the SPI memory mapSimon Glass
At present this logic does not work on link and samus, since their SPI controller is not a PCI device, but a child of the PCH. Unfortunately, fixing this involves a lot of extra logic. Still, this was requested in the review of the fix-up patch, so here it is. Fixes: 92842147c31 ("spi: ich: Add support for get_mmap() method") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02x86: spi: Add a way to access the SPI mapping via registersSimon Glass
At present the PCI BDF (bus/device/function) is needed to access the SPI mapping, since the registers are at BAR0. This doesn't work when PCI auto-config has not been done yet, since BARs are unassigned. Add another way to find the mapping, using the MMIO base, if the caller knows this. Also add a missing function comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-01sunxi: H6: Enable Ethernet on the Pine H64Samuel Holland
Now that the EMAC driver supports the H6 SoC, we can enable the Ethernet hardware on the Pine H64 board. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01net: sun8i_emac: Add support for the H6 variantSamuel Holland
The H6 EMAC is very similar to the H3 variant, except that it uses the same pinmux as R40. Add support for it. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01net: sun8i_emac: Use consistent clock bitfield definitionsSamuel Holland
While the R40 uses a different register for EMAC clock configuration than other chips, the register has a very similar layout. Reuse the existing bitfield definitions in this file, since they match. This allows the driver to compile on the H6 platform, where the CCM_GMAC_CTRL definitions are not present. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01sunxi: Silence warning about non-static inline functionSamuel Holland
When compiling with CONFIG_SPL_SERIAL=n, gcc warns about mbus_configure_port not being marked as static: In file included from include/common.h:34, from arch/arm/mach-sunxi/dram_sunxi_dw.c:11: include/log.h:185:4: warning: 'printf' is static but used in inline function 'mbus_configure_port' which is not static 185 | printf(pr_fmt(fmt), ##args); \ | ^~~~~~ include/log.h:192:2: note: in expansion of macro 'debug_cond' 192 | debug_cond(_DEBUG, fmt, ##args) | ^~~~~~~~~~ arch/arm/mach-sunxi/dram_sunxi_dw.c:100:2: note: in expansion of macro 'debug' 100 | debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); | ^~~~~ Fix this by updating the function accordingly. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01phy: sun4i-usb: Align H6 initialization logic with the kernelRoman Stratiienko
H6 SOC needs additional initialization of PHY registers. Corresponding changes can be found in the kernel patch [1]. Without this changes there is no enumeration of 'musb' gadget. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79 Fixes: 35fa673e0e5f ("sunxi: phy: Add USB PHY support for Allwinner H6") Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01Merge tag 'rpi-next-2020.07.2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi rpi4: - set ARCH_FIXUP_FDT_MEMORY - bump NR_DRAM_BANKS to four to enable 8 GB of RAM
2020-06-01Merge tag 'u-boot-stm32-20200528' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - stm32mp15: fix DT on DHCOR SOM and avenger96 board - stm32mp15: re-enable KS8851 on DHCOM
2020-06-01doc: driver-model: Update SPI migration statusJagan Teki
DM_SPI migration status fror v2020.07 removed: lpc32xx_ssp.c sh_spi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01mtd: sf: Drop plat from sf_probeJagan Teki
dm_spi_slave_platdata used in sf_probe for printing plat->cs value and there is no relevant usage apart from this. We have enough debug messages available in SPI and SF areas so drop this plat get and associated bug statement. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01env: sf: Free the old env_flashJagan Teki
env_flash is a global flash pointer, and the probe would happen only if env_flash is NULL, but there is no checking and free the pointer if is not NULL. So, this patch frees the old env_flash, and get the probed flash in to env_flash pointer and finally check if is not NULL. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01cmd: sf Drop reassignment of new into flashJagan Teki
The new pointer points to flash found and that would assign it to global 'flash' pointer for further flash operations and also keep track of old flash pointer. This would happen if the probe is successful or even failed, but current code assigning new into flash before and after checking the new. So, drop the assignment after new checks so flash always latest new pointer even if probe failed or succeed. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01mtd: spi: Call sst_write in _write opsJagan Teki
Currently spi-nor code is assigning _write ops for SST and other flashes separately.  Just call the sst_write from generic write ops and return if SST flash found, this way it avoids the confusion of multiple write ops assignment during the scan and makes it more feasible for code readability. No functionality changes. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01sf: Drop spl_flash_get_sw_write_protJagan Teki
The get_sw_write_prot API is used to get the write-protected bits of flash by reading the status register and other wards it's API for reading register bits. 1) This kind of requirement can be achieved using existing flash operations and flash locking API calls instead of making a separate flash API. 2) Technically there is no real hardware user for this API to use in the source tree. 3) Having a flash operations API for simple register read bits also make difficult to extend the flash operations. 4) Instead of touching generic code, it is possible to have this functionality inside spinor operations in the form of flash hooks or fixups for associated flash chips. Considering all these points, this patch drops the get_sw_write_prot and associated code bases. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01mtd: spi: Use CONFIG_IS_ENABLED to prevent ifdefJagan Teki
Use CONFIG_IS_ENABLED to prevent ifdef in sf_probe.c Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01spi: Zap sh_spi driverJagan Teki
sh_spi driver is deprecated, no active updates and no board user, hence dropped the same. Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01spi: Kconfig: Move MSCC_BB_SPI, FSL_QSPI into DM_SPIJagan Teki
- MSCC_BB_SPI - FSL_QSPI Both are fully dm-driven, let's move them into DM_SPI side definition. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01spi: Kconfig: Drop redundant CF_SPI definitionJagan Teki
CF_SPI kconfig option defined twice with DM_SPI and non DM_SPI. Drop the non DM_SPI side kconfig definition. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01spi Drop spi_init()Jagan Teki
spi_init doesn't exist anywhere in the code. Drop it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-31Merge tag 'u-boot-rockchip-20200531' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix mmc of path after syncfrom kernel dts; - Add dwc3 host support with DM for rk3399; - Add usb2phy and typec phy for rockchip platform; - Migrate board list doc to rockchip.rst; - Add rk3399 Pinebook Pro board support; - Update dram_init in board_init and add memory node in SPL;
2020-05-31spl: add fixed memory node in target fdt also when loading ATFHeiko Stuebner
In a loading chain SPL -> ATF (->OP-TEE) -> U-Boot, ATF and a subsequent OP-TEE will re-use the same fdt as the U-Boot target and may need the information about usable memory ranges. Especially OP-TEE needs this to initialize dynamic shared memory (the only type U-Boot implements when talking to OP-TEE). So allow spl_fixup_fdt() to take a fdt_blob argument, falling back to the existing CONFIG_SYS_SPL_ARGS_ADDR if needed and call it from the ATF path as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2020-05-31rockchip: spl: do full dram_init instead of only probingHeiko Stuebner
Parts of later SPL may need RAM information as well, so do full dram_init() call, which includes the existing dram probing but also initializes the ram information in gd. dram_init() from sdram.c does the following steps: - uclass_get_device(UCLASS_RAM, ...) like the current code - ret = ram_get_info(dev, &ram); - gd->ram_size = ram.size; CONFIG_SPL_RAM already makes sure that sdram.c gets compiled and thus no other variant of dram_init() can exist. So it's the same functionality as before and only adds that the SPL now aquires knowledge about the amount of available ram, which it didn't know about before. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31rockchip: Add initial support for the Pinebook Pro laptop from Pine64.Peter Robinson
Specification: - Rockchip RK3399 - 4GB Dual-Channel LPDDR4 - eMMC socket - mSD card slot - 128Mbit (16Mb) SPI Flash - AP6256 for 11AC WiFi + BT5 - 14 inch 1920*1080 eDP MiPi display - Camera - USB 3.0, 2.0 ports - Type-C port with alt-mode display (DP 1.2) and 15W charge - DC 5V/3A - optional PCIe slot for NVMe SSD drive Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31arm: dts: rockchip: Add initial DT for Pinebook ProPeter Robinson
Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31dt-bindings: input: adopt Linux gpio-keys binding constantsPeter Robinson
Sync the gpio-keys input bindings from linux 5.7-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
generated by cgit (git 2.34.1) at 2025-01-12 01:37:16 +0000