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- In arch/arm/cpu/armv7/omap-common/timer.c,
drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files
that the driver needs but had been relying on <config.h> to bring in.
- In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h>
- In am335x_evm.h and pcm051.h don't globally include
<asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h>
as that is the only include which defines things the config uses.
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
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With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default. Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
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Just fix a typo displaying the CPU info. With CONFIG_DISPLAY_INFO we see
something like AMAM335X-GP rev 0 instead of AM335X-GP rev 0.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
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Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
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Tegra20 requires the workaround for this erratum. Enable it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add common code to enable the workaround for ARM erratum 716044. This
will be enabled for Tegra.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The original write to sdram_config is correct for DDR3 but incorrect
for DDR2 so SPL was hanging. For DDR2, the write to sdram_config
should be after the writes to ref_ctrl. This was working for DDR3
because there was a write of 0x2800 to ref_ctrl before a write
to sdram_config.
Tested on: GP EVM 1.1A (DDR2), GP EVM 1.5A (DDR3),
Beaglebone A6 (DDR2), Beagleone Blacd A4A (DDR3)
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
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Make bootcmd run findfdt so that we know what dtb file to load. Add a
loadfdt command to load this file in. Make mmcboot pass in ${fdtaddr}
and make the mmc section of bootcmd run loadfdt.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
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The kernel is loaded from some form of ext[234] or FAT, depending on the
distribution used. We add a bootpart variable to the environment so
that we can load from the correct mmc partition as well. We leave
CONFIG_CMD_EXT2 for existing scripts that use ext2load.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
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Cc: Matt Porter <mporter@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Nishanth Menon <nm@ti.com>
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Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
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Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLK <desired clock freq in MHz>
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
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Add support for loading splash image from NAND
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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commit d484b52 "video: Skip bitmaps which do not fit into the screen in
cfb_console" breaks splash screen alignment which is passed in as magic
(BMP_ALIGN_CENTER) x/y coordinates. Moving the check after the alignment block
fixes this.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Simon Glass <sjg@chromium.org>
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Currently bitmap logos don't interpret the X coordinate
correctly if the bpp is anything other than 8.
Signed-off-by: Andre Renaud <andre@bluewatersys.com>
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Hide the console macros since some reference global data which is
no longer present.
cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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cc: Che-Liang Chiou <clchiou@chromium.org>
Acked-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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cc: Anatolij Gustschin <agust@denx.de>
cc: Cliff Brake <cliff.brake@gmail.com>
cc: John Zhan <zhanz@sinovee.com>
cc: Marek Vasut <marek.vasut@gmail.com>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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- Make the brackets of the function calls more consistent
- Remove really unnecessary brackets
- Removes the extern from the function definitions
- Remove curly brackets from single line statements
- Remove lcd_setmem proto since it is already in common.h
- Cleanup comments, remove useless comments
- Remove NOT_USED_SO_FAR ifdef
- Cleanup coding style
cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
[agust: rebased the original patch]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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lcd_base is available as gd->fb_base as well, there is no need
to keep a seperate copy.
For completeness the ack of Bo Shen is for the atmel part.
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stelian Pop <stelian@popies.net>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
[agust: also fix cm_t35 board while rebasing]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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console_col, console_row, lcd_line_length, lcd_console_address had
to be declared in board / driver specific code, but were not actually
used there on many boards. Get rid of the global variables.
for completeness, the ack of Bo Shen is for the atmel part
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stelian Pop <stelian@popies.net>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
[agust: rebased and fixed cm_t35 board]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Since the lcd code was compiled unconditionally for pxa also add
CONFIG_PXA_LCD to the boards using this framebuffer. Since
driver/video contains video and lcd drivers, add lcd to the name
to make clear it belongs to common/lcd.c.
cc: Anatolij Gustschin <agust@denx.de>
cc: Cliff Brake <cliff.brake@gmail.com>
cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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Since the lcd code was compiled unconditionally in arch also
add CONFIG_MPC8XX_LCD to the boards using this driver.
cc: Anatolij Gustschin <agust@denx.de>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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cc: Anatolij Gustschin <agust@denx.de>
cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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Since CONFIG_VIDEO_AMBA is not set by any board, it does not seem
to be used, so remove it since there is no way to (compile) test it.
cc: Alessandro Rubini <rubini@unipv.it>
cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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lcd_color_fg and lcd_color_bg had to be declared in board specific
code, but were not actually used there; in addition, we have getter /
setter functions for these, which were not used either.
Get rid of the global variables, and use the getter function where
needed (so far no setter calls are needed).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stelian Pop <stelian@popies.net>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
[agust: also fixed cm_t35 board while rebasing]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Enable the SD controller driver for the Raspberry Pi. Enable a number
of useful MMC, partition, and filesystem-related commands. Set up the
environment to provide standard locations for loading a kernel, DTB,
etc. Provide a boot command that loads and executes boot.scr.uimg from
the SD card; this is written considering future extensibilty to USB
storage.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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This adds a simple driver for the BCM2835's SD controller.
Workarounds are implemented for:
* Register writes can't be too close to each-other in time, or they will
be lost.
* Register accesses must all be 32-bit, so implement custom accessors.
This code was extracted from:
git://github.com/gonzoua/u-boot-pi.git master
which was created by Oleksandr Tymoshenko.
Portions of the code there were obviously based on the Linux kernel at:
git://github.com/raspberrypi/linux.git rpi-3.6.y
commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
swarren changed the following for upstream:
* Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
* Remove register logging from read*/write* functions.
* Sort out confusion with min/max_freq values passed to add_sdhci().
* Use more descriptive variable names and calculations in IO accessors.
* Simplified and commented twoticks_delay calculation.
* checkpatch fixes.
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Andy Fleming <afleming@gmail.com>
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The firmware running on the bcm2835 SoC's VideoCore CPU manages the
display controller. Add a simple "LCD" driver that communicates with the
firmware using the property mailbox protocol. This configures the
display and frame-buffer to match whatever physical resolution the
firmware chosen when booting, which is typically the native resolution
of the attached display device, presumably unless otherwise specified
in config.txt on the boot media.
Enable this driver in the Raspberry Pi board configuration.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
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There appears to be no implementation of flush_dcache_range() for
ARM1176, so explicitly disable dcache support to avoid references to
that function from the LCD core in the next patch. This was presumably
not noticed before simply because no drivers for the rpi_b were
attempting DMA.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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When an LCD driver is actually driving a regular external display, e.g.
an HDMI monitor, the display resolution might not be known until the
display controller has initialized, i.e. during lcd_ctrl_init(). However,
lcd.c calculates lcd_line_length before calling this function, thus
relying on a hard-coded resolution in struct panel_info.
Instead, defer this calculation until after lcd_ctrl_init() has had the
chance to dynamically determine the resolution. This needs to happen
before lcd_clear(), since the value is used there.
grep indicates that no code outside lcd.c uses this lcd_line_length; in
particular, no lcd_ctrl_init() implementations read it.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
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The firmware running on the bcm2835 SoC's VideoCore CPU determines how
much of the system RAM is available for use by the ARM CPU. Previously,
U-Boot assumed that only 128MB was available, since this was the
smallest value configured by any public firmware. However, we can now
query the actual value at run-time from the firmware using the mbox
property protocol.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
and the ARM CPU. The ARM CPU is often thought of as the main CPU.
However, the VideoCore actually controls the initial SoC boot, and hides
much of the hardware behind a protocol. This protocol is transported
using the SoC's mailbox hardware module.
Here, we add a very simplistic driver for the mailbox module, and define
a few structures for the property messages.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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The verify code is broken on archs with signed char. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This command is useful for measuring SPI flash load times and the like.
Enable gettime as well to obtain absolute time tick values.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Turn on SPI flash support and related commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a memory-mapped 8GB SPI chip.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is possible that our PCI bus will provide the SPI controller, so change
the init order to make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This SPI controller can only write 64 bytes at a time. Add this restriction
in so that 'sf write' works correct for blocks larger than 64 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This supports Intel ICH7/9. The Intel controller is a little unusual in
that it is mostly intended for use with SPI flash, and has some
optimisations and features specifically for that application. In
particular it is not possible to support ongoing transactions that
continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END.
This driver supports writes of up to 64 bytes at a time, the limit
for the controller. Future work will improve this.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is common to have a "reg = <address size>" property in the FDT.
Add a function to handle this, similar to the existing
fdtdec_get_addr();
Signed-off-by: Simon Glass <sjg@chromium.org>
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