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2008-10-21mpc83xx: fix serdes setup for the MPC8378E boardsAnton Vorontsov
MPC837xE specs says that SerDes1 has: — Two lanes running x1 SGMII at 1.25 Gbps; — Two lanes running x1 SATA at 1.5 or 3.0 Gbps. And for SerDes2: — Two lanes running x1 PCI Express at 2.5 Gbps; — One lane running x2 PCI Express at 2.5 Gbps; — Two lanes running x1 SATA at 1.5 or 3.0 Gbps. The spec also explicitly states that PEX options are not valid for the SD1. Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX, which is wrong to do. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21mpc83xx: mpc8360emds: rework LBC SDRAM setupAnton Vorontsov
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes it difficult to use (b/c then the memory is discontinuous and there is quite big memory hole between the DDR/SDRAM regions). This patch reworks LBC SDRAM setup so that now we dynamically place the LBC SDRAM near the DDR (or at 0x0 if there isn't any DDR memory). With this patch we're able to: - Boot without external DDR memory; - Use most "DDR + SDRAM" setups without need to support for sparse/discontinuous memory model in the software. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21FDT: don't use private kernel header filesWolfgang Denk
On some systems (for example Fedora Core 4) U-Boot builds with the following wanrings only: ... In file included from /home/wd/git/u-boot/include/libfdt_env.h:33, from fdt.c:51: /usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead! This patch fixes this problem. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk
2008-10-21ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21ppc4xx: Correctly setup ranges property in ebc nodeStefan Roese
Previously only the NOR flash mapping was written into the ranges property of the ebc node. This patch now writes all enabled chip select areas into the ranges property. Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21ppc4xx: Add GDSys neo 405EP board supportDirk Eibach
Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21ppc4xx: Update configs for Netstal boardsNiklaus Giger
I reorganized my config files, putting the common stuff into netstal-common.h (got the idea by looking a amcc-common.h from Stefan). Added stuff to boot the new powerpc linux via NFS (only tested with HCU4). Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21ppc4xx: Add routine to retrieve CPU numberAdam Graham
Provide a weak defined routine to retrieve the CPU number for reference boards that have multiple CPU's. Default behavior is the existing single CPU print output. Reference boards with multiple CPU's need to provide a board specific routine. See board/amcc/arches/arches.c for an example. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21ppc4xx: Add static support for 44x IBM SDRAM ControllerAdam Graham
This patch add the capability to configure a PPC440 based IBM SDRAM Controller with static, compiled-in, values. PPC440 memory subsystem includes a Memory Queue core. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21ppc4xx: Add AMCC Arches board support (dual 460GT)Adam Graham
The Arches Evaluation board is based on the AMCC 460GT SoC chip. This board is a dual processor board with each processor providing independent resources for Rapid IO, Gigabit Ethernet, and serial communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR FLASH, UART, EEPROM and temperature sensor, along with a shared debug port. The two 460GT's will communicate with each other via shared memory, Gigabit Ethernet and x1 PCI-Express. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese
2008-10-21TQM8260: environment in flash instead EEPROM, baudrate 115kWolfgang Denk
Several customers have reported problems with the environment in EEPROM, including corrupted content after board reset. Probably the code to prevent I2C Enge Conditions is not working sufficiently. We move the environment to flash now, which allows to have a backup copy plus gives much faster boot times. Also, change the default console initialization to 115200 bps as used on most other boards. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-2185xx: Fix compile warning in mpc8536ds.cKumar Gala
mpc8536ds.c: In function 'is_sata_supported': mpc8536ds.c:615: warning: unused variable 'devdisr' Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-21Cleanup: fix "MHz" spellingWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21Use strmhz() to format clock frequenciesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21strmhz(): Round numbers when printing clock frequenciesWolfgang Denk
Round clock frequencies for printing. Many boards printed off clock frequencies like 399 MHz instead of the exact 400 MHz because numberes were not rounded. This is fixed now. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-2185xx: properly document MPC85xx_PORDEVSR2_SEC_CFGTimur Tabi
Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot to add a comment that the correct value disagrees with the 8544 reference manual. The changelog for that commit is also wrong, as it says "bit 28" when it should be "bit 24". Signed-off-by: Timur Tabi <timur@freescale.com>
2008-10-21Merge git://git.denx.de/u-boot into x1Markus Klotzbuecher
Conflicts: drivers/usb/usb_ohci.c
2008-10-18Merge 'next' branchWolfgang Denk
Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-18mgcoge: add redundant environment sectorHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18mgsuvd: update size of environmentHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18Enabled the Freescale SGMII riser card on 8536DSJason Jin
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-10-18Enabled the Freescale SGMII riser card on 8572DSLiu Yu
This patch based on Andy's work. Including command 'pixis_set_sgmii' support. Signed-off-by: Liu Yu <yu.liu@freescale.com>
2008-10-18Make pixis_set_sgmii more general to support MPC85xx boards.Liu Yu
The pixis sgmii command depend on the FPGA support on the board, some 85xx boards support SGMII riser card but did not support this command, define CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command. Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and PIXIS_VCFGEN1_MASK in header file for both boards. Signed-off-by: Liu Yu <yu.liu@freescale.com>
2008-10-18Add cpu/8xxx to TAGS_SUBDIRSEd Swarthout
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18fsl_law clear enable before changing.Ed Swarthout
Debug sessions may have left enabled laws. Changing lawbar with an unkown enabled tgtid could cause problems. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18mpc8572 additional end-point modeEd Swarthout
mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0. Include host_agent == 0 decode for end-point determination. This is not needed for the ds reference board since pcie3 will be a host in order to connect to the uli chip. Include it here as a reference for other mpc8572 boards. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-1885xx if NUM_CPUS>1, print cpu numberEd Swarthout
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18pixis do not print long help if not configuredEd Swarthout
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18Have u-boot pass stashing parameters into device treeAndy Fleming
Some cores don't support ethernet stashing at all, and some instances have errata. Adds 3 properties to gianfar nodes which support stashing. For now, just add this support to 85xx SoCs. Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-10-18Add DDR options setting on MPC8641HPCN boardHaiying Wang
* Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18Add ddr interleaving suppport for MPC8572DS boardHaiying Wang
* Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay, 2T based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. * Set memory controller interleaving mode to bank interleaving, and disable bank(chip select) interleaving mode by default, because the default on-board DDR DIMMs are 2x512MB single-rank. * Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18Add debug information for DDR controller registersHaiying Wang
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18Check DDR interleaving modeHaiying Wang
* Check DDR interleaving mode from environment by reading memctl_intlv_ctl and ba_intlv_ctl. * Print DDR interleaving mode information * Add doc/README.fsl-ddr to describe the interleaving setting Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18Pass dimm parameters to populate populate controller optionsHaiying Wang
Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18Make DDR interleaving mode work correctlyHaiying Wang
Fix some bugs: 1. Correctly set intlv_ctl in cs_config. 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled. 3. Set base_address and total memory for each ddr controller in memory controller interleaving mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-1885xx: Enable interrupt and setexpr commands on Freescale 85xx boardsKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-1885xx: Improve flash remapping on MPC8572DS & MPC8536DSKumar Gala
Changing the flash from cacheable to cache-inhibited was taking a significant amount of time due to the fact that we were iterating over the full 256M of flash. Instead we can just flush the L1 d-cache and invalidate the i-cache. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-1885xx: Export invalidate_{i,d}cache and add flush_dcacheKumar Gala
Added the ability for C code to invalidate the i/d-cache's and to flush the d-cache. This allows us to more efficient change mappings from cache-able to cache-inhibited. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-18mgcoge, mgsuvd: extract more common codeHeiko Schocher
in ft_blob_update () for both boards was an unneccessary repetition of code, which this patch moves in a common function for this boards. Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18mgcoge, mgsuvd: use in_*/out_* accesorsHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18mgsuvd: fix compiler warning when using soft_i2c driverHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18mgsuvd: fix coding styleHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18mgcoge: Second Flash on CS5 not on CS1Heiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18Added arch_lmb_reserve to allow arch specific memory regions protectionKumar Gala
Each architecture has different ways of determine what regions of memory might not be valid to get overwritten when we boot. This provides a hook to allow them to reserve any regions they care about. Currently only ppc, m68k and sparc need/use this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-18mgcoge: added CONFIG_FIT to support the new u-boot image formatHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-1874xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx versionKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-18Expose command table search for sub-commandsKumar Gala
Sub-command can benefit from using the same table and search functions that top level commands have. Expose this functionality by refactoring find_cmd() and introducing find_cmd_tbl() that sub-command processing can call. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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