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2019-11-17arm: dts: rk3399-rockpro64: sync dts from linux kernelSoeren Moch
The most important change for u-boot is the fix for the vdd-log pwm voltage regulator to avoid overvoltage for the VD_LOGIC power domain. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: rock960: Update config for TPLPeter Robinson
Enable TPL for rock960 like other rk3399 boards. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17configs: Rename roc-rk3399-pc -> roc-pc-rk3399 defconfigJagan Teki
roc-rk3399-pc_defconfig is committed in below commit <8a681f4c5aa15db51ad0209734859c9fe7c29cfd> ("rockchip: rk3399: Add ROC-RK3399-PC support") which doesn't follow the existing defconfigs on rk3399. So, rename as followed with other rk3399 defconfigs. Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-roc-pc: Sync latest dts changes from LinuxJagan Teki
Few important regulator power rails fixes are available in linux-next, so sync them same. Here is the last commit details: commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails") Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: Init driver otg_data for rk3288 usb phyKever Yang
RK3288 needs to init the otg_data in board level to make the phy driver work. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: usb: Migrate to use ofnodeKever Yang
Migrate to use ofnode_* instead of fdt_* so that we may able to use live dt for usb udc driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30-evb boardHeiko Stuebner
The px30 evb is an evaluation board for the px30 together with a dsi- connected display. This adds board and config files for it. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 architecture coreHeiko Stuebner
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 devicetreesHeiko Stuebner
Add px30 related devicetrees synced from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: misc: read cpuid either from efuse or otpHeiko Stuebner
Newer Rockchip socs use a different ip block to handle one-time- programmable memory, so depending on what got enabled get the cpuid from either source. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17misc: add driver for the Rockchip otp controllerFinley Xiao
Newer Rockchip socs like the px30 use a different ip block to handle one-time-programmable memory, so add a misc driver for it as well. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: mkimage: add support for px30Kever Yang
Add the table entry for px30 socs. The px30 has 10K of sram available. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17net: gmac_rockchip: add support for px30Heiko Stuebner
Add the glue code to allow the px30 variant of the Rockchip gmac to provide network functionality. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: add px30 clock driverKever Yang
The px30 contains 2 separate clock controllers, pmucru and cru. Add drivers for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17pinctrl: rockchip: add px30 pinctrl driverDavid Wu
Add the necessary glue code to allow pinctrl setting on px30 socs. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add core px30 headersHeiko Stuebner
Add headers needed by the upcoming px30 support, including two new dt-binding headers taken from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17spl: separate SPL_FRAMEWORK config for spl and tplHeiko Stuebner
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all cases, making the TPL bigger. There may be cases where the TPL is really size constrained due to its underlying ram size. Therefore introduce a new TPL_FRAMEWORK option and make the relevant conditionals check for both. The default is set to "y if SPL_FRAMEWORK" to mimic the previous behaviour where the TPL would always get the SPL framework if it was enabled in SPL. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: Fix dram setting to make dram more stableYouMin Chen
There are some code different with rockchip vendor code which may lead to different bugs, including: 1) Fix setting error about LPDDR3 dram size ODT. 2) Set phy io speed to 0x2. 3) Fix setting error about phy_pad_fdbk_drive. 4) Fix setting error about PI_WDQLVL_VREF_EN Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: update calculate_strideKever Yang
Update the calculation of the stride to support all the DRAM case. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: Sync the io setting from Rockchip vendor codeKever Yang
The io setting are updated after some bugfix in different rk3399 boards, sync the code from vendor. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: update lpddr4 timing for rk3399Kever Yang
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip vendor code; Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: add support detect capacityYouMin Chen
Add capacity detect for rk3399 so that the driver able to detect the capacity automatically. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: update the function of sdram_initYouMin Chen
Clean up the sdram_init to keep sync with rockchip source code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: fix error about get_ddrc0_con reg addrYouMin Chen
Correct the register to its correct name. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: Clean up codeYouMin Chen
Clean up rk3399 dram driver source code for more readable. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: migrate to use common codeYouMin Chen
For there are some structures and functions are common for all rockchip SoCs, migrate to use the common code so that we can clean up reduandent codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3328: use common sdram driverYouMin Chen
RK3328 has a similar controller and phy with PX30, so we can use the common driver for it and remove the duplicate codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: px30: add sdram driverYouMin Chen
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3. For TPL_BUILD, the driver implement full dram init and without DM support due to the limit of internal SRAM size. For SPL and U-Boot proper, it's a simple driver with dm for get dram_info like other SoCs. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add common msch reg definitionKever Yang
The noc register bit definition may be the same for different SoC while the offset of the register may be different, add the struction definition as common code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add phy driver code for PX30Kever Yang
This sdram_phy_px30.c is based on PX30 SoC, the functions are common for phy, other SoCs with similar hardware could re-use it. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add controller code for PX30Kever Yang
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common for controller, other SoCs with similar hardware could re-use it. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: Default enable DRAM debug infoKever Yang
The debug info for dram is main about the capacity related info which is very important the board init, so set this default enable. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: move sdram_debug function into sdram_commonKever Yang
The functions for dram info print are part of common code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add common code for sdram driverKever Yang
There are some function like os_reg setting, capacity detect functions, can be used as common code for different Rockchip SoCs, add a sdram_common.c for all these functions. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: sdram: update the sys_reg to sys_reg2Kever Yang
We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable name to what we real use to avoid confuse people. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: sdram: extend to use sys_reg3 for capacity infoKever Yang
Since we have new DRAM type and to support different DRAM size in different CS, we need more bits, so introduce sys_reg3 to record the info. Note that the info in sys_reg3 is extension to sys_reg2 and the info in sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as VERSION2. All the ENC macro are moved to sdram_common.h since the sdram.c only need to do the info decode. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: sdram: move cap structure and debug function to sdram_common.hKever Yang
The sdram.h suppose to be helper file for sdram.c which including dram size decode and some u-boot related dram init interface, and all structure and function for dram driver move to sdram_common.h Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: rename sdram_common.c/h to sdram.cKever Yang
rename sdram_common.c in arch/arm/mach-rockchip to sdram.c; so that we can use the file name sdram_common.c in dram driver for better understand the code; clean the related file who has use the header file at the same time. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: rename sdram.h to sdram_rk3288.hKever Yang
The header file sdram.h is used for rk3288 and similar SoCs, rename it to make it more understandable. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-12Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'Tom Rini
- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This is size neutral outside of two platforms with latent bugs being fixed now and they no longer have "ENV_IS_NOWHERE" set along with their intended location.
2019-11-12defconfigs: Migrate CONFIG_SYS_REDUNDAND_ENVIRONMENTTom Rini
Move this symbol to Kconfig. As part of this we can drop a UBI-specific symbol that was a stop-gap for not having this particular symbol in Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-12pfla02: Migrate CONFIG_ENV_IS_IN_SPI_FLASH to defconfigTom Rini
This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather than defconfig, fix. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-12evb-rk3128: Migrate CONFIG_ENV_IS_IN_MMC to defconfigTom Rini
This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than defconfig, fix. Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-12Merge tag 'u-boot-imx-20191105' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191105 ------------------- i.MX8MN SoC support ROM API image download support i.MX8MM enet enabling
2019-11-11Prepare v2020.01-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-11configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-11gitattributes: dont treat non-text files as textVignesh Rajendran
With recent update in u-boot gitattributes all files are treated as regular text files. This creates problems with special files and repo always shows uncommitted files like below. Your branch is up-to-date with 'origin/master'. Changes not staged for commit: (use "git add <file>..." to update what will be committed) (use "git checkout -- <file>..." to discard changes in working directory) modified: tools/logos/compulab.bmp modified: tools/logos/denx-comp.bmp modified: tools/logos/toradex.bmp To fix above problem special files bmp/ttf files are treated as binary files in the gitattributes. Signed-off-by: Vignesh Rajendran <vignesh.rajendran@in.bosch.com> Signed-off-by: Veeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>
2019-11-11.gitignore: Ignore .img filesMichael Trimarchi
The generated idbloader.img file that rockchip uses should be not included in git status report Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2019-11-11binman: tegra: Adjust symbol calculation depending on end-at-4gbSimon Glass
A recent change adjusted the symbol calculation to work on x86 but broke it for Tegra. In fact this is because they have different needs. On x86 devices the code is linked to a ROM address and the end-at-4gb property is used for the image. In this case there is no need to add the base address of the image, since the base address is already built into the offset and image-pos properties. On other devices we must add the base address since the offsets start at zero. In addition the base address is currently added to the 'offset' and 'size' values. It should in fact only be added to 'image-pos', since 'offset' is relative to its parent and 'size' is not actually an address. This code should have been adjusted when support for 'image-pos' and 'size' was added, but it was not. To correct these problems: - move the code that handles adding the base address to section.py, which can check the end-at-4gb property and which property (offset/size/image-pos) is being read - add the base address only when needed (only for image-pos and not if the image uses end-at-4gb) - add a note to the documentation - add a separate test to cover x86 behaviour Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base) Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2019-11-11Merge tag 'u-boot-rockchip-20191110' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip pmic rk805,rk809, rk816, rk817 - Add rk3399 board Leez support - Fix bug in rk3328 ram driver - Adapt SPL to support ATF bl31 with entry at 0x40000 - Fix the u8 type comparision with '-1'. - Fix checkpatch warning for multi blank line and review signature.
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