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2020-06-24arm64: zynqmp: Reduce console buffer sizeT Karthik Reddy
Reduce console buffer size to 1kbyte to accommodate memory allocations in mini u-boot for zynqmp. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: versal: Enable config to map TCM and OCMAshok Reddy Soma
Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm: zynq: Enable alternative memory testAshok Reddy Soma
Enable alternative memory test for zynq platforms. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Add zynq aes load & loadp commandsT Karthik Reddy
Added support for zynq aes load & loadp commands. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Flush dcache only for non-bitstream dataT Karthik Reddy
In case of aes decryption destination address range must be flushed before transferring decrypted data to destination. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Check if aes engine is enabledIbai Erkiaga
AES engine cannot be used if has not been enabled at boot time with an encrypted boot image. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Check fpga config completionT Karthik Reddy
This patch checks fpga config completion when a bitstream is loaded into PL. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu
Correct the PL bitstream loading sequence for zynqaes command by clearing the loaded PL bitstream before loading the new encrypted bitstream using the zynq aes command. This was done by setting the PROG_B same as in case of fpgaload commands. This patch fixes the issue of loading the encrypted PL bitstream onto the PL in which a bitstream has already been loaded successfully. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()Michal Simek
There is no need to panic all the time when pmufw config object loading failed. The patch improves function logic to report permission deny case and also panic only for SPL case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24clk: versal: Remove alt_ref_clk from clock sourcesRajan Vaja
alt_ref_clk is applicable only for PS extended version. For PS base version there is no separate alt_ref_clk. It is tied with ref_clk, so remove it from driver. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: versal: Let U-Boot to update memory node by defaultMichal Simek
There is no reason not to let U-Boot to update memory node by default. In past this was disabled by purpose to be able to test different memory configurations from one U-Boot instance. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24mmc: zynq_sdhci: Remove global pointerMichal Simek
Driver is not calling gd anywhere that's why there is not need to define it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm: versal: Fix xspi0 boot modeMichal Simek
Use proper number to be aligned with xspi0 boot mode. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24mmc: sdhci: Fix HISPD bit handlingJagan Teki
SDHCI HISPD bits need to be configured based on desired mmc timings mode and some HISPD quirks. So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. Linux handle the HISPD similar like this in below commit but no SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") This eventually fixed the mmc write issue observed in rk3399 sdhci controller. Bug log for refernece, => gpt write mmc 0 $partitions Writing GPT: mmc write failed ** Can't write to device 0 ** ** Can't write to device 0 ** error! Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Peng Fan <peng.fan@nxp.com> Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-24mmc: retry CMD1 in mmc_send_op_cond() until the eMMC is readyHaibo Chen
According to eMMC specification v5.1 section 6.4.3, we should issue CMD1 repeatedly in the idle state until the eMMC is ready even if mmc_send_op_cond() send CMD1 with argument = 0. Otherwise some eMMC devices seems to enter the inactive mode after mmc_complete_op_cond() issued CMD0 when the eMMC device is busy. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-06-24mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuningHaibo Chen
In current code, we add 1ms dealy after each tuning command for standard tuning method. Adding this 1ms dealy is because USDHC default check the CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning IC logic do not wait for the tuning data sending out by the card, trigger the buffer read ready interrupt immediately, and step to next cycle. So when next time the new tuning command send out by USDHC, card may still not send out the tuning data of the upper command,then some eMMC cards may stuck, can't response to any command, block the whole tuning procedure. If do not check the CMD CRC for tuning, then do not has this issue. USDHC will wait for the tuning data of each tuning command and check them. If the tuning data pass the check, it also means the CMD line also okay for tuning. So this patch disable the CMD CRC check for tuning, save some time for the whole tuning procedure. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-06-24mmc: fsl_esdhc_imx: fix the mask for tuning start pointHaibo Chen
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is TUNING_START_TAP, bit[7] of this register is to disable the command CRC check for standard tuning. So fix it here. Fixes: fa33d207494c ("mmc: split fsl_esdhc driver for i.MX") Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-06-24cmd: mmc: Cache-align extcsd read targetMarek Vasut
The extcsd read target must be cache aligned in case the controller uses DMA to read the extcsd register, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2020-06-23Merge branch '2020-06-23-misc-minor-fixes'Tom Rini
- Assorted minor fixes
2020-06-23psci: add 'static inline' to invoke_psci_fn() stubMasahiro Yamada
Avoid potential multiple definitions when CONFIG_ARM_PSCI_FW is disabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-06-23doc: sifive: Fix spelling of "environment".Vagrant Cascadian
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
2020-06-23cmd: booti: Fix spelling of "environment".Vagrant Cascadian
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-23nvme: Invalidate dcache before submitting admin cmdJagan Teki
This patch try to avoids eviction of dirty lines during DMA transfer. The code right now execute the following step: - allocate the buffer - start a dma operation using the non-coherent dma buffer - invalidate cache lines associated with the buffer - read the buffer This can lead to reading back not valid information, because the cache controller could evict dirty cache lines belonging to the buffer *after* the DMA operation has started to fill the DRAM. In order to avoid this, a new invalidation is required *before* starting the DMA operation. The patch just adds an invalidation before submitting the DMA command. Example below shows the nvme disk scan result without the following patch => nvme scan nvme_get_info_from_identify: nn = 544502629, vwc = 100, sn = dev_0T, mn = `�\�, fr = t_part, mdts = 105 So, invalidating the cache before submitting the admin command, fix the cpu read. Cc: André Przywara <andre.przywara@arm.com> Reported-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-23phy: atheros: Fix the "qca,clk-out-frequency" exampleFabio Estevam
The correct name for the property is "qca,clk-out-frequency", so fix it accordingly. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Michael Walle <michael@walle.cc>
2020-06-23zfs: fix missing include for disk_partition definitionJoel Johnson
Commit 0528979fa7ab ("part: Drop disk_partition_t typedef") changed to a struct. As a result it uncovered an apparent missing include in zfs_common.h for part.h which actually contains the definition. The ZFS handles the struct exclusively as pointers so it was only a warning. warning: ‘struct disk_partition’ declared inside parameter list will not be visible outside of this definition or declaration void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info); Signed-off-by: Joel Johnson <mrjoel@lixil.net> Series-CC: Simon Glass <sjg@chromium.org>
2020-06-23Merge tag 'u-boot-imx-20200623' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.07 ----------------- Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103 - Fixes for atheros and cubox - Toradex: mostly environment - i.MX7: DDR fixes - switch to DM - sabrelite : fix MMC access
2020-06-23configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-22Prepare v2020.07-rc5Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-23mx6cuboxi: remove unused codeWalter Lozano
After enabling SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC the MMC initialization code is not longer needed. This patch removes the unused code. Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6cuboxi: enable OF_CONTROL and DM in SPLWalter Lozano
In order to take the beneficts of DT and DM in SPL, like reusing the code and avoid redundancy, enable SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC. With this new configuration SPL image is 50 KB, higher than the 38 KB from the previous version, but it still under the 68 KB limit. Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6cuboxi: customize board_boot_order to access eMMCWalter Lozano
In SPL legacy code only one MMC device is created, based on BOOT_CFG register, which can be either SD or eMMC. In this context board_boot_order return always MMC1 when configure to boot from SD/eMMC. After switching to DM both SD and eMMC devices are created based on the information available on DT, but as board_boot_order only returns MMC1 is not possible to boot from eMMC. This patch customizes board_boot_order taking into account BOOT_CFG register to point to correct MMC1 / MMC2 device. Additionally, handle IO mux for the desired boot device. Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6cuboxi: enable MMC and eMMC in DT for SPLWalter Lozano
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23mx6ull_14x14_evk_plugin: Convert to DM_ETHFabio Estevam
Convert to DM_ETH to avoid board removal from the project. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23mx6slevk_spl: Convert to DM_ETHFabio Estevam
Convert to DM_ETH to avoid board removal from the project. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23mx6slevk_spinor: Convert to DM_ETHFabio Estevam
Convert to DM_ETH to avoid board removal from the project. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23arm: dts: imx: fsl-imx8qm.dtsi: fix gpio aliasesYe Li
Current aliases missed gpio0 node, and this node shoud be aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we will get below message when running "gpio status" command, and see the reason by "dm uclass". => gpio status Device 'gpio@5d090000': seq 0 is in use by 'gpio@5d080000' Device 'gpio@5d0a0000': seq 1 is in use by 'gpio@5d090000' Device 'gpio@5d0b0000': seq 2 is in use by 'gpio@5d0a0000' => dm uclass uclass 36: gpio 0 * gpio@5d080000 @ fbaefb90, seq 0, (req -1) 1 * gpio@5d090000 @ fbaefc70, seq 1, (req 0) 2 * gpio@5d0a0000 @ fbaefd50, seq 2, (req 1) 3 * gpio@5d0b0000 @ fbaefe30, seq 5, (req 2) 4 * gpio@5d0c0000 @ fbaeff10, seq 3, (req 3) 5 * gpio@5d0d0000 @ fbaefff0, seq 4, (req 4) 6 * gpio@5d0e0000 @ fbaf00d0, seq 6, (req 5) 7 * gpio@5d0f0000 @ fbaf01b0, seq 7, (req 6) Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-23gpio: mxc_gpio: change gpio index for i.MX8Ye Li
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms, so we have to adjust the index accordingly. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-23mx6ul_14x14_evk: Avoid overlap of environment over U-Boot properOtavio Salvador
We need to change the environment offset to avoid corrupting the U-Boot binary when saving it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-06-23mx6ul_14x14_evk: Enable SPL USB and SDP supportOtavio Salvador
This fixes the boot from USB loader, which is critical to easy the manufacture process. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-06-22ARM: imx: soc: Select default TEXT_BASE for MX7Marek Vasut
Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot text base is picked as the one used by various MX7 boards. The SPL text base however is different. The SPL text base is set to 0x912000 instead of the usual 0x911000, that is because the 0x911000 value cannot work. Using 0x911000 as a SPL text base will result in the DCD header being placed below the 0x911000 address, which is a reserved SRAM area which must not be used. This will actually trigger eMMC boot failure on MX7D at least. Hence the increment. Update all boards affected by this SPL problem to the new SPL_TEXT_BASE. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-06-22ARM: imx: soc: Switch BOARD_EARLY_INIT_F to imply on MX7Marek Vasut
There are systems where board_early_init_f() is plain empty. Switch the config option from "select" to "imply", to permit user to unset the BOARD_EARLY_INIT_F if it were to be empty. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-06-22ARM: imx: ddr: Fill in missing DDRC ZQCTLx on i.MX7Marek Vasut
The iMX7 defines further DDRC ZQCTLx registers, however those were thus far missing from the list of registers and not programmed. On systems with LPDDR2 or DDR3, those registers must be programmed with correct values, otherwise the DRAM may not work. However, existing systems which worked without programming these registers before are now setting those registers to 0, which is the default value, so no functional change there. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-06-22imx: imx8qm_rom7720_a1: update READMEOliver Graute
Update README to extract firmware from scripts Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2020-06-22ARM: imx6: Fetch MAC address in board_init_late() on DH iMX6 PDK2Marek Vasut
This is needed to obtain the MAC from EEPROM/OTP only after the final env is populated, otherwise the ethaddr might be overriden. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Claudius Heine <ch@denx.de> Cc: Harald Seiler <hws@denx.de> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de>
2020-06-22arm: wandboard: move CONFIG_MXC_UART to defconfigHeinrich Schuchardt
For using a debug UART on the Wandboard CONFIG_MXC_UART=y must be set in the .config file. To avoid duplicate definitions move the setting from include/configs/wandboard.h to configs/wandboard_defconfig. Document the debug UART settings in the README. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-06-22Fix MMC access on SabreliteMartyn Welch
It appears that MMC access on the Sabrelite has been broken since cdcaee9518: Loading Environment from MMC... Card did not respond to voltage select! *** Warning - No block device, using default environment Remove the board_mmc_init() and related entries now that we should be using DM_MMC, add PINCTRL so that things work as expected. Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Tested-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2020-06-22colibri_imx6: boot env configuration updatesIgor Opaniuk
1. Drop legacy emmcboot wrapper from env. 2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP 3. Drop DFU defines Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22colibri_imx7: boot env configuration updatesIgor Opaniuk
1. Drop legacy emmcboot wrapper from env. 2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP 3. Drop DFU defines Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22apalis_imx6: boot env configuration updatesIgor Opaniuk
1. Drop legacy emmcboot wrapper from env. 2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP 3. Drop DFU defines Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22toradex: imx: enable BOOTCOUNT featureIgor Opaniuk
This introduces automatic boot counter that increases after every reset.After a power-on reset, it will be initialized with 1, and each reboot will increment the value by 1. By default it's disabled if bootlimit isn't set. To enable this feature you have set bootcount limit ("bootlimit"), alternate boot action ("altbootcmd") that will be performed if the new value of bootcount exceeds the value of bootlimit, and "upgrade_available" to let U-Boot automatically increase and save the counter value after every reset: > setenv bootlimit 5 > setenv upgrade_available 1 > setenv altbootcmd "bootm ..." In case the bootlimit exceeds, the message will be shown and albootcmd executed: Warning: Bootlimit (5) exceeded. Using altbootcmd. To reset bootcount run: > bootcount reset Print current value: > bootcount print Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>