summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-01-26Merge git://git.denx.de/u-boot-sunxiTom Rini
2018-01-26ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32Tom Rini
Now that we have and use wait_for_bit_le32() available, the callers of cm_write_with_phase() should not be casting values to u32 and instead we expect a const void *, so provide that directly. Fixes: 48263504c8d5 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit") Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-26gpio: sunxi: Add compatible string for H5 PIOChris Blake
Add allwinner,sun50i-h5-pinctrl compatible for H5 boards. Signed-off-by: Chris Blake <chrisrblake93@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: remove external link and format commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-26sunxi: Add limit with the MMC environmentMaxime Ripard
The MMC environment offset is getting very close to the end of the U-Boot binary now. Since we want to make sure this will not overflow, add a size limit in the board for arm64. arm32 has already that limit enforced in our custom image generation. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26Makefile: Add size check to the u-boot.itb make targetMaxime Ripard
The make macro to check if the binary exceeds the board size limit is not called. Make sure that is the case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26sunxi: imply CONFIG_OF_LIBFDT_OVERLAYAndre Heider
fdt overlay support is useful for all sunxi boards, enable per default and remove it from sunxi defconfigs. Signed-off-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26net: regex: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this option that is not critical until we can adress the issue properly. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26video: bpp16: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26video: bpp8: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: misc: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: loads: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: loadb: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: unzip: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: crc32: Disable by default on sunXiMaxime Ripard
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26dfu: select HASHMaxime Ripard
The DFU code relies on the HASH config option. Make sure it is always there by selecting it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26Merge git://git.denx.de/u-boot-mipsTom Rini
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini
2018-01-26MIPS: add BMIPS Comtrend AR-5315u boardÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add support for Broadcom MIPS BCM6318 SoC familyÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26dm: ram: bmips: add BCM6318 supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26dm: cpu: bmips: add BCM6318 supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add BMIPS Comtrend WAP-5813n boardÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add support for Broadcom MIPS BCM6368 SoC familyÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26dm: cpu: bmips: add BCM6368 supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26DW SPI: Get clock value from Device TreeEugeniy Paltsev
Add option to set spi controller clock frequency via device tree using standard clock bindings. Define dw_spi_get_clk function as 'weak' as some targets (like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API and implement dw_spi_get_clk their own way in their clock manager. Get rid of clock_manager.h include as we don't use cm_get_spi_controller_clk_hz function anymore. (we use redefined dw_spi_get_clk in SOCFPGA clock managers instead) Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26SOCFPGA: clock manager: implement dw_spi_get_clk functionEugeniy Paltsev
Implement dw_spi_get_clk function to override its weak implementation in designware_spi.c driver. We need this change to get rid of cm_get_spi_controller_clk_hz function and clock_manager.h include in designware_spi.c driver. Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-25usb: ehci: mxs: fix swapped argument in ehci_writel()Daniel Schwierzeck
ehci_writel() swaps the arguments for address and value. One call in ehci-mxs ignores that. This fixes the warning: drivers/usb/host/ehci-mxs.c: In function ?ehci_hcd_stop?: drivers/usb/host/ehci-mxs.c:159:19: error: initialization makes integer from pointer without a cast [-Werror=int-conversion] ehci_writel(tmp, &hcor->or_usbcmd); ^ arch/arm/include/asm/io.h:117:34: note: in definition of macro ?writel? #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/usb/host/ehci-mxs.c:159:2: note: in expansion of macro ?ehci_writel? ^~~~~~~~~~~ Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25usb: xhci: Fix bool initialization in xhci_bulk_txGustavo A. R. Silva
Bool initializations should use true and false. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de>
2018-01-25mips: bmips: increment SYS_MALLOC_F_LENÁlvaro Fernández Rojas
This prevents the following ENOMEM: Error binding driver 'bmips_cpu': -12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25boston: Pad binary in .mcs to a multiple of 16 bytesPaul Burton
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the final 0x00 byte which ends the .relocs section seems to be skipped & left in flash as 0xff unless the data contained in the .mcs is padded out to a 16 byte boundary. Without our final zero byte relocation will fail with an error about a spurious reloc: Avoid this problem by padding out the data in the .mcs file to a 16 byte boundary using srec_cat's -range-pad functionality. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25ddr: altera: silence PHY calibration unless in debug modeGoldschmidt Simon
This driver has been using printf() including filename since it was added. Convert to using debug() instead. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-25arm: socfpga: allow configs without network supportSimon Goldschmidt
Currently, socfpga_common.h does not allow configurations without network support. This is because CONFIG_CMD_PXE is defined in this file and distro mode has DHCP hard-coded as available. Fix this by moving CONFIG_CMD_PXE and CONFIG_MENU to the defconfigs and by making DHCP optional in BOOT_TARGET_DEVICES(func). Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-24Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini
2018-01-24pinctrl: rmobile: Import R8A7794 E2 PFC tablesMarek Vasut
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7792 V2H PFC tablesMarek Vasut
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tablesMarek Vasut
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7790 H2 PFC tablesMarek Vasut
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7794 E2 clock tablesMarek Vasut
Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7792 V2H clock tablesMarek Vasut
Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7791/R8A7793 M2 clock tablesMarek Vasut
Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7790 H2 clock tablesMarek Vasut
Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Add Gen2 clock coreMarek Vasut
Add common clock code for Renesas RCar Gen2 platforms. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Add DIV6P1 clock typeMarek Vasut
Add macros for the DIV6P1 clock type, which is used on Gen2 and optionally also on Gen3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut
Pull code which is common for RCar Gen2 and RCar Gen3 into separate source file. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Make clock tables Kconfig configurableMarek Vasut
Add Kconfig entries for each SoC clock table, so they can be compiled in or out at build time. This can reduce the size of the binary if desired. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this is thus far always zero. Split the tables so the RMSTPCR can be set too. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut
Extract the macros specific to Gen3 clock into a separate header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Make PLL configurations per-SoCMarek Vasut
Not all SoCs have the same PLL configuration options, so make those PLL configuraion tables per-SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Make clk_ids per-driverMarek Vasut
Not all drivers use the same IDs, so make those IDs per-driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Split RCar Gen3 driverMarek Vasut
Split the massive driver into smaller per-SoC drivers and pull the common code into a separate file. This would allow configuring out unnecessary clock drivers once the Kconfig changes are in and also allow adding more clock tables easily. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
generated by cgit (git 2.34.1) at 2024-12-26 13:41:39 +0000