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2016-09-20configs: Re-syncTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20mmc: sdhci: Add the programmable clock mode supportWenyou Yang
Add the programmable clock mode for the clock generator. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2016-09-20mmc: sd: optimize erasePeng Fan
To SD, there is no erase group, then the value erase_grp_size will be default 1. When erasing SD blocks, the blocks will be erased one by one, which is time consuming. We use AU_SIZE as a group to speed up the erasing. Erasing 4MB with a SD2.0 Card with AU_SIZE 4MB. `time mmc erase 0x100000 0x2000` time: 44.856 seconds (before optimization) time: 0.335 seconds (after optimization) Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stephen Warren <swarren@nvidia.com>
2016-09-20mmc: sd: extracting erase related information from sd statusPeng Fan
Add function to read SD_STATUS information. According to the information, get erase_timeout/erase_size/erase_offset. Add a structure sd_ssr to include the erase related information. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stephen Warren <swarren@nvidia.com>
2016-09-20mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_MAX_TIMEOUTMasahiro Yamada
No need for per-SoC adjustment for this parameter. It should be determined by the slowest hardware. Currently, no board overrides this CONFIG, so 3.2 sec is large enough. (If not, we can make it even larger.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_DEFAULT_TIMEMasahiro Yamada
This CONFIG is not configurable since it is not guarded by #ifndef. Nobody has complained about that, so there is no need to keep it as a CONFIG option. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20mmc: sdhci: move SDMA capability check to sdhci_setup_cfg()Masahiro Yamada
If CONFIG_BLK is enabled, add_sdhci() is never called. Move this quirk handling to sdhci_setup_cfg(), which is now the central place for hardware capability checks. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20mmc: sdhci: move broken voltage quirk handling to sdhci_setup_cfg()Masahiro Yamada
If CONFIG_BLK is enabled, add_sdhci() is never called. Move this quirk handling to sdhci_setup_cfg(), which is now the central place for hardware capability checks. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20mmc: sdhci: move error message to more relevant placeMasahiro Yamada
"Hardware doesn't specify base clock frequency" may not be only the error case of sdhci_setup_cfg(). It is better to print this where the corresponding error is triggered. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20mmc: sdhci: move sdhci_reset() call to sdhci_init()Masahiro Yamada
If CONFIG_BLK is enabled, add_sdhci() is never called. So, sdhci_reset() is not called, either. This is a problem for my board as it needs the reset to start from a sane state. Move the add_sdhci() call to sdhci_init(), which is visited by both of the with/without CONFIG_BLK cases. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"Masahiro Yamada
This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892. I took a closer look at this after the commit was applied, and found CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is actually too big for some boards. Perhaps 0x800 is enough, but the situation varies board by board. Let's postpone our decision until we come up with a better idea. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-19A20-OLinuXino-Lime2: Enable USB gadget supportTom Rini
Based on A13-OLinuXino, enable DFU and UMS support. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-09-18dtoc: Add methods for reading data from propertiesSimon Glass
Provide easy helpers for reading integer, string and boolean values from device-tree properties. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Correct quotes in fdt_utilSimon Glass
The style is to use single quotes for strings where possible. Adjust this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Support finding the offset of a propertySimon Glass
Add a way to find the byte offset of a property within the device tree. This is only supported with the normal libfdt implementation since fdtget does not provide this information. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Support packing the device treeSimon Glass
After any node/property deletion the device tree can be packed to remove spare space. Add a way to perform this operation. Note that for fdt_fallback, fdtput automatically packs the device tree after deletion, so no action is required here. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Support deleting device tree propertiesSimon Glass
Add support for deleting a device tree property. With the fallback implementation this uses fdtput. With libfdt it uses the API call and updates the offsets afterwards. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Move to using bytearraySimon Glass
Since we want to be able to change the in-memory device tree using libfdt, use a bytearray instead of a string. This makes interfacing from Python easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Prepare for supporting changing of device treesSimon Glass
For binman we need to support deleting properties in the device tree. This will change the offsets of nodes after the deletion. In preparation, add code to keep track of when the offsets are invalid, and regenerate them. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Drop the convert_dash parameter to GetProps()Simon Glass
This is not used anywhere in dtoc, so drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Allow the device tree to be compiled from sourceSimon Glass
If a source device tree is provide to the Fdt() constructors, compile it automatically. This will be used in tests, where we want to build a particular test .dts file and check that it works correctly in binman. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18patman: Add a library to handle logging and progressSimon Glass
When tools want to display information of varying levels of importance, it helps to provide the user with control over the verbosity of these messages. Progress messages work best if they are displayed and then removed from the display when no-longer relevant. Add a new tout library (terminal out) to handle these tasks. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18patman: Add a tools library for using temporary filesSimon Glass
For tools which want to use input files and temporary output, it is useful to have the handling of these dealt with in one place. Add a new library which allows input files to be read, and output files to be written, all based on a common directory structure. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Move a few more common functions into fdt.pySimon Glass
Some functions have the same code in the subclasses. Move these into the superclass to avoid duplication. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Move Widen() and GetPhandle() into the base classSimon Glass
These functions are identical in both subclasses. Move them into the base class. Note: In fact there is a bug in one version, which was fixed by this patch: https://patchwork.ozlabs.org/patch/651697/ Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Move BytesToValue() and GetEmpty() into PropBaseSimon Glass
These functions are currently in a separate fdt_util file. Since they are only used from PropBase and subclasses, it makes sense for them to be in the PropBase class. Move these functions into fdt.py along with the list of types. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Create a base class for FdtSimon Glass
At present we have two separate implementations of the Fdt library, one which uses fdtget/fdtput and one which uses libfdt (via swig). Before adding more functionality it makes sense to create a base class for these. This will allow common functions to be shared, and make the Fdt API a little clearer. Create a new fdt.py file with the base class, and adjust fdt_normal.py and fdt_fallback.py to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Rename fdt.py to fdt_normal.pySimon Glass
In preparation for creating an Fdt base class, rename this file to indicate it is the normal Fdt implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Move the fdt library selection into fdt_selectSimon Glass
Rather than have dtc worry about which fdt library to use, move this into a helper file. Add a function which creates a new Fdt object and scans it, regardless of the implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18dtoc: Move the struct import into the correct orderSimon Glass
This should be in with the other system includes. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18patman: Adjust command.Output() to raise an error by defaultSimon Glass
It is more useful to have this method raise an error when something goes wrong. Make this the default and adjust the few callers that don't want to use it this way. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18sandbox: Add "host size" hostfs command for fs testStefan Brüns
This complements the size/fatsize/ext4size commands added in commit cf6598193aed5de8855eaf70c1994f2bc437255a load, save and ls are already implemented for hostfs, now tests can cover the same operations on hostfs and emulated block devices. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
2016-09-18sandbox: document support of block device emulationStefan Brüns
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org> Changed 'Sandbox' to 'sandbox' in subject: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini
2016-09-18Merge branch 'master' of git://www.denx.de/git/u-boot-sunxiTom Rini
2016-09-18Merge branch 'master' of git://www.denx.de/git/u-boot-arcTom Rini
2016-09-19ARM: uniphier: update DRAM init code for LD20 SoCMasahiro Yamada
Import the latest version from the Diag software. - Support LD21 SoC (including DDR chips in the package) - Per-board granule adjustment for both reference and TV boards - Misc cleanups Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: add PLL init code for LD20 SoCMasahiro Yamada
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: collect clock/PLL init code into a single directoryMasahiro Yamada
Now PLLs for DRAM controller are initialized in SPL, and the others in U-Boot proper. Setting up all of them in a single directory will be helpful when we want to share code between SPL and U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: move PLL init code to U-Boot proper where possibleMasahiro Yamada
The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PERMasahiro Yamada
Basically, this should not be configured by users. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20Masahiro Yamada
This is the last code in the mach-uniphier/pinctrl/ directory. Push the remaining code out to delete the directory entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20Masahiro Yamada
Use the pin-mux data in the pinctrl drivers by directly calling pinctrl_generic_set_state(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: dts: uniphier: include System Bus pin group node in SPL DTMasahiro Yamada
This will be needed for setting up the System Bus pin-mux via the LD11/LD20 pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: consolidate NAND pin-mux settingsMasahiro Yamada
The NAND subsystem has not supported the Driver Model yet, but the NAND pin-mux data are already in the pinctrl drivers. Use them by calling pinctrl_generic_set_state() directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: remove ad-hoc pin-mux code for sLD3Masahiro Yamada
These settings are nicely cared by the pinctrl driver now. Remove. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: remove redundant pin-muxing for EA24 pin of sLD3 SoCMasahiro Yamada
This is enabled by default for all the supported boot modes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: uniphier: select PINCTRL and SPL_PINCTRLMasahiro Yamada
Now all UniPhier SoCs support a pinctrl driver. Select (SPL_)PINCTRL since it is mandatory even for base use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18ARM: dts: uniphier: add pinctrl device node and pinctrl propertiesMasahiro Yamada
DT-side updates to make pinctrl on sLD3 SoC really available. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18pinctrl: uniphier: add UniPhier sLD3 pinctrl driverMasahiro Yamada
Add pin-mux support for UniPhier sLD3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit (git 2.34.1) at 2025-02-15 18:56:11 +0000