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2016-07-02pinctrl: uniphier: avoid building unneeded pin-mux tables for SPLMasahiro Yamada
SPL does not use all of the devices, so we can save some memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02pinctrl: uniphier: support pin configuration for dedicated pinsMasahiro Yamada
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration (pin biasing, drive strength control), but not pin-muxing. Allow to fill the mux value table with -1 for those pins; pins with mux value -1 will be skipped in the pin-mux set function. The mux value type should be changed from "unsigned" to "int" in order to accommodate -1 as a special case. [ Linux commit: 363c90e743b50a432a91a211dd8b078d9df446e9 ] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02pinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20Masahiro Yamada
PH1-LD11 and PH1-LD20 have much pin controlling in common, so I added a single driver shared between them in the initial commit. However, the Ethernet pin-mux settings I am going to add are different with each other, and they may diverge more as the progress of development. Split it into two dedicated drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02pinctrl: uniphier: allow to have pinctrl node under syscon nodeMasahiro Yamada
Currently, the UniPhier pinctrl driver itself is a syscon, but it turned out much more reasonable to make it a child node of a syscon because our syscon node consists of a bunch of system configuration registers, not only pinctrl, but also phy, and misc registers. It is difficult to split the node. This commit allows to migrate to the new DT structure. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02ARM: dts: uniphier: sync Device Trees with upstream LinuxMasahiro Yamada
I periodically sync Device Trees for better maintainability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30pinctrl: uniphier: remove unneeded pin group nand_cs1Masahiro Yamada
This SoC does not support NAND CS1. This place-holder is no longer necessary. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30pinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20Masahiro Yamada
My mistake in the initial support patch. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30pinctrl: uniphier: remove wrong pin-mux functions for ProXstream2Masahiro Yamada
These are pin group names, not function names. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30ARM: uniphier: fix typo "talbe"Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-29x86: coreboot: Remove the dummy pch driverBin Meng
There is a dummy pch driver in the coreboot directory. This causes drivers of its children fail to function due to empty ops. Remove the whole file since it is no longer needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-28Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-06-28configs: Re-sync after boot menu changesTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-06-28armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIsAbhimanyu Saini
Currently layescape SoCs are not using cpu nodes. So removing them in favour of compatibly with similar SoCs that have different cores like LS2080A and LS2088A. This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCsPrabhakar Kushwaha
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs. like LS2080A, LS1043A, LS1012A. So append "A" to SoC names. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28mmc: fsl: introduce wp_enablePeng Fan
Introudce wp_enable. To check WPSPL, wp_enable needs to be set to 1 in board code. Take i.MX6UL for example, for some boards, they do not use WP singal, so they does not configure USDHC1_WP_SELECT_INPUT, and its default value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and SION bit set. So USDHC controller can always get wp signal and WPSPL shows write protect and blocks driver continuing. This is not what we want to see, so add wp_enable, and if set to 0, just omit the WPSPL checking and this does not effect normal working of usdhc controller. If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28fsl_esdhc: Update clock enable bits for USDHCYe Li
The USDHC moves the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN, HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec register. The driver uses RSTA to replace the clock gate off operation. But this is not a good solution because: 1. when using RSTA, we should wait this bit to clear by itself. This is not implemeneted in the code. 2. After RSTA is set, it is recommended that the Host Driver reset the external card and reinitialize it. So in this patch, we change to use the vendorspec registers for these bits operation. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28mmc: fsl: reset to normal boot mode when eMMC fast bootPeng Fan
When booting in eMMC fast boot, MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Also clear DLL_CTRL delay line settings at USDHC initialization to eliminate the pre-settings from boot rom. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28armv8: ls1043aqds: print FPGA info early for QSPI bootQianyu Gong
Now I2C is initialized early enough to access FPGA so it supports to show board info as early as other boot methods. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28armv8: ls1043aqds: use configurable clockQianyu Gong
Get the clocks from FPGA through I2C, if IFC is disabled. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-27common: add new boot media kconfig entryPeng Fan
Add CONFIG_{SD|NAND|ONENAND|SPI|QSPI|SATA}_BOOT kconfig entries. SoCs supports loading U-Boot from different medias to DRAM, such as i.MX6/7 supports loading U-Boot to DRAM from sd/emmc/nand/qspi/spi/sata and etc. For i.MX, imximage will generate different IVT headers according to boot medias. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Francois Retief <fgretief@spaceteq.co.za> Cc: Tom Rini <trini@konsulko.com>
2016-06-27Kconfig: make NOR_BOOT a common optionPeng Fan
Not only am335x supports booting from NOR, i.MX6 SoCs also supports booting from NOR. Make NOR_BOOT a common option to let different SoCs share it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Francois Retief <fgretief@spaceteq.co.za> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-27maintainers: new email addressSteve Rae
Update the email address for the boards that I maintain. Signed-off-by: Steve Rae <steve.rae@raedomain.com>
2016-06-27fastboot: sparse: improve CHUNK_TYPE_FILL write performanceSteve Rae
- increase the size of the fill buffer - testing has shown a 10x improvement when the sparse image has large CHUNK_TYPE_FILL chunks Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-27fastboot: sparse: implement reserve()Steve Rae
In order to process the CHUNK_TYPE_DONT_CARE properly, there is a requirement to be able to 'reserve' a specified number of blocks in the storage media. Because of the special handling of "bad blocks" in NAND devices, this is implemented in a storage abstraction function. Signed-off-by: Steve Rae <srae@broadcom.com> Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-06-27fastboot: sparse: resync common/image-sparse.c (part 2)Steve Rae
- update fastboot_okay() and fastboot_fail() This file originally came from upstream code. While retaining the storage abstraction feature, this is the second set of the changes required to resync with the cmd_flash_mmc_sparse_img() in the file aboot.c from https://us.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/aboot.c?h=LE.BR.1.2.1 Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-27fastboot: sparse: resync common/image-sparse.c (part 1)Steve Rae
This file originally came from upstream code. While retaining the storage abstraction feature, this is the first set of the changes required to resync with the cmd_flash_mmc_sparse_img() in the file aboot.c from https://us.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/aboot.c?h=LE.BR.1.2.1 Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-27fastboot: sparse: remove session-id logicSteve Rae
This "session-id" alogrithm is not required, and currently corrupts the stored image whenever more the one "session" is required. Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-27Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2016-06-27mmc: dw_mmc: fix the wrong AND operationJaehoon Chung
These condition checking are wrong. Original Author's intention might be "&" instead of "&&". It can know whether receive or transmit data request with BIT[4]/BIT[5] of RINTSTS register. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-06-26arm: at91: taurus/axm: add DM and DTS supportHeiko Schocher
add DM and DTS support for the at91 based siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: smartweb: add DM and DTS supportHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260Heiko Schocher
Add this files from Linux v4.6-rc5 66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO] Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26corvus DTS / DM supportHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebase on current ToT, don't delete gurnard DTB creation] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: add CONFIG_AT91SAM9M10G45Heiko Schocher
add support for CONFIG_AT91SAM9M10G45. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26ARM: at91: Don't invoke spl_boot_device() twiceMarek Vasut
Since the spl_boot_mode() is now passed the boot device to boot from, make use of it instead of inquiring for the boot device again. This allows board_boot_order() to function correctly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26common: Pass the boot device into spl_boot_mode()Marek Vasut
The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-24kbuild: avoid race between dtbs and dt/dt.dtb targetsMasahiro Yamada
If the final targets depend on both "dtbs" and "dts/dt.dtb", and -j option is given to the command line, multiple threads descend into the dts/ directory, which causes build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com>
2016-06-24efi_loader: Fix typo in distro scriptAlexander Graf
The distro script is supposed to use the internal fdt as fallback if we find no viable other option. However, we're missing a space key to actually make that work. Add the space, so we can successfully load an EFI blob even when there is no device tree provided on the target device. Signed-off-by: Alexander Graf <agraf@suse.de>
2016-06-24board/BuR: rename kwb board to brxre1Hannes Schmelzer
Rename B&R kwb board to brxre1 Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24board/BuR: rename tseries board to brppt1Hannes Schmelzer
Rename B&R tseries board to brppt1 Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24arm: bcm235xx: update clock frameworkSteve Rae
The handling of the "usage counter" is incorrect, and the clock should only be disabled when transitioning from 1 to 0. Reported-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24arm: bcm235xx: fix kps ccuChris Brand
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24arm: bcm235xx: implement the boot0 hook codeSteve Rae
Choose the Kconfig boot0 hook option and implement the required code. Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24arm: bcm235xx: choose 8-bit phy bus widthSteve Rae
The Kona PHY supports an 8-bit wide UTMI interface, therefore, choose this Kconfig setting. Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24clk: sandbox: don't check clk ID against 0Stephen Warren
clk->id is unsigned, so it can't be < 0. Remove the check for that. FWIW, this issue was introduced when the clock API converted e.g. clk_get_rate()'s clock ID parameter from an int to an unsigned long (with a struct clk), without removing this check. Fixes: 135aa9500264 ("clk: convert API to match reset/mailbox style") Reported-by: Coverity Scan Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-06-24common: Fix support for environment file in EXT4Andrej Rosano
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
2016-06-24ARM: armv7: refactor Makefile slightlyMasahiro Yamada
Use Kbuild standard style where possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24hush: complete renaming CONFIG_SYS_HUSH_PARSER to CONFIG_HUSH_PARSERMasahiro Yamada
There is no more define of CONFIG_SYS_HUSH_PARSER. Rename some remaining references and drop the backward compatible Kconfig entry. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24Move CONFIG_SYS_HUSH_PARSER to Kconfig for last 4 boardsMasahiro Yamada
I still see some defines of this config in board headers. Move them to defconfigs (+ renaming to CONFIG_HUSH_PARSER) to complete this migration. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24mtd: nand: Drop a blank line in nand_wait()Andre Renaud
This empty line should not be there. Remove it. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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