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2019-02-20sound: x86: link: Add sound supportSimon Glass
Add sound support for link, using the HDA codec implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20sandbox: sound: Silence sound for testingSimon Glass
When testing the sound system we don't need the hear the beeps. The testing works by checking the data that would be emitted. Add a device-tree property to silence the sound, and enable it for testing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20sound: Add support for Intel HDASimon Glass
The Intel High-definition Audio is a newer-generation audio system which provides for transfer of a large number of audio stream, each containing up to 16 channels. Add support for HDA as a library which can be used by other drivers. U-Boot currently uses only two channels (stereo). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20sound: Add uclass operations for beepingSimon Glass
Some audio codecs such as Intel HDA do not need to use digital data to play sounds, but instead have a way to emit beeps. Add this interface as an option. If the beep interface is not supported, then the sound uclass falls back to the I2S interface. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20sound: Mark sound_setup() as optionalSimon Glass
This method in the sound API is optional since some drivers can do this when probing or as part of SoC init. Mark it as such. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20x86: ivybridge: Add a way to get the HDA config settingSimon Glass
Add a way check to whether HD audio is enabled. Use ioctl() to avoid adding too many unusual operations to PCH. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20pch: Add ioctl supportSimon Glass
At present the PCH has 4 operations and these are reasonably widely used in the drivers. But sometimes we want to add rarely used operations, and each of these currently adds to the size of the PCH operations table. Add an ioctl() method which can be easily expanded without any more impact on the operations table. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20sandbox: pch: Add a test for the PCH uclassSimon Glass
This uclass currently has no tests. Add a sandbox driver and some simple tests to provide basic coverage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: Use "sandbox,pch" for the compatible string, for consistency] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20x86: sandbox: pch: Add a CONFIG option for PCHSimon Glass
At present this uclass is selected only on x86. In order to add a test for it, it must also support sandbox. Create a new CONFIG_PCH option and enable it on x86 and sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20x86: link: Increase malloc size and decrease code sizeSimon Glass
At present link does not boot since it has outgrown its pre-relocation malloc() size and its assigned code area. Increase the former and drop EFI loader support, which adds about 45KB! Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20x86: samus: Increase the pre-reloc memorySimon Glass
This is too small now, likely due to the pre_reloc_only fixes. Increase it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20x86: Adjust I/O macros to work on 64-bit machinesSimon Glass
At present these macros give warnings on 64-bit machines and do not correctly do 32-bit accesses. Update them to use linux types. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20sandbox: Add a note about the growing state_info structSimon Glass
This struct is getting larger and in some cases is being used for things which would be better put into a driver. For example hwspinlock is not used outside of sandbox_hwspinlock.c. Add a note to encourage people to put things elsewhere. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20pci: Add IDs for Intel high-definition audioSimon Glass
Add a few IDs for common HDA blocks and the ADSP used on samus. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20gpio: Use case-insentive matching on the GPIO nameSimon Glass
Allow the 'gpio' command to match GPIO bank names regardless of the case of each. While these are generally in upper case, it is useful to be able to provide lower case with the command. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20gpio: Show inactive GPIOs when explicitly requestedSimon Glass
At present the gpio command only shows GPIOs which are marked as in use. This makes sense with 'gpio status' since we already have the '-a' flag to indicate that all GPIOs should be shown. But when a particular GPIO is requested, it seems better to always display it. At present the request is simply ignored. For example if GPIO a10 is not in use, then: > gpio status a10 shows nothing, not even the function being used for that GPIO. With this change, it shows the pin status: > gpio status a10 a10: input: 0 [ ] Add an extra parameter for this to avoid changing the existing flag parameter. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the 'gpio' command in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20pci: Fix comment in struct pci_child_platdataSimon Glass
This is platdata, not private data, so the comment is currently incorrect. Fix it to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20pci: Don't export pci_hose_config_device()Simon Glass
This function is not used outside this file so make it static. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20i2c: designware: Add error checking on initSimon Glass
At present this driver does not check whether it is able to actually communicate with the I2C controller. It prints a timeout message but still considers the probe to be successful. To fix this, add some checking that the init succeeds. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-20dm: syscon: Don't require a regmap for PCI devicesSimon Glass
At present it is not possible to use the syscon devices for PCI devices since a regmap is required. Since PCI uses a 3-cell address the conversion of the 'reg' property to an address always fails. In any case, the regmap is not useful with PCI since devices are accessed through the PCI bus which regmap does not support. Add a special case for PCI syscon devices, so that they don't set up a regmap. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20log: Allow #define LOG_DEBUG to enable logging in a fileSimon Glass
At present it is possible to '#define DEBUG' at the top of a file which causes all debug() statements in that file to become active. There is currently no equivalent with logging, but this is a useful function. Add a LOG_DEBUG define along with documentation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20log: Add documentation for convenience functionsSimon Glass
The log_debug(), etc. function are documented only in the header file at present. Add a section to README.log also. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20log: Add a Kconfig option to set the default log levelSimon Glass
At present the default log level is set to LOGL_INFO on start-up. Allow this to be controlled from Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20log: Fix up Kconfig log level namesSimon Glass
The log level numbers in the Kconfig are not actually correct. Fix them and also add a missing space in the header-file comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-19Merge branch '2019-02-19-master-imports'Tom Rini
- Convert some OMAP3 platforms to DM+SPL - Various minor fixes - Updates for hikey, DaVinci, am57xx platforms, - Make FAT use less memory
2019-02-19travis: Exclude omap from the arm926ejs jobTom Rini
We build the platform here that matches with "omap" in its own job, don't need to have it here as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-19cmd: pcmcia: Build only if CONFIG_CMD_PCMCIA=yIsmael Luceno Cortes
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
2019-02-19dm: Fix typo 'Watchdot' -> 'Watchdog'Chris Packham
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-02-19ARM: omap3: evm: Update DM SPL supportDerald D. Woods
- Switch to using the omap3-u-boot.dtsi file for needed properties - Enable SPL_OF_CONTROL This commit is based on the following series: https://patchwork.ozlabs.org/project/uboot/list/?series=92472 https://patchwork.ozlabs.org/project/uboot/list/?series=92462 Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-19omap3_beagle: Enable DM_SPITom Rini
Switch to DM_SPI support now. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-19omap3_beagle: Update for DM SPL supportTom Rini
- Switch to using the omap3-u-boot.dtsi file for needed properties. - Remove a few SPL features to free up more SRAM space. - Switch CONFIG_SYS_TEXT_BASE to the normal default, we don't need to worry about X-Loader at this point anymore. - A few related updates to SPL options as part of switching to DM SPL. Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
2019-02-19cmd/fs: fix build if CMD_BOOTEFI is not setGervais, Francois
Fixes: cmd/fs.c:29: undefined reference to `efi_set_bootdev' Signed-off-by: Francois Gervais <fgervais@distech-controls.com>
2019-02-19ARM: omap3_logic: Enable SPL booting device treeAdam Ford
With the generic omap3-u-boot.dtsi file available, this patch increased the memory of the various incarnations of the omap3_logic board, and points their respective u-boot.dtsi files to the newly created generic one, and removes the PLATDATA from the board file. These are all done at once because the're all utilizing the same omap3logic.c board file. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-19ARM: DTS: omap3-u-boot.dtsiAdam Ford
Create generic omap3-u-boot.dtsi file that omap3 based boards can include to generate device tree in SPL for booting MLO. Credit should go to Tom Rini. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
2019-02-19ARM: da8xxevm: Add NAND instructions for da850-evm to READMEAdam Ford
The README.da850 file continues information on how to burn NAND for the LCDK, but not the DA850-EVM. This patch adds both the commands and dip switch instructions for burning and booting NAND. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-19ARM: am3517_evm: Enable Falcon ModeAdam Ford
The other OMAP3 based Logic PD boards have Falcon Mode enabled, so this patch makes it possible on the AM3517-evm as well. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-19ARM: da850evm: Increase Malloc SizeAdam Ford
The SPI NOR frameware was recently updated, but they require a little more memory that we had previosly allocated, so it stopped booting. This patch doubles the size of CONFIG_SPL_SYS_MALLOC_F_LEN to 0x800. Fixes: c4e8862308d4 ("mtd: spi: Switch to new SPI NOR framework") Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-19hikey: Allow environment to store in eMMC and increase bootdelayManivannan Sadhasivam
Current Hikey configuration allows us to store u-boot environment on uSD card. But this will be useless if uSD card is not inserted, hence use the onboard eMMC memory for storing environment at Boot1 partition. While we are at it, let's increase the boot delay to 10s also. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-19test: let use gdbserver for all sandbox targetsIgor Opaniuk
Enable usage of gdbserver for all sandbox targets (sandbox, sandbox_flattree etc.). Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-19bcm963158: use TARGET_BCM963158 instead of ARCH_BCM63158Philippe Reynes
We use TARGET_BCM63158 in the Kconfig instead of ARCH_BCM63158, so we could add other board that use a bcm63158. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-19dtbo: Fix dtbo generation rulesMichal Simek
Take the first prerequisite (dts overlay file) instead of standard input. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-19fs: fat: Reduce default max clustersize 64KiB from malloc poolTien Fong Chee
Release cluster block immediately when no longer use would help to reduce 64KiB memory allocated to the memory pool. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-02-19fs: fat: dynamically allocate memory for temporary bufferTien Fong Chee
Drop the statically allocated get_contents_vfatname_block and dynamically allocate a buffer only if required. This saves 64KiB of memory. Signed-off-by: Stefan Agner <stefan.ag...@toradex.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-02-19spl: implement CRC check on U-Boot uImageSimon Goldschmidt
SPL currently does not check uImage CRCs when loading U-Boot. This patch adds checking the uImage CRC when SPL loads U-Boot. It does this by reusing the existing config option SPL_CRC32_SUPPORT to allow leaving out the CRC check on boards where the additional code size or boot time is a problem (adding the CRC check currently adds ~1.4 kByte to flash). The SPL_CRC32_SUPPORT config option now gets enabled by default if SPL support for legacy images is enabled to check the CRC on all boards that don't actively take countermeasures. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-19configs: am57xx_evm: define CONFIG_SPL_LOAD_FIT_ADDRESS for SPL-DFUBin Liu
Define CONFIG_SPL_LOAD_FIT_ADDRESS to enable SPL-DFU for am57x platform. Signed-off-by: Bin Liu <b-liu@ti.com>
2019-02-19cmd: date: Do not overwrite argumentsRoman Kapl
Arguments are const and belong to the caller. Calling date in a hush loop will yield different results from the second invocation. Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-02-19elf: fix cache flushing in 'bootelf -p' commandKurban Mallachiev
Currently there are two problems in 'bootelf -p' (load elf by segments) command: - bss section is not flushed, so booted elf can have non zero values in bss; - at least on ARM there are 'CACHE: Misaligned operation at range...' warnings Use p_memsz instead of p_filesz during cache flushing for elf segment. p_filesz doesn't include zero initialized memory (e.g. bss section), which also should be flushed. Align these cache flushes to line boundaries. Signed-off-by: Kurban Mallachiev <mallachiev@ispras.ru>
2019-02-19board/BuR/brxre1: convert do DMHannes Schmelzer
This commit converts the brxre1 board to DM, for this we have todo following things: - add a devicetree-file for this board - drop all obsolete settings from board header-file - use dm_i2c_xxx calls for read/write to the resetcontroller - request gpios before operate them Serues-cc: trini@konsulko.com Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-02-19dm: scsi: report correct device numberHeinrich Schuchardt
Before the patch scsi would report the same device number for all SCSI devices, e.g. Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01 Type: Hard Disk Capacity: 122104.3 MB = 119.2 GB (250069680 x 512) Device 0: (1:0) Vendor: ATA Prod.: Rev: Type: Hard Disk Capacity: not available With the patch the same device number is reported as is used in scsi_read(): Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01 Type: Hard Disk Capacity: 122104.3 MB = 119.2 GB (250069680 x 512) Device 1: (1:0) Vendor: ATA Prod.: Rev: Type: Hard Disk Capacity: not available Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-02-19tpm: simplify: tpm_set_global_lock()Heinrich Schuchardt
When in pack_byte_string() memcpy() is called for size 0 the source buffer address has no relevance. So we can use NULL here. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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