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2019-02-01rockchip: Drop note about supporting other SoCsSimon Glass
Quite a wide range of Rockchip SoCs are supported in mainline U-Boot now, so drop the comment about needing to add more. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add mention of other boardsSimon Glass
At present some Rockchip SoCs and boards are not mentioned in the README. So that people can see which SoCs are supported, expand the list to include everything. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01gpio: Add a simple GPIO API for SPLSimon Glass
In space-constrained environments or before driver model is available, it is sometimes necessary to set GPIO values. Add an SPL API for this, to allow early board code to change GPIOs. The caller must provide the register address, so that the drivers can be fairly generic. This API can be implemented by GPIO drivers, behind a suitable guard, like #ifdef CONFIG_SPL_BUILD. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01gpio: Use more command-specific enums valuesSimon Glass
At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command values. These are pretty generic names. Add a 'C' suffix to avoid possible conflicts. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01clk: Improve debug message in clk_set_default_rates()Simon Glass
It is helpful to print the clock number as well as the index, so that this can be looked up in the binding file. Update the debug() statement to do this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01lib: Allow using display_buffer() in SPLSimon Glass
At present this function uses printf() format strings that are not supported in SPL, so the output just consists of %llx strings on 64-bit. machines. Fix this by adding a special case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: dts: rk322x: Correct the uart2 default pin configurationDavid Wu
To match the iomux setting of uart2 at SPL, correct the uart2 default pin configuration, if not changed, the evb-rk3229 can't output the log message. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: rockchip: Clean the unused rockchip pinctrl driversDavid Wu
If we used the pinctrl-rockchip driver, these code is not needed, so remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: defconfig: Clean the unused pinctrl configDavid Wu
If we used the pinctrl-rockchip driver, these config is not needed, so remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: rockchip: Add common rockchip pinctrl driverDavid Wu
Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rk3288: chrome: defconfig: Enable FDT for new pinctrl driverDavid Wu
The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA and enable SPL_OF_LIBFDT to make FDT be built in. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: rockchip: Remove the pinctrl request at rk3288-board-splDavid Wu
If we use the new pinctrl driver, the pinctrl setup will be done by device probe. Remove the pinctrl setup at rk3288-board-spl. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188David Wu
It seems that pinctrl is not requested for rk3188 SPL, remove it so that can save more space for SPL image size. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: rockchip: rk3188: Remove the pinctrl setup and enable uart at SPLDavid Wu
When the boot ROM sets up MMC we don't need to do it again. Remove the MMC setup code entirely, but we also need to enable uart for debug message. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: rk3399-evb: defconfig: Enable FDT for new pinctrl driverDavid Wu
The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA to make FDT be built in. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: add support for veyron-speedy (ASUS Chromebook C201)Marty E. Plummer
This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: dts: rk3399-firely: add 'same-as-spl'Mark Kettenis
Like on rk3399-puma we want to continue booting the fill U-Boot from the same device as the SPL stage. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Drop call to rockchip_dnl_mode_check() for nowSimon Glass
This function causes a 5-second delay and stops the display working on minnie. This code should be in a driver and should only be enabled by a device-tree property, so that it does not affect devices which do not have this feature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01sound: rockchip: Add sound support for jerrySimon Glass
Jerry uses a max98090 audio codec and the internal SoC I2S peripheral. Enable sound support and add the required device-tree pieces. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add a sound driverSimon Glass
Add a sound driver for rk3288 supporting chromebook_jerry. This uses the I2S driver, and existing audio codec and the clock/pinmux support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add an I2S driverSimon Glass
Add a driver for I2S which allows audio data to be sent from the SoC to the audio codec. The sample rate and other settings are hard-coded for now as there is no suitable device-tree binding available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: rk3288: Add i2s pinctrl and clock supportSimon Glass
Add support for setting pinctrl and clock for I2S on rk3288. This allows the sound driver to operate. These settings were created by rkmux.py Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: DTS: am43xx: Enable the DTS entries for USB port #2 in SPLJean-Jacques Hiblot
This is required to enable the USB port #2 in SPL when DM_USB is used. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-02-01ARM: DTS: am43xx: Add aliases for the USB portsJean-Jacques Hiblot
Although not required, it doesn't hurt to explicitly map the USB ports to a USB controller. Without this, the port number will be derived from the binding order of the peripheral devices. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-02-01ARM: DTS: Resync am3517-evm.dts with Linux 5.0-rc3Adam Ford
The chosen node was added in the kernel. This may come in handy in the future, so resync with 5.0-rc3 Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-01ARM: dts: da850-evm: Re-sync with Kernel 5.0Adam Ford
Resync with Kernel 5.0-rc3 Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-01ARM: am3517_evm: Enable DM_SPI and DM_USBAdam Ford
To comply with pending requirements, this sets the flags to enable DM_SPI and DM_USB. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-01spl: fat/fs: Add control to build FS EXT4 in SPLTien Fong Chee
CONFIG_SPL_FS_EXT4 can be used to include/exclude the FS EXT4 from SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB memory. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01spl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4Tien Fong Chee
Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPLY_FS_EXT4 so both obj-$(CONFIG_$(SPL_)FS_EXT4) and CONFIG_IS_ENABLED(FS_EXT4) can be used to control the build in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01spl: fat/fs: Add option to include/exclude FAT write build in SPLTien Fong Chee
Most of the time SPL only needs very simple FAT reading, so having CONFIG_IS_ENABLED(FAT_WRITE) to exclude it from SPL build would help to save 64KiB default max clustersize from memory. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FATTien Fong Chee
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01configs: removing am335x_evm_usbspl_defconfigJean-Jacques Hiblot
This feature is now supported by the main config for am335x_evm: am335x_evm_defconfig Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01configs: am335x_evm: enable DM_USB_GADGET and USB_ETHER in u-boot and SPLJean-Jacques Hiblot
The AM335x ROM boot is able to download the SPL from a RNDIS connection on USB0. To enable a full RNDIS boot flow (romboot -> SPL -> u-boot -> ..), we can use USB_ETHER in SPL and u-boot. However this increase the size of the SPL past its limit. So removing the unused SPL_EXT_SUPPORT. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01ARM: DTS: am335x-evm: Use USB0 in peripheral modeJean-Jacques Hiblot
This USB port is mainly used for RNDIS and DFU. To be able to use it with DM_USB and DM_USB_GADGET, we need to provide a dr_mode value in the DTS. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01usb: ether: call _usb_eth_halt() if initialization failsJean-Jacques Hiblot
If the host does not respond in time, the initialization fails. However the usb ether driver will still be registered. This will make usb_gadget_probe_driver() fail the next time the initialization is attempted because it cannot find an available UDC. Fixing this by calling _usb_eth_halt() when the init fails. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-02-01am335x, shc: adapt shc board to DMHeiko Schocher
port the am335x based shc board to DM, to get rid of DW warnings when compiling U-Boot. - remove uneccessary board code - adapt defconfigs - remove unneeded defconfigs configs/am335x_shc_prompt_defconfig configs/am335x_shc_sdboot_prompt_defconfig Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01ARM: dts: am335x-shc: add u-boot specific dtsiHeiko Schocher
add u-boot specific am335x-shc-u-boot.dtsi file, in which we add u-boot specific adaptions. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01arm: dts: add am335x-shc.dts for shc boardHeiko Schocher
add DTS from linux tree commit "47bfa6d9dc8c060bf56554a465c9031e286d2f80" change for U-Boot: switch to SPDX-license identifier. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-02-01configs: mscc_luton: Add network support.Horatiu Vultur
Update default config to use network driver for Luton SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: Add MSCC Luton networkd driver.Horatiu Vultur
Add network driver for Microsemi Ethernet switch, it is present on Luton SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01mips: mscc: luton: Add ethernet nodes for Luton.Horatiu Vultur
Add nodes for pcb090 and pcb091. There is currently no support in Linux for this SoC. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Remove unused variablesHoratiu Vultur
Remove unused variables in the struct ocelot_private and make miim variable static. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move mac_table_add function into different file.Horatiu Vultur
Move the function mac_table_add into a different file, so it can be reused. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move ocelot_send and ocelot_recv in a different file.Horatiu Vultur
This functions can be reused by other MSCC SoCs therefore, make them more generic and move them in separate files. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move miim commands into separate file.Horatiu Vultur
Move miim functions that can be shared in a different file inside mscc_eswitch. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move ocelot_switch to mscc_eswitch folderHoratiu Vultur
Move file ocelot_switch to mscc_eswitch to prepare to add new net drivers for other MSCC SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01mips: mt76xx: Use correct timer frequencyStefan Roese
Testing has shown that the timer on the MT7688 platforms does not run correctly (too fast timeout). This patch changes CONFIG_SYS_MIPS_TIMER_FREQ from 200MHz to 290MHz which is the correct value, as its also used in Linux. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-02-01MSCC: Fix Jaguar2 board detection.Horatiu Vultur
When power cycle the Jaguar2 boards, it couldn't read the phys, therefore it always deduce that the board type is pcb111. Add a small delay after setting the gpio pins, fix the issue. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01MSCC: Jaguar2 enable debug uartHoratiu Vultur
Enable debug uart for Jaguar2 SoC family. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-31Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-videoTom Rini
- ihs and imx driver fixes - relax EDID validation checks for 0 hsync/vsync pulse width (support some quirky displays)
generated by cgit (git 2.34.1) at 2024-12-23 23:52:10 +0000