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2019-05-07net: sh_eth: Add support for operation without clock frameworkMarek Vasut
Add ifdeffery to allow operation without the clock framework enabled. This is required on RZ/A1, as it does not have clock driver yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07net: sh_eth: Add RZ/A1 supportMarek Vasut
Add support for RZ/A1 SoC specifics. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07serial: sh: Add RZ/A1 supportMarek Vasut
Add support for RZ/A1 SoC specifics. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07timer: renesas: Add RZ/A1 R7S72100 OSTM timer driverMarek Vasut
Add OSTM timer driver for RZ/A1 SoC. The IP is very different from the R-Car Gen2/Gen3 one already present in the tree, hence a custom driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07pinctrl: renesas: Add RZ/A1 R7S72100 pin control driverMarek Vasut
Add pin control driver for RZ/A1 SoC. The IP is very different from the R-Car Gen2/Gen3 one already present in the tree, hence a custom driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07gpio: renesas: Add RZ/A1 R7S72100 GPIO driverMarek Vasut
Add GPIO driver for RZ/A1 SoC. The IP is very different from the R-Car Gen2/Gen3 one already present in the tree, hence a custom driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07sh: 7785: Remove CPU supportMarek Vasut
There are no more boards using this CPU and there is no prospect of any boards showing up soon, remove it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07sh: sh7785lcr: Remove the boardMarek Vasut
Last change to this board was done in 2016, it uses non-DM USB with no prospects of ever being converted to DM USB, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07sh: 7724: Remove CPU supportMarek Vasut
There are no more boards using this CPU and there is no prospect of any boards showing up soon, remove it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07sh: ecovec: Remove the boardMarek Vasut
Last change to this board was done in 2016, it uses non-DM USB with no prospects of ever being converted to DM USB, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07sh: sh7757lcr: Fix copy-paste error in READMEMarek Vasut
Update the README to use the correct defconfig. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-06Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Various pinctrl / gpio fixes for R-Car
2019-05-06Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
- Important spi-mem fix
2019-05-06ARM: socfpga: stratix10: Probe FPGA status before bridge enableAng, Chee Hong
Send CONFIG_STATUS and RECONFIG_STATUS mailbox commands to Secure Device Manager (SDM) to get the status of FPGA and make sure the FPGA is in user mode before enable the bridge. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2019-05-06ARM: socfpga: stratix10: Disable FPGA2SOC resetAng, Chee Hong
Software must never reset FPGA2SOC bridge. This bridge must only be reset by POR/COLD/WARM reset. Asserting the FPGA2SOC reset by software can cause the SoC to lock-up if there are traffics being drived into FPGA2SOC bridge. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2019-05-06arm: socfpga: Move Stratix 10 SDRAM driver to DMLey Foon Tan
Convert Stratix 10 SDRAM driver to device model. Get rid of call to socfpga_per_reset() and use reset framework. SPL is changed from calling function in SDRAM driver directly to just probing UCLASS_RAM. Move sdram_s10.h from arch to driver/ddr/altera directory. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06arm: dts: Stratix10: Add SDRAM nodeLey Foon Tan
Add SDRAM device tree node. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan
Compile ALTERA_SDRAM driver in SPL only. Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06configs: stm32f469-disco: Disable PINCTRL_FULL flagPatrice Chotard
Disable unused PINCTRL_FULL flag. Series-cc: pde, cke, pch, uboot-stm32 Cover-letter: SPI flash STM32 MCU's fixes This series update MCU's DT in order to fix SPI flash configuration: - Adds MPU region dedicated for SPI flash used in memory mapped mode. - Fixes compatible string. - Fixes memory map size. - Updates spi-tx-bus-width and spi-rx-bus-width property values. - Adds QSPI flash support for STM32F469-disco board END Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06configs: stm32f469-disco: Enable QSPI relative flagsPatrice Chotard
Enable CMD_SF, MTD, DM_SPI_FLASH, SPI_FLASH, SPI, DM_SPI and STM32_QSPI flags to be able to use the embedded n25q128a QSPI flash on stm32f469-disco board. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06spi: Kconfig: Add STM32F4 support for STM32_QSPI driverPatrice Chotard
Allow to select STM32_QSPI driver on STM32F4 SoCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: Add qspi support for stm32f469-disco boardPatrice Chotard
Add device tree nodes to support qspi for stm32f469-disco board. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f769-discoPatrice Chotard
As mx66l512 qspi flash supports quad input fast program and quad input fast read, set spi-tx_bus-width and spi-rx_bus-width to 4. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: Remove useless spi-nor compatible stringPatrice Chotard
Compatible string "micron,n25q128a13" is useless, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-discoPatrice Chotard
As n25q128 qspi flash supports quad input fast program and quad input fast read, set spi-tx_bus-width and spi-rx_bus-width to 4. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-evalPatrice Chotard
As n25q512a qspi flash supports quad input fast program and quad input fast read, set spi-tx_bus-width and spi-rx_bus-width to 4. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: add qspi flash compatible string for stm32f746-evalPatrice Chotard
Add missing flash compatible string to be able to read/write into qspi flash. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: add qspi flash compatible string for stm32f769-discoPatrice Chotard
Add missing flash compatible string to be able to read/write into qspi flash. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06ARM: dts: stm32: Fix qspi memory map size for stm32f7 boardsPatrice Chotard
stm32f746-disco embeds a 16Mb qspi flash, stm32f746-eval and stm32f769-disco embeds a 64Mb qspi flash. Update the reg property accordingly Remove deprecated memory-map property. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06mach-stm32: Add MPU region for spi-nor memory mapped regionPatrice Chotard
The Quad-SPI interface is able to manage up to 256Mbytes Flash memory starting from 0x90000000 to 0x9FFFFFFF in the memory mapped mode. Add a dedicated MPU region into stm32_region_config. See application note AN4760 available at www.st.com Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-05Merge branch '2019-05-05-master-imports'Tom Rini
- Various assorted fixes - btrfs zstd compression support - Enable hardware DDR levelling on am43xx platforms. - pl310 cache controller driver
2019-05-05env: add missing newlinePhilip Molloy
Signed-off-by: Philip Molloy <philip@philipmolloy.com>
2019-05-05board: toradex: drop support.arm maintainer emailMarcel Ziswiler
Drop Toradex ARM Support <support.arm@toradex.com> from maintainer email list as this just clogs our support ticketing system. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2019-05-05cmd: pxe: add board specific PXE default pathMarek Behún
The list of PXE default paths contains ARCH and SOC specific paths, but one PXE server can serve different board with the same ARCH and SOC. This is the case for Turris Omnia and Turris Mox, where ARCH=arm and SOC=mvebu. If CONFIG_SYS_BOARD is defined, also try "default-$ARCH-$SOC-$BOARD" path. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2019-05-05ARM: da850evm: Enable da850-ohci USB host controllerAdam Ford
The DA850 EVM has one USB 1.1 OHCI Host controller. With the host controller now support DM_USB, this patch enables the respective functions for the da850evm. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-05usb: ohci: ohci-da8xx: Enable da850-ohci driver with DM supportAdam Ford
This patch reuses some former code for the hawkboard, combines it with some some similar DM_USB compatible code for the OHCI driver, and enables the use of the da850's OHCI controller with DM_USB compatibility. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-05fs: btrfs: add zstd decompression supportMarek Behún
This adds decompression support for Zstandard, which has been included in Linux btrfs driver for some time. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2019-05-05lib: add Zstandard decompression supportMarek Behún
Add the zstd library from Linux kernel (only decompression support). There are minimal changes to build with U-Boot, otherwise the files are identical to Linux commit dc35da16 from March 2018, the files had not been touched since in kernel. Also SPDX lincese tags were added. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2019-05-05lib: Add xxhash supportMarek Behún
This adds the xxhash support from Linux. Files are almost identical to those added to Linux in commit 5d240522 ("lib: Add xxhash module") (they haven't been touched since in Linux). The only difference is to add some includes to be compatible with U-Boot. Also SPDX lincese tags were added. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2019-05-05board: ti: am43xx: Enable hardware levelingBrad Griffis
Remove the RDLVL_MASK, RDLVLGATE_MASK, WRLVL_MASK & enable PHY_INVERT_CLKOUT to enable Hardware leveling for am437x as recommended by EMIF Tools app note: http://www.ti.com/lit/an/sprac70/sprac70.pdf Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36Brad Griffis
for suspend/resume robustness update value for ext_phy_ctrl_36 for suspend/resume robustness with hardware leveling enabled. Match recommended values from EMIF Tools app note: http://www.ti.com/lit/an/sprac70/sprac70.pdf Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw levelingBrad Griffis
In case of RTC+DDR resume, need to restore EMIF context before initiating hardware leveling. Signed-off-by: Brad Griffis <bgriffis@ti.com> [j-keerthy@ti.com Fixed the am335x build issues] Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr pathBrad Griffis
Enable HW leveling in RTC+DDR path. The mandate is to enable HW leveling bit and then wait for 1 ms before accessing any register. Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 errorBrad Griffis
Add 1ms delay to avoid L3 timeout error during suspend resume. Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and ↵Brad Griffis
EXT_PHY_CTRL1_SHADOW Adjust DQS skew in case where invert_clkout=1 is used. Match recommended values from EMIF Tools app note: http://www.ti.com/lit/an/sprac70/sprac70.pdf Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05lib/display_options: avoid illegal memory accessHeinrich Schuchardt
display_options_get_banner_priv() overwrites bytes before the start of the buffer if the buffer size is less then 3. This case occurs in the Sandbox when executing the `ut_print` command. Correctly handle small buffer sizes. Adjust the print unit test to catch when bytes before the buffer are overwritten. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-05configs: am335x_evm: enable SPL_FIT_IMAGE_TINYJean-Jacques Hiblot
The size of the SPL for the am335x_evm is constrained. There is no need to have advanced SPL FIT features, so keep the SPL FIT support tiny. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-05spl: fit: Always enable tracking of os-type if SPL_OS_BOOT is enabledJean-Jacques Hiblot
FIT_IMAGE_TINY is used to reduce the size of the SPL by removing os-type tracking and recording the loadables into the loaded FDT. When this option is enabled, it is assumed that the next stage firmware is u-boot. However this does not play well with the SPL_OS_BOOT option that enables loading different type of next stage firmware, like the OS itself. When SPL_OS_BOOT is used, do not disable os-tracking. The added footprint is about 300 Bytes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-05spl: fix linker size check off-by-one errorsSimon Goldschmidt
This fixes SPL linker script size checks for 3 lds files where the size checks were implemented as "x < YYY_MAX_SIZE". Fix the size checks to be "x <= YYY_MAX_SIZE" instead. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-05configs: socfpga: add imply pl310 cache controllerDinh Nguyen
Select the PL310 UCLASS_CACHE driver for SoCFPGA. Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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