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2019-09-02pci: sh7751: Convert to DM and DT probingMarek Vasut
Convert the SH7751 PCI driver to DM and add DT probing. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2019-09-02sh: r2dplus: Enable OF controlMarek Vasut
Enable OF control for SH4 R2Dplus board. This is necessary, because the PCI uclass is designed in a way that makes it depend on DT and disallows instanciating devices without DT (e.g. with platdata). Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02sh: r2dplus: Enable DMMarek Vasut
Enable driver model support for SH4 R2Dplus board. Thus far, no drivers are bound via the DM. The PCI drivers have yet to be converted to DM_PCI. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02sh: Fix OF_SEPARATE supportMarek Vasut
If the OF_SEPARATE is enabled, the DT is appended past the _end symbol. The current code however clears BSS very early, which overwrites the DT blob with zeroes. Moreover, the early code relocates U-Boot into RAM to the correct location, but does not relocate the DT. This patch adds code to relocate the DT and avoids clearing BSS too early, thus addressing both problems with OF_SEPARATE on SH. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02sh: tmu: Fix SH4 TCNT0 offsetMarek Vasut
Fix the offset of TCNT0 register, which is 0xc on SH4. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02dm: core: Decouple DM from DTMarek Vasut
Some of the DM functions depend on OF_CONTROL, which is incorrect. DM and DT are orthogonal. Add macro guards around such functions to avoid compiling them in when DM is enabled, while OF_CONTROL is not. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2019-09-01Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- r8a66597 usb changes
2019-08-31Merge branch '2019-08-30-master-imports'Tom Rini
- Assorted bug fixes
2019-08-31Makefile: fix newline escaping for CONFIG_DEFAULT_ENV_FILERasmus Villemoes
I wanted this to be compatible with mkenvimage, including the ability to embed newlines in variables by escaping them. But I failed to check that it works more than once. Fixes: f3d8f7dd73a (Allow providing default environment from file) Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2019-08-31Revert "vexpress64: fvp dram: add DRAM configuration"Ryan Harkin
This reverts commit fc04b923541d984b1544056fd3bfa8129d4e5aac where the FVP DRAM configuration was added. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com>
2019-08-30siemens: avoid out of bound accessHeinrich Schuchardt
char num[1]; sprintf(num, "%d", i); leads to a buffer overrun. Simplify the overly complex coding. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
2019-08-30arm: omap2: am43xx: Enable CONFIG_DM_USBSuniel Mahesh
Enable CONFIG_DM_USB to remove compile warning for am43xx based targets: ===================== WARNING ====================== This board does not use CONFIG_DM_USB. Please update the board to use CONFIG_DM_USB before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-08-30Makefile: clean build generated SPL binary for TI AM65xSuniel Mahesh
TI AM65x platforms (evm and HS) generate an SPL image 'tispl.bin*' and there is no rule for cleanup. Added entry for cleanup in clean target. Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-08-30configs: enable CONFIG_BLOCK_CACHE for mt7623n_bpir2Weijie Gao
This patch enables CONFIG_BLOCK_CACHE for mt7623n_bpir2. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-08-30mmc: invalidate block cache after hwpart switched successfullyWeijie Gao
eMMC device has multiple hw partitions both address from zero. However the mmc driver lacks block cache invalidation for switch hwpart. This causes a problem that data of current hw partition is cached before switching to another hw partition. And the following read operation of the latter hw partition will get wrong data when reading from the addresses that have been cached previously. To solve this problem, invalidate block cache after a successful mmc_switch_part() operation. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Tested-by: Felix Brack <fb@ltec.ch>
2019-08-30Revert "blk: Invalidate block cache when switching hwpart"Weijie Gao
This reverts commit 0ebe112d09b48230ba4be833cd3504b06997d9a4. Most block devices have only one hwpart. Multiple hwparts only found used by eMMC devices in u-boot. The mmc driver do blk_dselect_hwpart() at the beginning of mmc_bread() which causes block cache being invalidated too frequently and makes block cache useless. So it's not a good idea to put blkcache_invalidate() in the common functions. It should be called inside mmc_select_hwpart(). Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Tested-by: Felix Brack <fb@ltec.ch>
2019-08-30board_f: fix noncached reservation calculationStephen Warren
The current code in reserve_noncached() has two issues: 1) The first update of gd->start_addr_sp always rounds down to a section start. However, the equivalent calculation in cache.c:noncached_init() always first rounds up to a section start, then subtracts a section size. These two calculations differ if the initial value is already rounded to section alignment. 2) The second update of gd->start_addr_sp subtracts exactly CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in cache.c:noncached_init() rounds the noncached size up to section alignment before subtracting it. The two calculations differ if the noncached region size is not a multiple of the MMU section size. In practice, one/both of those issues causes a practical problem on Jetson TX1; U-Boot triggers a synchronous abort during initialization, likely due to overlapping use of some memory region. This change fixes both these issues by duplicating the exact calculations from noncached_init() into reserve_noncached(). However, this fix assumes that gd->start_addr_sp on entry to reserve_noncached() exactly matches mem_malloc_start on entry to noncached_init(). I haven't traced the code to see whether it absolutely guarantees this in all (or indeed any!) cases. Consequently, I added some comments in the hope that this condition will continue to be true. Fixes: 5f7adb5b1c02 ("board_f: reserve noncached space below malloc area") Cc: Vikas Manocha <vikas.manocha@st.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2019-08-29Merge tag 'efi-2019-10-rc4' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for v2019.10-rc4 Enable the unit test for UEFI runtime service Exit() on x86_64. Use as standalone UEFI binary for testing the handling of exceptions.
2019-08-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini
Enable DM PCI for T2080RDB, T4240RDB, T1024RDB, T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, and MPC8548CDS
2019-08-29Merge tag 'u-boot-amlogic-20190828' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - add missing g12b clock driver compatible, fixing odroid-n2 usb support
2019-08-29efi_selftest: use standalone UEFI program for exceptionHeinrich Schuchardt
To fully demonstrate crash outputs for UEFI images provide a standalone UEFI application that tries to invoke an illegal opcode. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-08-29efi_selftest: enable Exit() unit test on x86_64Heinrich Schuchardt
Enable unit tests for StartImage() and Exit() unit tests on x86_64. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-08-28configs: MPC8548CDS: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in MPC8548CDS defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: MPC8548CDS: Disable legacy PCIe driver when DM_PCI is enabledHou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28MPC8548: dts: Added PCIe DT nodeHou Zhiqiang
MPC8548 integrated a PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for the PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add MPC8548 PCIe supportHou Zhiqiang
Add compatible string for MPC8548 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: MPC85xxCDS: Disable legacy PCI fixup when DM_PCI is selectedHou Zhiqiang
Disable legacy PCI and PCIe fixup when CONFIG_DM_PCI is selected. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: MPC8548CDS: Compile legacy PCIe routines conditionallyHou Zhiqiang
Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28configs: P5040DS: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in P5040DS defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> eviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28P5040: dts: Added PCIe DT nodesHou Zhiqiang
P5040 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P5040 PCIe supportHou Zhiqiang
Add compatible string for P5040 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28configs: P4080DS: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in P4080DS defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28P4080: dts: Added PCIe DT nodesHou Zhiqiang
P4080 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P4080 PCIe supportHou Zhiqiang
Add compatible string for P4080 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28configs: P3041DS: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in P3041DS defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: corenet_ds: Disable legacy PCIe driver when DM_PCI is enabledHou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28P3041: dts: Added PCIe DT nodesHou Zhiqiang
P3041 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P3041 PCIe supportHou Zhiqiang
Add compatible string for P3041 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28configs: P2041RDB: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in P2041RDB defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: P2041RDB: Disable legacy PCIe driver when DM_PCI is enabledHou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28P2041: dts: Added PCIe DT nodesHou Zhiqiang
P2041 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 2.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P2041 PCIe supportHou Zhiqiang
Add compatible string for P2041 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: p_corenet: Compile legacy PCIe routines conditionallyHou Zhiqiang
Compile the legacy PCIe initialization routines for P2041RDB, P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28configs: P2020RDB: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in P2020RDB defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28P2020: dts: Added PCIe DT nodesHou Zhiqiang
P2020 integrated 3 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28configs: P1020RDB: Enable PCIe driverHou Zhiqiang
Enable the DM PCIe driver in P1020RDB defconfig. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: p1_p2_rdb: Disable legacy PCIe driver when DM_PCI is enabledHou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled for P1020, P1021, P1024, P1025 and P2020 RDB boards. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28P1020: dts: Added PCIe DT nodesHou Zhiqiang
P1020 integrated 2 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 1.0a, and this patch is to add DT node for each PCIe controller. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add PCIe support for P1 and P2 series SoCsHou Zhiqiang
Add compatible string for PCIe of P1020, P1021, P1024, P1025 and P2020 SoCs. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28powerpc: p1_p2_rdb: Compile legacy PCIe routines conditionallyHou Zhiqiang
Compile the legacy PCIe initialization routines for P1020, P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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