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2018-12-10configs: am335x: am57x: dra7x: Enable CONFIG_SPL_DM_SEQ_ALIASJean-Jacques Hiblot
Those platforms need CONFIG_SPL_DM_SEQ_ALIAS because they enable both DM_I2C and SPL_DM. Without CONFIG_SPL_DM_SEQ_ALIAS, it is not possible to get the I2C bus with i2c_get_chip_for_busnum(). Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Felix Brack <fb@ltec.ch> Tested-by: Felix Brack <fb@ltec.ch> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10dm: device: Allow using uclass_find_device_by_seq() without OF_CONTROLJean-Jacques Hiblot
If OF_CONTROL is not enabled and DM_SEQ_ALIAS is enabled, we must assign an alias (requested sequence number) to devices that belongs to a class with the DM_UC_FLAG_SEQ_ALIAS flag. Otherwise uclass_find_device_by_seq() cannot be used to get/probe a device. In particular i2c_get_chip_for_busnum() cannot be used. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10dm: i2c: Make i2c_get_chip_for_busnum() fail if the chip is not detectedJean-Jacques Hiblot
i2c_get_chip_for_busnum() really should check the presence of the chip on the bus. Most of the users of this function assume that this is done. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10cmd: Kconfig: Do not include EEPROM if DM_I2C is used without DM_I2C_COMPATJean-Jacques Hiblot
The implementation of the EEPROM commands does not support the DM I2C API. Prevent compilation breakage by not enabling it if the non-DM API is not available (if DM_I2C is used without DM_I2C_COMPAT) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10efi: payload: only init usb if necessaryBin Meng
Up until now the call to initialize the USB subsystem was hardcoded for U-Boot running as an EFI payload. This was used to enable the use of a USB keyboard in the U-Boot shell. However not all boards might need this functionality. As initializing the USB subsystem can take a considerable amount of time (several seconds on some boards), we now initialize the USB subsystem only if U-Boot is configured to use USB keyboards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-12-10coreboot: only init usb if necessaryThomas RIENOESSL
Up until now the call to initialize the USB subsystem was hardcoded for U-Boot running as a coreboot payload. This was used to enable the use of a USB keyboard in the U-Boot shell. However not all boards might need this functionality. As initializing the USB subsystem can take a considerable amount of time (several seconds on some boards), we now initialize the USB subsystem only if U-Boot is configured to use USB keyboards. Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-12-10x86: kconfig: Allow board defconfig file to disable 8259 and APICBin Meng
At present the Kconfig options (CONFIG_I8259_PIC and CONFIG_APIC) do not include a prompt message, which makes it impossible to be disabled from a board defconfig file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-10x86: Wrap calls to 8259 with CONFIG_I8259_PICBin Meng
mask_irq(), unmask_irq() and specific_eoi() are provided by the i8259 PIC driver and should be wrapped with CONFIG_I8259_PIC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-12-10x86: make the LAPIC / IOAPIC construct switchable with KconfigHannes Schmelzer
There are still systems running which do not have any LAPIC or even IOAPIC. Responsible MSRs for those do not exist and the systems are crashing on trying to setup LAPIC. This commit makes the APIC stuff able to switch off for those boards which dont' have an LAPIC / IOAPIC. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-10x86: acpi: Fix indentation in Intel Tangier ASL codeAndy Shevchenko
Make the indentation aligned with what used elsewhere in U-Boot. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-10x86: acpi: Enable RTC for Intel TangierAndy Shevchenko
Intel Tangier SoC has RTC inside. So, enable it in ACPI. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-09ARM: mvebu: restore license information in mv_ddr_plat.{c,h}Chris Packham
This was unintentionally removed when syncing with upstream. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-12-09Merge git://git.denx.de/u-boot-marvellTom Rini
- Sync DDR training with Marvell code for Armada 38x by Chris - Misc updates to Armada 38x Helios4 board by Aditya
2018-12-08Roll CRC16-CCITT into the hash infrastructurePhilipp Tomsich
The CRC16-CCITT checksum function is useful for space-constrained applications (such as obtaining a checksum across a 2KBit or 4KBit EEPROM) in boot applications. It has not been accessible from boot scripts until now (due to not having a dedicated command and not being supported by the hash infrstructure) limiting its applicability outside of custom commands. This adds the CRC16-CCITT (poly 0x1021, init 0x0) algorithm to the list of available hashes and adds a new crc16_ccitt_wd_buf() to make this possible. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [trini: Fix building crc16.o for SPL/TPL] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-08lib: merge CRC16-CCITT into u-boot/crc.hPhilipp Tomsich
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32 and CRC32-C already have their prototypes in a single header file, it seems a good idea to also include CRC16-CCITT in the same. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-08arm: mvebu: helios4: Reset uSOM onboard phy during board initAditya Prayoga
Similar to Clearfog rev 2.1, GPIO 19 also used to reset onboard ethernet PHY. This patch depend on net: mvneta: Add GPIO configuration support [URL: https://patchwork.ozlabs.org/patch/1007736/] Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08arm: mvebu: helios4: Enable SPI flash supportAditya Prayoga
Enable SPI flash support under U-Boot and SPL. The ENV size and offset, ported from U-Boot 2013.01 Marvell version: 2015_T1.0p16 To create U-Boot image for SPI flash, user would need to replace * CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC with CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI * CONFIG_ENV_IS_IN_MMC with CONFIG_ENV_IS_IN_SPI_FLASH Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08arm: mvebu: helios4: Reduce U-Boot image sizeAditya Prayoga
Remove unused I2C support in SPL and use simple_malloc functions to reduce SPL image size. Since Helios4 does not have any PCIe allocated on SerDes, remove PCI support. MTD layer on top of SPI flash is not needed, remove it also. Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08arm: mvebu: helios4: Enable mvebu GPIOAditya Prayoga
Make use of U-Boot's GPIO DM to control native GPIO and I2C IO expander. Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08arm: mvebu: helios4: Enable I2C and IO ExpanderAditya Prayoga
Enable Marvell I2C driver and I2C IO expander. Set default bus to external I2C bus. Define I2C aliases in device tree so it can be recognized by the driver. Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08arm: mvebu: helios4: mmc: move environment before 1MAditya Prayoga
Store the environment before 1M into the block device. This constant is easier to remember, saves a little space, and is in line with what SolidRun's 2018.01-based fork does for the clearfog. Signed-off-by: Josua Mayer <josua.mayer97@gmail.com> [ Aditya Prayoga: * Port forward] Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02Chris Packham
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to release armada-18.09.2"). The complete log of changes is best obtained from the mv-ddr-marvell.git repository but some relevant highlights are: ddr3: add missing txsdll parameter ddr3: fix tfaw timimg parameter ddr3: fix trrd timimg parameter merge ddr3 topology header file with mv_ddr_topology one mv_ddr: a38x: fix zero memory size scrubbing issue The upstream code is incorporated omitting the portions not relevant to Armada-38x and DDR3. After that a semi-automated step is used to drop unused features with unifdef find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \ xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \ -UCONFIG_APN806 -UCONFIG_MC_STATIC \ -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \ -UA70X0 Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-07Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- Various axp209 fixes - Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
2018-12-07Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogicTom Rini
Two fixes for the Amlogic Pinctrl driver : - bad usage of clrsetbits_le32 - bad pin definition for AXG Family
2018-12-07sunxi: update README.sunxi64Andre Przywara
Now that the Allwinner port in the official mainline ARM Trusted Firmware repository has reached feature parity with the "legacy" ATF port, let's use the opportunity to update the Allwinner 64-bit build instructions. This changes: - Update ATF build instructions to use the mainline repo. - Add quick command lines for TL;DR people. - Mention Allwinner H6 build target. - Mention pre-built FEL binaries. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-07arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2-eMMCPriit Laes
The lime2 features a too large capacitor on the LDO3 output, which causes the PMIC to shutdown when enabling power. To be able to still boot up however, we must gradually enable power on LDO3 for this board. We do this by enabling both the inrush quirk and the maximum slope the AXP209 supports. Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2Olliver Schinagl
The lime2 features a too large capacitor on the LDO3 output, which causes the PMIC to shutdown when enabling power. To be able to still boot up however, we must gradually enable power on LDO3 for this board. We do this by enabling both the inrush quirk and the maximum slope the AXP209 supports. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07power: axp209: Limit inrush current for broken boardsOlliver Schinagl
Some boards feature a capacitance on LDO3's output that is too large, causing inrush currents which as a result, shut down the AXP209. This has been reported before, without knowing the actual cause. A fix appeared to be done with commit 0e6e34ac8dbb ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators"). The description there is a bit misleading, the kernel does not hang during AXP209 initialization, the PMIC shuts down, causing voltages to drop and thus the whole system freezes. While the AXP209 does have the ability to ramp up the voltage slowly, to reduce these inrush currents, the voltage rate control (VRC) however is not applicable when switching on the LDO3 output. Only when going from an enabled lower voltage setting, to a higher voltage setting is the VRC in effect. To work around this problem, we set LDO3 to the lowest possible setting of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do its thing. It should be noted, that for some undocumented reason, there is a short delay needed between setting the LDO3 voltage register and enabling the power. One would expect that this delay ought to be just after enabling the output power at 0.7 V, but this did not work. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07power: axp209: Add support for voltage rate control on LDO3Olliver Schinagl
The AXP209 LDO3 regulator supports voltage rate control, or can set a slew rate. This allows for the power to gradually rise up to the desired voltage, instead of spiking up as fast as possible. Reason to have this can be to reduce the inrush currents for example. There are 3 slopes to choose from, the default, 'none' is a voltage rise of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise. In ideal world (where vendors follow the recommended design guidelines) this setting should not be enabled by default. Unless of course AXP209 crashes instead of reporting overcurrent condition as it normally should do in this case. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07power: axp209: Reduce magic values by adding defines for LDO[234]Olliver Schinagl
The AXP209 has a few 'magisc-ish' values that are better served with clear defines. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07power: axp209: Define the chip version maskOlliver Schinagl
Use a define for the chip version mask on the axp209. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07power: axp209: Use BIT() macroOlliver Schinagl
Use the standard BIT() macro for bitfield definitions in headers. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07sunxi: pmic_bus: Decrease boot time by not writing duplicate dataOlliver Schinagl
When we clear a pmic_bus bit, we do a read-modify-write operation. We waste some time however, by writing back the exact samea value that was already set in the chip. Let us thus only do the write in case data was changed. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07sunxi: board: Print error after power initialization failsOlliver Schinagl
Currently during init, we enable all power, then enable the dram and after that check whether there was an error during power-up. This makes little sense, we should enable power and then check if power was brought up properly before we continue to initialize other things. This patch moves the DRAM init after the power failure check. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07Merge branch '2018-12-06-master-imports'Tom Rini
- Various FAT fixes - Hardware spinlock uclass - DMA uclass - Various am335x fixes - DT resyncs for a number of TI platforms - stm32 updates
2018-12-07arm: socfpga: imply SPL options instead of selectSimon Goldschmidt
For a small SPL, it should be possible to build without SPI(-flash) drivers or wihout MMC drivers. For this to work, we have to change from 'select'ing options to 'imply'ing them. With this change, I can have SPL trimmed to my hard-wired starting method (SPI-NOR or MMC) while still including all drivers in U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-12-07board: ti: am57xx: remove USB platform codeJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07board: ti: dra7-evm: remove USB platform codeJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07configs: am57xx_evm: Enable DM_USB and DM_USB_DEVJean-Jacques Hiblot
Enable DM_USB and DM_USB_DEV for AM57xx based boards. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07configs: enable DM_USB and DM_USB_DEV for all DRA7 platformsJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07dts: dra7x: make ocp2scp@4a080000 compatible with simple-busJean-Jacques Hiblot
This is required when DM_USB is used, to bind the USB phys. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07board; ti: am57xx: turn on USB clocksVignesh R
Enable USB clocks in late init stage to support ports under DM_USB. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07board: ti: dra7xx-evm: turn on USB clocks in late init stageJean-Jacques Hiblot
For USB ports that use the Driver Model, turn on the clocks during the late init stage. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07dwc3-generic: Add support for the TI DWC3 glueJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07phy: Add a new driver for OMAP's USB2 PHYsJean-Jacques Hiblot
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07phy: ti-pip3-phy: Add support for USB3 PHYVignesh R
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is needed to move AM57xx to DM_USB. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07syscon: dm: Add a new method to get a regmap from DTSJean-Jacques Hiblot
syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon device from a reference in the DTS. It operates similarly to the linux version of the namesake function. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07usb: dwc3: Fix a compilation error with the edison defconfigJean-Jacques Hiblot
The error is: In file included from include/part.h:10:0, from include/usb.h:18, from include/linux/usb/gadget.h:22, from drivers/usb/dwc3/ep0.c:20: include/ide.h:62:14: error: unknown type name ‘uchar’ void ide_led(uchar led, uchar status); Fixing it by including common.h that defines the uchar type. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07dwc3-generic: Add select_dr_mode operationJean-Jacques Hiblot
The select_dr_mode operation is executed when the glue driver is probed. The role of this optional function is to configure the operating mode of the controller at the glue level. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07dwc3-generic: Handle the PHYs, the clocks and the reset linesJean-Jacques Hiblot
This make the driver more generic. At this point this driver can replace the dwc3-of-simple implementation. Make the description in the Kconfig more generic too. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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