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2020-07-29include/configs: ns3: add env variables for Linux bootBharat Gooty
Add env variables and commands for booting Linux. Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29board: ns3: limit U-boot relocation within 16MB memoryBharat Kumar Reddy Gooty
By default relocation happens to a higher address of DDR, i.e, DDR start + DDR size. U-Boot shall be used to collect the ramdump. Restrict U-Boot to use only the 16MB memory, so that this memory can be reserved. Limit relocation to happen within 16MB memory, start 0xFF00_0000 and end 0x1_0000_0000 Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29board: ns3: define ddr memory layoutRayagonda Kokatanur
Add both DRAM banks memory information and the corresponding MMU page table mappings. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29dt-bindings: memory: ns3: add ddr memory definitionRayagonda Kokatanur
Add ddr memory definitions. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29configs: ns3: enable GIC_V3 ITSRayagonda Kokatanur
Enables the Generic Interrupt Controller (GIC) V3 Interrupt Translation Service (ITS) Locality-specific Peripheral Interrupts (LPI) configuration table and LPI table. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29board: ns3: program GIC LPI tablesRayagonda Kokatanur
U-boot programs the GIC LPI configuration tables and enables the LPI table. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29board: ns3: default reset type to L3Rayagonda Kokatanur
Default "reset" from U-Boot to L3 reset. "reset" command with argument will trigger L1 reset. Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29board: ns3: add api to save boot parameters passed from BL31Abhishek Shah
Add API to save boot parameters passed from BL31 Use assembly implementation of save_boot_params instead of c function. Because generally ATF does not set up SP_EL2 on exiting. Thus, usage of a C function immediately after exiting with no stack setup done by ATF explicitly, may cause SP_EL2 to be not sane, which in turn causes a crash if this boot was not lucky to get an SP_EL2 in valid range. Replace C implementation with assembly one which does not use stack this early, and let u-boot to set up its stack later. Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com> Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29dt-bindings: memory: ns3: add memory definitionsRayagonda Kokatanur
Add NS3 memory definitions. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29configs: ns3: enable clock subsystemRayagonda Kokatanur
Enable clock subsystem for ns3. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29arm: cpu: armv8: add L3 memory flush supportRayagonda Kokatanur
Add L3 memory flush support for NS3. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29board: ns3: add support for Broadcom Northstar 3Rayagonda Kokatanur
Add support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29Merge branch '2020-07-28-misc-soc-improvements'Tom Rini
- Assorted MediaTek improvements - s5p4418 support - QEMU ARM platform improvements - Qualcomm IPQ40xx support
2020-07-29board: mediatek: Add support for UniElec U7623 boardDavid Woodhouse
This is an MT7623A-based board, very similar to the Banana Pi R2. http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2020-07-29board: mediatek: Use CONFIG_DEFAULT_FDT_FILE for default environmentDavid Woodhouse
Rather than hard-coding it to the Banana Pi R2. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2020-07-29board: mediatek: fix mmc_get_boot_dev() for platforms without external SDDavid Woodhouse
On the UniElec U7623 board there is no external SD slot and the preloader doesn't fill in the magic field at 0x81dffff0 to indicate that it was booted from eMMC. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2020-07-29arm: add (default) config for nanopi2 boardStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - Configuration changed, mainly several "CONFIG_..." moved from s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig and USB related configs removed because USB is not supported yet. - s5p4418_nanopi2.h: "CONFIG_" removed from several s5p4418/nanopi2 specific defines because the appropriate values do not need to be configurable. - pinctrl is supported now, therefore "CONFIG_PINCTRL=y" added to s5p4418_nanopi2_defconfig. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29arm: add support for SoC s5p4418 (cpu) / nanopi2 boardStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/. Appropriate line in Makefile removed. - cpu.c: '#include <cpu_func.h>' added. - arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required anylonger. - "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used instead of drivers/pwm/pwm-nexell.c. - s5p4418.dtsi: '#include "../../../include/generated/autoconf.h"' removed, is not necessary, error at out-of-tree building. '#ifdef CONFIG_CPU_NXP4330'-blocks (2x) removed. Some minor changes regarding mmc. 'u-boot,dm-pre-reloc' added to dp0 because of added DM_VIDEO support. - board/s5p4418/ renamed to board/friendlyarm/ - All s5p4418-boards except nanopi2 removed because there is no possibility to test the other boards. - Kconfig: Changes to have a structure like mach-bcm283x (RaspberryPi), e.g. "config ..." entries moved from/to other Kconfig. - "CONFIG_" removed from several s5p4418/nanopi2 specific defines because the appropriate values do not need to be configurable. - nanopi2/board.c: All getenv(), getenv_ulong(), setenv() and saveenv() renamed to env_get(), env_get_ulong(), env_set() and env_save(), respectively. MACH_TYPE_S5P4418 is not defined anymore, therefore appropriate code removed (not necessary for DT-kernels). - nanopi2/onewire.c: All crc8() renamed to crc8_ow() because crc8() is already defined in lib/crc8.c (with different parameters). - dts: "nexell,s5pxx18-i2c" used instead of "i2c-gpio", i2c0 and i2c1 added. gmac-, ehci- and dwc2otg-entries removed because the appropriate functionality is not supported yet. New mmc-property "mmcboost" added. s5p4418-pinctrl.dtsi: gmac-entries removed, mmc- and i2c-entries added. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29video: add nexell video driver (display/video driver)Stefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - nexell_display.c: Changed to DM, CONFIG_FB_ADDR can not be used anymore because framebuffer is allocated by video_reserve() in video-uclass.c. Therefore code changed appropriately. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). - livetree API (dev_read_...) is used instead of fdt one (fdt...). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29video: add nexell video driver (soc: dpc, makefile)Stefan Bosch
Low level functions for DPC (Display Controller) and Makefile for all nexell video low level functions. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29video: add nexell video driver (soc: lvds, hdmi)Stefan Bosch
Low level functions for LVDS and HDMI display interfaces. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29video: add nexell video driver (soc: mlc, mipi)Stefan Bosch
Low level functions for MLC (Multi Layer Control) and MIPI (Mobile Industry Processor Interface). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29video: add nexell video driver (soc: displaytop)Stefan Bosch
Low level functions for DisplayTop (Display Topology). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29pwm: add driver for nexellStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - Since drivers/pwm/pwm-nexell.c is an adapted version of s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c is used instead. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile changed appropriately. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29pinctrl: add nexell driverStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - livetree API (dev_read_...) is used instead of fdt one (fdt...). - doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29mmc: add nexell driverStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - driver changed to DM. - pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins in the mmc-driver. - nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values are used now (where possible) and the appropriate if-blocks have been removed. - new dt-property "mmcboost" is used now instead of "CONFIG_BOOST_MMC" which was not defined anywhere. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29i2c: add nexell driverStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - i2c/nx_i2c.c: Some adaptions mainly because of changes in "struct udevice". - several Bugfixes in nx_i2c.c. - the driver has been for s5p6818 only. Code extended appropriately in order s5p4418 is also working. - "probe_chip" added. - pinctrl-driver/dt is used instead of configuring the i2c I/O-pins in the i2c-driver. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). - livetree API (dev_read_...) is used instead of fdt one (fdt...). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29gpio: add nexell driverStefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - livetree API (dev_read_...) is used instead of fdt one (fdt...). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29arm: add mach-nexell (all files except header files)Stefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - SPL not supported yet --> no spl-directory in arch/arm/mach-nexell. Appropriate line in Makefile removed. - clock.c: 'section(".data")' added to declaration of clk_periphs[] and core_hz. - Kconfig: Changes to have a structure like in mach-bcm283x/Kconfig, e.g. "config ..." entries moved from other Kconfig. - timer.c: 'section(".data")' added to declaration of timestamp and lastdec. - arch/arm/mach-nexell/serial.c removed because this is for the UARTs of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are different, here the (existing) PL011-code is used. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29arm: add mach-nexell (header files)Stefan Bosch
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - DM_VIDEO support (display_dev.h). - boot0.h added, handles NSIH --> tools/nexell obsolete. - gpio.h: Include-path to errno.h changed. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29arm: qemu: override flash accessors to use virtualizable instructionsArd Biesheuvel
Some instructions in the ARM ISA have multiple output registers, such as ldrd/ldp (load pair), where two registers are loaded from memory, but also ldr with indexing, where the memory base register is incremented as well when the value is loaded to the destination register. MMIO emulation under KVM is based on using the architecturally defined syndrome information that is provided when an exception is taken to the hypervisor. This syndrome information describes whether the instruction that triggered the exception is a load or a store, what the faulting address was, and which register was the destination register. This syndrome information can only describe one destination register, and when the trapping instruction is one with multiple outputs, KVM throws an error like kvm [615929]: Data abort outside memslots with no valid syndrome info on the host and kills the QEMU process with the following error: U-Boot 2020.07-rc3-00208-g88bd5b179360-dirty (Jun 06 2020 - 11:59:22 +0200) DRAM: 1 GiB Flash: error: kvm run failed Function not implemented R00=00000001 R01=00000040 R02=7ee0ce20 R03=00000000 R04=7ffd9eec R05=00000004 R06=7ffda3f8 R07=00000055 R08=7ffd9eec R09=7ef0ded0 R10=7ee0ce20 R11=00000000 R12=00000004 R13=7ee0cdf8 R14=00000000 R15=7ff72d08 PSR=200001d3 --C- A svc32 QEMU: Terminated This means that, in order to run U-Boot in QEMU under KVM, we need to avoid such instructions when accessing emulated devices. For the flash in particular, which is a hybrid between a ROM (backed by a read-only KVM memslot) when in array mode, and an emulated MMIO device (when in write mode), we need to take care to only use instructions that KVM can deal with when they trap. So override the flash read accessors that are used when running on QEMU under KVM. Note that the the 64-bit wide read and write accessors have been omitted: they are never used when running under QEMU given that it does not emulate CFI flash that supports it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29arm: qemu: disable the EFI workaround for older GRUBArd Biesheuvel
The QEMU/mach-virt targeted port of u-boot currently only runs on QEMU under TCG emulation, which does not model the caches at all, and so no users can exist that are relying on the GRUB hack for EFI boot. We will shortly enable support for running under KVM, but the GRUB hack (which disables all caches without doing cache cleaning by VA during ExitBootServices()) is likely to cause more problems than it solves, given that KVM hosts require correct maintenance if they incorporate non-architected system caches. So let's disable the GRUB hack by default on the QEMU/mach-virt port. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-29arm: qemu: implement enable_caches()Ard Biesheuvel
Add an override for enable_caches to enable the I and D caches, along with the cached 1:1 mapping of all of DRAM. This is needed for running U-Boot under virtualization with QEMU/kvm. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29arm: qemu: enable LPAE on 32-bitArd Biesheuvel
QEMU's mach-virt machine only supports selecting CPU models that implement the virtualization extensions, and are therefore guaranteed to support LPAE as well. Initially, QEMU would not allow emulating these CPUs running in HYP mode (or EL2, for AArch64), but today, it also contains a complete implementation of the virtualization extensions themselves. This means we could be running U-Boot in HYP mode, in which case the LPAE long descriptor page table format is the only format that is supported. If we are not running in HYP mode, we can use either. So let's enable CONFIG_ARMV7_LPAE for qemu_arm_defconfig so that we get the best support for running with the MMU and caches enabled at any privilege level. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-29arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGHArd Biesheuvel
The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently defined as no-allocate for both reads and writes, which deviates from the non-LPAE definition, and mostly defeats the purpose of enabling the caches in the first place. So align LPAE with !LPAE, and enable allocate-on-read for both. And while at it, add some clarification about the meaning of the chosen values. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29msm_gpio: Add support for Qualcomm IPQ40xxRobert Marko
Snapdragon SoCs and IPQ40xx use common TLMM IP, so existing driver supports IPQ40xx as well. So lets simply add a compatible for IPQ40xx. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-07-29msm_serial: Read bit rate register value from DTRobert Marko
IPQ40xx and currently supported Snapdragon boards don't use the same one so enable reading it from DT, if no DT property is found default value is the same as the previous define. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-07-29arm: Add support for Qualcomm IPQ40xx familyRobert Marko
This introduces initial support for the popular Qualcomm IPQ40x8 and IPQ40x9 WiSoC series. IPQ40xx series have 4x Cortex A7 ARM-v7A cores. Supported are: IPQ4018, IPQ4019, IPQ4028 and IPQ4029. IPQ40x8 and IPQ40x9 use the same cores, but differ in addressable RAM size (1GB for IPQ40x9 and 256MB for IPQ40x8) and supported peripherals (IPQ40x8 lacks RGMII, LCD controller and EMMC/SDHCI controllers). IQP4028/IPQ4029 models differ from IPQ4018/IPQ4019 only by their rated temperatures rates with IPQ402X models being rated for wider temperature ranges. Initially this supports: * Simple clock driver (Only for UART1 now, will be extended) * Pinctrl driver (Supports UARTX and GPIO now, will be extended) * GPIOs already supported by msm_gpio driver with updates * UARTs already supported by serial_msm driver with updates Further peripherals will come in later patches. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-07-29pinctrl: mediatek: add PUPD/R0/R1 support for MT7623David Woodhouse
The pins for the MMC controller weren't being set up correctly because the pinctrl driver only sets the GPIO pullup/pulldown config and doesn't handle the special cases with PUPD/R0/R1 control. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-28arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629MarkLee
This patch enable sgmii mode and mt7531 switch support in mt7629 ethernet dts node Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-07-28eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driverMarkLee
The sgmii mode init flow is almost the same for all mediatek SoC, the only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028 in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629 and the following chips). Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-07-28dm: remove superfluous comment for union ofnode_unionHeinrich Schuchardt
"future live tree" does not make sense anymore as we have CONFIG_OF_LIVE. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-28test: dm: add a test for class buttonPhilippe Reynes
Add a test to confirm that we can read button state using the button-gpio driver. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28test/py: add tests for the button commandsPhilippe Reynes
Adds tests for the button commands. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28sandbox: enable buttonPhilippe Reynes
Enable the support of button (driver and command) on sandbox. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28sandbox64: enable buttonPhilippe Reynes
Enable the support of button (driver and command) on sandbox64. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28sandbox: dtsi: add buttonsPhilippe Reynes
Adds two buttons on sandbox so button framework may be tested. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28cmd: button: add a new 'button' commandPhilippe Reynes
Adds a command 'button' that provides the list of buttons supported by the board, and the state of a button. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28dm: button: add a driver for button driven by gpioPhilippe Reynes
Add a simple driver which allows use of buttons attached to GPIOs. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-28dm: button: add an uclass for buttonPhilippe Reynes
Add a new uclass for button that implements two functions: - button_get_by_label - button_get_status Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
generated by cgit (git 2.34.1) at 2024-12-24 00:31:57 +0000