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2020-07-09arm: Remove cm_t35 boardJagan Teki
DM, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove cm_t54 boardJagan Teki
DM, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09siemens: rut: Enable DM_SPI, DM_SPI_FLASHJagan Teki
Enable DM_SPI, DM_SPI_FLASH for siemens rut board. Build is fine, but not tested. Cc: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09siemens: pxm2: Enable DM_SPI, DM_SPI_FLASHJagan Teki
Enable DM_SPI, DM_SPI_FLASH for siemens pxm2 board. Build is fine, but not tested. Cc: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09siemens: thuban: Enable DM_SPI, DM_SPI_FLASHJagan Teki
Enable DM_SPI, DM_SPI_FLASH for siemens thuban board. Build is fine, but not tested. Cc: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09siemens: rastaban: Enable DM_SPI, DM_SPI_FLASHJagan Teki
Enable DM_SPI, DM_SPI_FLASH for siemens rastaban board. Build is fine, but not tested. Cc: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09siemens: etamin: Enable DM_SPI, DM_SPI_FLASHJagan Teki
Enable DM_SPI, DM_SPI_FLASH for siemens etamin board. Build is fine, but not tested. Cc: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09siemens: draco: Enable DM_SPI, DM_SPI_FLASHJagan Teki
Enable DM_SPI, DM_SPI_FLASH for siemens draco board. Build is fine, but not tested. Cc: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09am335x: igep003x: Enable DM_SPIJagan Teki
Enable DM_SPI for am355x igep003x board. Build is fine, but not tested. Cc: Javier Martínez Canillas <javier@dowhile0.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09Merge tag 'for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2cTom Rini
i2c changes for v2020.10 - Add support for I2C controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. - Add I2C controller support for Cortina Access CAxxxx SoCs - new rtc methods, rtc command, and tests - imx_lpi2c: Improve the codes to use private data - stm32f7_i2c.c: Add new compatible "st,stm32mp15-i2c" - stm32f7_i2c.c: Add Fast Mode Plus support - pwm: Add PWM driver for SiFive SoC
2020-07-09Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Armada 38x DDR3 fixes, enhancements (Chris) - Armada 38x UTMI PHY SerDes fix (Chris) - Helios4 update - sync with clearfog (Dennis) - LaCie Kirkwood board rework - enable DM (Simon) - net/mvpp2 memory init fix (Sven)
2020-07-09net: mvpp2: fix second cp110 initializationSven Auhagen
Since the mdio code got upstreamed it is not possible to activate network ports on CP110 Master and Slave. The problem is in mvpp2_base_probe which is called for each CP110 and it initializes the buffer area for descs and rx_buffers. This should only happen once though and the bd space is actually set to 0 after the first run of the function. This leads to an error when the second CP110 tries the initialization again and disables all network ports on this CP110. This patch adds a static variable to check if the buffer area is initialized only once globally. Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09arm: kirkwood: enable DM_ETH for LaCie boardSimon Guinot
This patch enables DM_ETH for the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09arm: kirkwood: enable DM_USB for LaCie boardSimon Guinot
This patch enables DM_USB and USB_STORAGE for the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09arm: kirkwood: switch LaCie boards to sata_mv driverSimon Guinot
This patch switches the SATA driver from mvsata_ide to sata_mv for the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09arm: kirkwood: convert LaCie boards to DM_SPI_FLASHSimon Guinot
This patch converts the following Kirkwood-based LaCie boards to DM, DM_SPI and DM_SPI_FLASH: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: kirkwood: add DT spi0 alias to LaCie boardsSimon Guinot
The spi0 alias is needed by the environment code to retrieve the SPI flash. This patch adds some -u-boot.dtsi files, providing the spi0 aliases, for all the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Note that this -u-boot.dtsi files will be removed as soon as the spi0 aliases will be available in the upstream Linux dtsi files. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: mvebu: helios4: sync helios4 config to clearfog and dts to kernelDennis Gilmore
The helios4 is built on the same microsom as the clearfog, by syncing the config we enable the same featureset that exists in the som on the helios4. The current config does not boot as some of the clearfog changes needed to be made on the helios4 also, generally speaking most changes for the clearfog should also be made on the helios4. Signed-off-by: Dennis Gilmore <dennis@ausil.us> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09arm: mvebu: a38x: Adjust UTMI PHY parametersChris Packham
When running USB compliance tests on our Armada-385 hardware platforms we have seen some eye mask violations. Marvell's internal documentation says: Based on silicon test results, it is recommended to change the impedance calibration threshold setting to 0x6 prior to calibration. Port changes from Marvell's u-boot fork[1] to address this. [1] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/a6221551 Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09arm: mvebu: a38x: Fix typoChris Packham
Fix spelling of Alignment. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09mv_ddr: ddr3: Update {min,max}_read_sample calculationChris Packham
Measurements on actual hardware shown that the read ODT is early by 3 clocks. Adjust the calculation to avoid this. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> [upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22] Signed-off-by: Chris Packham <judge.packham@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09mv_ddr: ddr3: Use correct bitmask for read sample delayChris Packham
In the Armada 385 functional spec (MV-S109094-00 Rev. C) the read sample delay fields are 5 bits wide. Use the correct bitmask of 0x1f when extracting the value. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> [upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22] Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09pwm: Add PWM driver for SiFive SoCYash Shah
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC This driver is simple port of Linux pwm sifive driver from Linux v5.6 commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM") Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09pwm: Add DT documentation for SiFive PWM ControllerYash Shah
DT documentation for PWM controller added from Linux v5.6 commit: daa78cc3408e ("pwm: sifive: Add DT documentation for SiFive PWM Controller") Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09i2c: stm32f7: SYSCFG Fast Mode Plus support for I2C STM32F7Patrick Delaunay
Read SYSCFG bindings to set Fast Mode Plus bits if Fast Mode Plus speed is selected. Handle the stm32mp15 specific compatible to handle FastMode+ registers handling which is different on the stm32mp15 compared to the stm32f7 or stm32h7. Indeed, on the stm32mp15, the FastMode+ set and clear registers are separated while on the other platforms (F7 or H7) the control is done in a unique register. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09i2c: stm32f7: add stm32mp15 compatiblePatrick Delaunay
Add a new compatible "st,stm32mp15-i2c" introduced in Linux kernel v5.8 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09test: dm: rtc: add tests of rtc shell commandRasmus Villemoes
Add tests of the "list", "read" and "write" subcommands of the rtc shell command. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09sandbox: add rtc command to defconfigsRasmus Villemoes
In order to allow adding unit tests of the rtc command, add it to the various sandbox defconfigs. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09test: dm: rtc: add test of dm_rtc_read, dm_rtc_writeRasmus Villemoes
Define a few aux registers and check that they can be read/written individually. Also check that one can access the time-keeping registers directly and get the expected results. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: i2c_rtc_emul: catch any write to the "reset" registerRasmus Villemoes
It's more natural that any write that happens to touch the reset register should cause a reset, rather than just a write that starts at that offset. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: sandbox-rtc: fix set methodRasmus Villemoes
The current set method is broken; a simple test case is to first set the date to something in April, then change the date to 31st May: => date 040412122020.34 Date: 2020-04-04 (Saturday) Time: 12:12:34 => date 053112122020.34 Date: 2020-05-01 (Friday) Time: 12:12:34 or via the amending of the existing rtc_set_get test case similarly: $ ./u-boot -T -v => ut dm rtc_set_get Test: dm_test_rtc_set_get: rtc.c expected: 31/08/2004 18:18:00 actual: 01/08/2004 18:18:00 The problem is that after each register write, sandbox_i2c_rtc_complete_write() gets called and sets the internal time from the current set of registers. However, when we get to writing 31 to mday, the registers are in an inconsistent state (mon is still 4), so the mktime machinery ends up translating April 31st to May 1st. Upon the next register write, the registers are populated by sandbox_i2c_rtc_prepare_read(), so the 31 we just wrote to mday gets overwritten by a 1. Fix it by writing all registers at once, and for consistency, update the get method to retrieve them all with one "i2c transfer". Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: add rtc commandRasmus Villemoes
Mostly as an aid for debugging RTC drivers, provide a command that can be used to read/write arbitrary registers (assuming the driver provides the read/write methods or their single-register-at-a-time variants). Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: pcf2127: provide ->write methodRasmus Villemoes
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: pcf2127: provide ->read methodRasmus Villemoes
This simply consists of renaming the existing pcf2127_read_reg() helper to follow the naming of the other methods (i.e. pcf2127_rtc_<method name>) and changing the type of its "len" parameter. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: fall back to ->{read, write} if ->{read, write}8 are not providedRasmus Villemoes
Similar to how the dm_rtc_{read,write} functions fall back to using the {read,write}8 methods, do the opposite in the rtc_{read,write}8 functions. This way, each driver only needs to provide either ->read8 or ->read to make both rtc_read8() and dm_rtc_read() work - without this, a driver that provides ->read() would most likely just duplicate the logic here for implementing a ->read8() method in term of its ->read() method. The same remarks of course apply to the write case. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: add dm_rtc_write() helperRasmus Villemoes
Similar to dm_rtc_read(), introduce a helper that allows the caller to write multiple consecutive 8-bit registers with one call. If the driver provides the ->write method, use that, otherwise loop using ->write8. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09rtc: add dm_rtc_read helper and ->read methodRasmus Villemoes
Some users may want to read multiple consecutive 8-bit registers. Instead of each caller having to implement the loop, provide a dm_rtc_read() helper. Also, allow a driver to provide a ->read method, which can be more efficient than reading one register at a time. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09i2c: imx_lpi2c: Improve the codes to use private dataYe Li
Current driver calls the devfdt_get_addr to get the base address of lpi2c controller in each sub-functions. Since the devfdt_get_addr accesses the DTB and translate the address, it introduces much overhead. Improve the codes to use private variable which has recorded the base address from probe. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-09board: presidio-asic: Add I2C supportAlex Nemirovsky
Add I2C board support for Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09i2c: i2c-cortina: added CAxxxx I2C supportArthur Li
Add I2C controller support for Cortina Access CAxxxx SoCs Signed-off-by: Arthur Li <arthur.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> hs: fixed build error, add include log.h
2020-07-09i2c: octeon_i2c: Add I2C controller driver for OcteonSuneel Garapati
Add support for I2C controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-07-08Merge branch '2020-07-08-misc-features-and-fixes'Tom Rini
- mem cmd improvements - TPM fixes - SPL/NAND/FIT fixes - RSA improvements
2020-07-08lib: rsa: function to verify a signature against a hashHeiko Stuebner
rsa_verify() expects a memory region and wants to do the hashing itself, but there may be cases where the hashing is done via other means, like hashing a squashfs rootfs. So add rsa_verify_hash() to allow verifiying a signature against an existing hash. As this entails the same verification routines we can just move the relevant code over from rsa_verify() and also call rsa_verify_hash() from there. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2020-07-08cmd: Add a memory-search commandSimon Glass
It is useful to be able to find hex values and strings in a memory range. Add a command to support this. cmd: Fix 'md' and add a memory-search command At present 'md.q' is broken. This series provides a fix for this. It also implements a new memory-search command called 'ms'. It allows searching memory for hex and string data. END Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08command: Drop #ifdef for MEM_SUPPORT_64BIT_DATASimon Glass
This is defined only when __lp64__ is defined. That means that ulong is 64 bits long. Therefore we don't need to use a separate u64 type on those architectures. Fix up the code to take advantage of that, removing the preprocessor conditions. Also include the header file that defines MEM_SUPPORT_64BIT_DATA. It is included by env.h in this file, but that might not last forever. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08display_options: Drop #ifdef for MEM_SUPPORT_64BIT_DATASimon Glass
This is defined only when __lp64__ is defined. That means that ulong is 64 bits long. Therefore we don't need to use a separate u64 type on those architectures. Fix up the code to take advantage of that, removing the preprocessor conditions. Also include the missing header file that defines MEM_SUPPORT_64BIT_DATA Fixes: 09140113108 ("command: Remove the cmd_tbl_t typedef") Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08cmd: mem: Drop #ifdef for MEM_SUPPORT_64BIT_DATASimon Glass
This is defined only when __lp64__ is defined. That means that ulong is 64 bits long. Therefore we don't need to use a separate u64 type on those architectures. Fix up the code to take advantage of that, removing the preprocessor conditions. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08cmd: mem: Use a macro to avoid #ifdef in helpSimon Glass
It is a bit painful to have #ifdefs in the middle of the help for each command. Add a macro to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08Update MEM_SUPPORT_64BIT_DATA to be always definedSimon Glass
Define this macro always so we don't need the preprocessor to check it. Convert the users to #if instead of #ifdef. Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the macro is not define. It just assumes zero. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08spl: fit: improve spl_nand_fit_read(...) readabilityDario Binacchi
Replacing the ret variable with err and handling first the error condition about the value returned by the spl_nand_fit_read routine, improves the code readability. Furthermore, the 'else' int the 'else return ret' instruction was useless. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it>
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