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In the current H6 CPU memory space code, the SUNXI in the macro name of
the SID address base is wrongly spelled as SNUXI, which leads to SID
readout not working.
Fix this macro name.
Fixes: 55f6b1c351c9 ("sunxi: add basic memory map definitions of H6 SoC")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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A20 OLinuXino Micro eMMC board has emmc with mmc2 slot
so use proper dts, sun7i-a20-olinuxino-micro-emmc.dts
Cc: Stefan Mavrodiev <stefan@olimex.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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"default" lines in Kconfig are processed in order, the first hit will
stop considering subsequent lines. In the case of the DRAM_ODT_EN symbol
that means that everything following the first two lines will never be
checked:
------------
config DRAM_ODT_EN
bool "sunxi dram odt enable"
default n if !MACH_SUN8I_A23
default y if MACH_SUN8I_A23
default y if MACH_SUN8I_R40
default y if MACH_SUN50I
------------
Assuming that the "default y" for the A64 and the R40 were a deliberate
choice, fix the Kconfig stanza to take this into account.
Also remove the now redundant lines from the respective defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: droped 'default n' on original change]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # A64, R40
Tested-by: Chen-Yu Tsai <wens@csie.org> # A23
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Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
R40:
commit c36fd5a48bd20820855e3e91a89297eeaa31836e
Author: Chen-Yu Tsai <wens@csie.org>
Date: Wed May 2 00:12:25 2018 +0800
ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
V40:
commit c5f0bb472795170ab5c33be12e29ce7465fb31ed
Author: Icenowy Zheng <icenowy@aosc.io>
Date: Fri Apr 6 22:03:44 2018 +0800
ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M2-Ultra, BPI-M2-Berry
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Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date: Fri May 4 21:05:44 2018 +0200
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
Note: bananapi-m3 and cubietruck-plus board dts files has
usb_otg enabled in U-Boot which were not present in Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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sourcing of sub directiory kconfig files are not in
proper order, so keep them in ascending order.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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Add an initial MAINTAINERS file based on author of the code.
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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A recent rename of the function did not rename the test file. Fix this.
Fixes: 12308b128fa (lib: fdtdec: Rename routine fdtdec_setup_memory_size())
Signed-off-by: Simon Glass <sjg@chromium.org>
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The enhanced pylibfdt support in U-Boot needed for binman was a
placeholder while upstreaming of this work continued. This is now
complete, so bring in the changes and update the tools as needed.
There are quite a few changes since we decided to split the
implementation into three fdt classes instead of two.
The Fdt.del_node() method was unfortunately missed in this process and
will be dealt with later. It exists in U-Boot but not upstream.
Further syncing of libfdt probably needs to wait until we assess the
code-size impact of all the new checking code on SPL and possibly provide
a way to disable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Currently we don't have a complete list of capability and extended
capability ids. This adds them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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In the Sandbox test configuration, PCI bus#0 only has static devices
while bus#1 only has dynamic devices. Create a bus#2 that has both
types of devices and test such.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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With struct pci_device_id, it's possible to pass a driver data for
bound driver to use. This adds a test case for this functionality.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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At present we have two PCI buses in the test configuration. Both
buses have static device-tree config devices. Now we switch the
2nd bus to use dynamic PCI devices for testing.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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With the newly added test cases for PCI configuration access, we get:
=> ut dm pci_busdev
Test: dm_test_pci_busdev: pci.c
test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
Expected 4660, got 65535
Test: dm_test_pci_busdev: pci.c (flat tree)
test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
Expected 4660, got 65535
Failures: 2
The bug only shows up when bus number is not equal to zero. This is
caused by the plain find_devfn parameter is passed to function call
pci_bus_find_devfn(), inside which find_devfn is compared to devfn
in the device's pplat structure. However pplat->devfn does not carry
the bus number. Fix this by passing find_devfn with bus number masked.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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So far we missed the testing for PCI configuration space access.
This adds tests for it, as well as removing some redundant asserts.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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So far there is only one PCI host controller in the sandbox test
configuration. This is normally the case for x86, but it can be
common on other architectures like ARM/PPC to have more than one
PCI host controller in the system.
This updates the case to cover such scenario.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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With the newly added testing of more than one device, we get:
=> ut dm pci_swapcase
Test: dm_test_pci_swapcase: pci.c
test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
Expected "tHIS IS A tESt", got "this is a test"
Test: dm_test_pci_swapcase: pci.c (flat tree)
test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
Expected "tHIS IS A tESt", got "this is a test"
Failures: 2
The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.
It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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It's quite common to have more than one device on the same PCI bus.
This updates the test case to test such scenario.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The check on uclass_get_device() and device_active() is unnecessary
as the follow-up test operations will implicitly probe the driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The flag to control whether to scan multi-function device during
enumeration should be cleared at the beginning of each iteration
if the device's function number equals to zero.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Currently only devfn is extracted in child_post_bind(). Now that
we have the live-tree version API to look up PCI vendor and device
id from the compatible string, let's extract and save them too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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We don't have the live-tree version of fdtdec_get_pci_vendev().
This adds the API.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Correct typos in the comment block of uclass_first/next_device_check().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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These macros should not be put in the generic pci.h header file.
Since they are not referenced anywhere, remove them completely.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This add the initial support of the broadcom reference
board bcm968380gerg with a bcm68380 SoC.
This board has 512 MB of RAM, 128 MB of flash (nand),
2 USB port, 1 UART, 4 ethernet ports and BCM43217 (wifi).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This adds an option to force the size of the ram, and
avoid the detection of ram size.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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The only platform left for the AU1x00 SoCs was the pb1x00 platform, an
apparent clone of the dbau1x00 platform. As pb1x00 had no listed
maintainer I am assuming that it is also orphaned. Remove this platform
and then remove the unused SoC support.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This platform has been marked as orphan since June of 2016 and should
have been removed some time ago. Do so now.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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Xilinx fixes for v2018.09-rc2
xilinx:
- Add support for zybo z7 and ultra96
- Tune zynq and zynqmp mini configurations
- Move SYS_MALLOC_LEN to Kconfig
fdt
- make static funcs
gpio:
- Fix soft gpio driver
- Fix Zynq gpio driver by using platdata
microblaze:
- Fix Kconfig entry
spi
- Move ISSI to Kconfig
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Add a flash node to fix the detection of the memory IC.
With the changes introduced with commit 8fee8845e754
("enf_sf: reuse setup_flash_device instead of open coding it")
the SPI speed is now read from device-tree or a default value
is applied. This replaced the old behavior of setting the
SPI speed to CONFIG_ENV_SPI_MAX_HZ.
As this board didn't have a flash node, the default value
was applied to the SPI speed, producing an error when probing
the flash memory (speed too slow).
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for reading label property from DT and set up bank name
based on that. If label property is not present full device node name is
used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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.set_value functions have no specified return value and gpio_uclass is
not working with it too. But this patch is returning 0 to be in sync
with others DM gpio drivers.
Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Reading registers for finding out output value is not working because
input value is read instead in case of tristate.
Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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These functions are only called in this file that's why make them static
to keep static analysers happy.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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There is no reason to do read/write for if/else separately.
Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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