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2007-05-05Make "file" command happy with some config.mk files; update CHANGELOGWolfgang Denk
2007-05-05Merge with /home/wd/git/u-boot/custodian/u-boot-nand-flashWolfgang Denk
2007-05-05Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk
2007-05-05Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-05-05ppc4xx: Detect if the sysclk on Sequoia is 33 or 33.333 MHzJeffrey Mann
The AMCC Secquoia board has been changed in a new revision from using a 33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD indicates the difference. This patch reads that bit and uses the correct clock speed for the board. This code is backward compatable will all prior boards. All prior boards will be read as 33.000. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-05ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND bootingStefan Roese
Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big for the 4k NAND boot image so define bus_frequency to 133MHz here which is save for the refresh counter setup. Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-05Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-05-05NAND: Wrong calculation of page number in nand_block_bad()Thomas Knobloch
In case that there is no memory based bad block table available the function nand_block_checkbad() in drivers/mtd/nand/nand_base.c will call nand_block_bad() directly. When parameter 'getchip' is set to zero, nand_block_bad() will not right shift the offset to calculate the correct page number. Signed-off-by: Thomas Knobloch <knobloch@siemens.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-04Fix initrd length corruption in bootm command.Wolfgang Denk
When using FDT Images, the length of an inital ramdisk was overwritten (bug introduced by commit 87a449c8, 22 Aug 2006). Patches by Timur Tabi & Johns Daniel. Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-03mpc83xx: fix trivial error in MAKEALLKim Phillips
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-03Update board configuration for STX GP3SSA board:Wolfgang Denk
Enable hush shell, environment in flash rather in EEPROM, more user-friendly default environment, etc. The simple EEPROM environment can be selected easily in the board config file. Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-03Cleanup STX GP3SSA code; fix build and compile problems.Wolfgang Denk
2007-05-03Add support for STX GP3SSA (stxssa) BoardDan Malek
Signed-off-by Dan Malek, <dan@embeddedalley.com>
2007-05-02Cleaned up some 85xx PCI bugsAndy Fleming
* Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02Add support for the 8568 MDS boardAndy Fleming
This included some changes to common files: * Add 8568 processor SVR to various places * Add support for setting the qe bus-frequency value in the dts * Add the 8568MDS target to the Makefile Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02Add support for treating unknown PHYs as generic PHYs.David Updegraff
When bringing up u-boot on new boards, PHY support sometimes gets neglected. Most PHYs don't really need any special support, though. By adding a generic entry that always matches if nothing else does, we can provide support for "unsupported" PHYs for the tsec. The generic PHY driver supports most PHYs, including gigabit. Signed-off-by: David Updegraff <dave@cray.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-01Conditionalize 8641 Rev1.0 MCM workaroundsJames Yang
Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-05-01Fix memory initialization on MPC8349E-mITXTimur Tabi
Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-01mpc83xx: replace elaborate boottime verbosity with 'clocks' commandKim Phillips
and fix CPU: to align with Board: display text. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-01Rewrote picos_to_clk() to avoid rounding errors.James Yang
Clarified that conversion is to DRAM clocks rather than platform clocks. Made function static to spd_sdram.c. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-29Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-04-29Merge with /home/stefan/git/u-boot/u-boot-ppc4xxStefan Roese
2007-04-29ppc4xx: Bamboo: Use current NAND driver and *not* the legacy driverStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-04-25mpc83xx: minor fixups for 8313rdb introductionKim Phillips
2007-04-24[PATCH] MTD partition support, JFFS2 supportMichal Simek
2007-04-24ppc4xx: setup 440EPx/GRx ZMII/RGMII bridge depending on PFC register content.Matthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-04-23Reworked 85xx speed detection codeAndy Fleming
Changed the code to read the registers and calculate the clock rates, rather than using a "switch" statement. Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Enable 8544 supportAndy Fleming
* Add support to the Makefile * Add 8544 configuration support to the tsec driver * Add 8544 SVR numbers to processor.h Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-23Support 1G size on 8548Andy Fleming
e500v2 and newer cores support 1G page sizes. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Changed BOOKE_PAGESZ_nGB to BOOKE_PAGESZ_nGAndy Fleming
The other pagesz constants use one letter to specify order of magnitude. Also change the one reference to it in mpc8548cds/init.S Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Only set ddrioovcr for 8548 rev1.Andy Fleming
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Tweak DDR ECC error counterAndy Fleming
Enable single-bit error counter when memory was cleared by ddr controller. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-2385xx: write MAC address to mac-address and local-mac-addressTimur Tabi
Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, ftp_cpu_setup() should write the MAC address to mac-address and local-mac-address, if they exist. Signed-off-by: Timur Tabi <timur@freescale.com>
2007-04-23Some 85xx cpu cleanupsAndy Fleming
* Cleaned up the TSR[WIS] clearing * Cleaned up DMA initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-04-23Add cpu support for the 8544Andy Fleming
Recognize new SVR values, and add a few register definitions Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-04-23Add MPC8544DS basic port board files.Jon Loeliger
Add board port under new board/freescale directory structure and reuse existing PIXIS FPGA support there. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-23Add MPC8544DS main configuration file.Jon Loeliger
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-23Fix PCI I/O space mapping on Freescale MPC85x0ADSSergei Shtylyov
The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the #define's describing the local address window used for the PCI I/O space accesses -- fix this and carry over the necessary changes into the MPC8560ADS code since the PCI I/O space mapping was also broken for this board (by the earlier commit 087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying how the PCI I/O space must be mapped to all the MPC85xx board config. headers. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> board/mpc8540ads/init.S | 4 ++-- board/mpc8560ads/init.S | 4 ++-- include/configs/MPC8540ADS.h | 5 ++--- include/configs/MPC8541CDS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8560ADS.h | 8 ++++---- 6 files changed, 12 insertions(+), 13 deletions(-)
2007-04-23u-boot: Fix e500 v2 core reset bugZang Roy-r61911
The following patch fixes the e500 v2 core reset bug. For e500 v2 core, a new reset control register is added to reset the processor. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23u-boot: v2: Remove the fixed TLB and LAW entrynubmerZang Roy-r61911
Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW entry number to control the loop. This can reduce the potential risk for the 85xx processor increasing its TLB adn LAW entry number. Signed-off-by: Swarthout Edward <swarthout@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23u-boot: Fix the 85xxcds tsec bugZang Roy-r61911
Fix the 85xxcds tsec bug. When enable PCI, tsec.o should be added to u-boot.lds to make tsec work. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23u-boot: Fix CPU2 errata on MPC8548CDS boardZang Roy-r61911
This patch apply workaround of CPU2 errata on MPC8548CDS board. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
2007-04-23u-boot: Disables MPC8548CDS 2T_TIMING for DDR by defaultebony.zhu@freescale.com
This patch disables MPC8548CDS 2T_TIMING for DDR by default. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
2007-04-23u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS boardZang Roy-r61911
Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23mpc83xx: Add MPC8313ERDB support.Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23mpc83xx: Add generic PCI setup code.Scott Wood
Board code can now request the generic setup code rather than having to copy-and-paste it for themselves. Boards should be converted to use this once they're tested with it. Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23mpc83xx: Add 831x support to speed.c.Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23mpc83xx: Add 831x support to global_data.hScott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().Scott Wood
Rather than misleadingly define PVR_83xx as the specific type of 83xx being built for, the PVR of each core revision is defined. checkcpu() now prints the core that it detects, rather than aborting if it doesn't find what it thinks it wants. Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23mpc83xx: Recognize SPR values for MPC8311 and MPC8313.Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com>
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