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2016-01-28tpm: tpm_tis_lpc: fix typoChristophe Ricard
TPM_TIS_LPC is connected to the LPC bus, not I2C. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
2016-01-28tpm: Fix fault in case CONFIG_DM_TPM is set without any TPMChristophe Ricard
In case CONFIG_DM_TPM was set without any TPM chipset configured a fault was generated (NULL pointer access). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
2016-01-28Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2016-01-28net: Add bootfile in DHCP RequestAlexandre Messier
Add the bootfile name in the DHCP Request packet, in addition to it already being sent in the DHCP Discover. This is needed by some DHCP servers so that the bootfile name is properly returned by the server to the client in the DHCP Ack, as expected by U-Boot. Signed-off-by: Alexandre Messier <amessier@tycoint.com>
2016-01-28Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini
2016-01-28net: phy: implements probe for Cortina phyShaohui Xie
Cortina phy cannot support soft reset, this commit implements probe for Cortina PHY to tell phylib to skip phy soft reset by setting PHY_FLAG_BROKEN_RESET in flags. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: introduce a quirk PHY_FLAG_BROKEN_RESETShaohui Xie
Current driver always performs a phy soft reset when connecting the phy device, but soft reset is not always supported by a phy device, so introduce a quirk PHY_FLAG_BROKEN_RESET to let such a phy device to skip soft reset. This commit uses 'flags' of phy device structure to store the quirk. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: micrel: fix divisor value for KSZ9031 phy skewDinh Nguyen
The picoseconds to register value divisor(ps_to_regval) should be 60 and not 200. Linux has KSZ9031_PS_TO_REG defined to be 60 as well. 60 is the correct divisor because the 4-bit skew values are defined from 0x0000(-420ps) to 0xffff(480ps), increments of 60. For example, a DTS skew value of 420, represents 0ps delay, which should be 0x7. With the previous divisor of 200, it would result in 0x2, which represents a -300ps delay. With this patch, ethernet on the SoCFPGA DE0 Atlas is now able to work with 1Gb ethernet. References: http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf -> page 26 Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: micrel: add documentation for Micrel KSZ90x1 bindingDinh Nguyen
Add the DTS documentation for the Micrel KSZ90x1 binding. The original document was from: [commit 4b405efbe12de28b26289282b431323d73992381 from the Linux kernel] This takes the original document and adds a clarification on how the skew values are represented in the code. References: Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014. http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014. http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: Use 'autoneg' flag from phydevAlexandre Messier
Use the 'autoneg' flag available in phydev when checking if autoneg is in use. The previous implementation was checking directly in the PHY if autoneg was supported. Some PHYs will report that autoneg is supported, even when it is disabled. Thus it is not possible to use that bit to determine if autoneg is currently in use or not. Signed-off-by: Alexandre Messier <amessier@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: Set ANRESTART in setup_forcedAlexandre Messier
When configuring a PHY in fixed (forced) link mode, in order for the changes to be applied, either one of these conditions must be triggered: 1- PHY is reset 2- Autoneg is restarted 3- PHY transitions from power-down to power-up Neither of these is currently done, so effectively the fixed link configuration is not applied in the PHY. Fix this by setting the Autoneg restart bit. Signed-off-by: Alexandre Messier <amessier@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: micrel: Disable B_CAST on configAlexandre Messier
Micrel PHYs KSZ8021/31 and KSZ8081 have a feature where MDIO address 0 is considered as a broadcast address; the PHY will respond even if it is not its configured (pinstrapped) address. This feature is enabled by default. The Linux kernel disables that feature at initialisation, but not before it probes the MDIO bus. This causes an issue, because a PHY at address 3 will be discovered at addresses 0 and 3, but will then only respond at address 3. Because Linux attaches the first PHY it discovers on 'eth0', it will attach the PHY from address 0, which will never answer again. Fix the issue by disabling the broadcast feature in U-Boot, before Linux is started. Signed-off-by: Alexandre Messier <amessier@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: Rename eth.c to eth_lecacy.cSimon Glass
Rename this file to make it clear it is for the old networking drivers and not for use with driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: Move driver-model code into its own fileSimon Glass
Every other uclass is in its own file. Create a new eth-uclass.c file and move the driver-model code into it, so that networking is consistent. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: Move remaining common functions to eth_common.cSimon Glass
Move eth_current_changed(), eth_set_current(), eth_mac_skip() and eth_get_name() into the common file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: Move environment functions to the common fileSimon Glass
Move the functions which set ethernet environment variables to the common file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: Move common init into a new eth_common.c fileSimon Glass
Only half of the init is actually common. Move that part into a new common file and call it from driver-model and legacy code. More common functions will be added in future patches. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: Don't call board/cpu_eth_init() with driver modelSimon Glass
We should avoid weak functions with driver model. Existing boards that use driver model don't need them, so let's kill them off. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28tegra: Report errors from PCI initSimon Glass
This function can fail, so be sure to report any errors that occur. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net/designware: add support of max-speed device tree propertyAlexey Brodkin
This property allows to specify fastest connection mode supported by the MAC (as opposed to features of the phy). There are situations when phy may handle faster modes than the MAC (or even it's particular implementation or even due to CPU being too slow). This property is a standard one in Linux kernel these days and some boards do already use it in their device tree descriptions. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sonic Zhang <sonic.zhang@analog.com> cc: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net/designware: do explicit port selection for 1Gb modeAlexey Brodkin
Current implementation only sets "port select" bit for non-1Gb mode. That works fine if GMAC has just exited reset state but we may as well change connection mode in runtime. Then we'll need to reprogram GMAC for that new mode of operation and if previous mode was 10 or 100 Mb and new one is 1 Gb we'll need to reset port mode bit. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sonic Zhang <sonic.zhang@analog.com> cc: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28include/net.h: add max_speed member in struct eth_pdataAlexey Brodkin
This will be used for getting max speed mode of Ethernet interface that a particular MAC supports from Device Tree blob and later being used for phy configuration. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28drivers/net/phy: introduce phy_set_supported()Alexey Brodkin
This new function will allow MAC drivers to override supported capabilities of the phy. It is required when MAC cannot handle all speeds supported by phy. For example phy supports up-to 1Gb connections while MAC may only work in modes up to 100 or even 10 Mbit/sec. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: breakdown PHY_*_FEATURES definesFlorian Fainelli
Breakdown the PHY_*_FEATURES into per speed defines such that we can easily re-use them individually. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: genphy: Allow overwriting featuresSascha Hauer
of_set_phy_supported allows overwiting hardware capabilities of a phy with values from the devicetree. This does not work with the genphy driver though because the genphys config_init function will overwrite all values adjusted by of_set_phy_supported. Fix this by initialising the genphy features in the phy_driver struct and in config_init just limit the features to the ones the hardware can actually support. The resulting features are a subset of the devicetree specified features and the hardware features. This is a copy of the patch from Linux kernel, see http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c242a47238fa2a6a54af8a16e62b54e6e031d4bc Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: ensure Gigabit features are masked off if requestedFlorian Fainelli
When a Gigabit PHY device is connected to a 10/100Mbits capable Ethernet MAC, the driver will restrict the phydev->supported modes to mask off Gigabit. If the Gigabit PHY comes out of reset with the Gigabit features set by default in MII_CTRL1000, it will keep advertising these feature, so by the time we call genphy_config_advert(), the condition on phydev->supported having the Gigabit features on is false, and we do not update MII_CTRL1000 with updated values, and we keep advertising Gigabit features, eventually configuring the PHY for Gigabit whilst the Ethernet MAC does not support that. This patches fixes the problem by ensuring that the Gigabit feature bits are always cleared in MII_CTRL1000, if the PHY happens to be a Gigabit PHY, and then, if Gigabit features are supported, setting those and updating MII_CTRL1000 accordingly. This is a copy of patch from Linux kernel, see http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=5273e3a5ca94fbeb8e07d31203069220d5e682aa Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()Bin Meng
eth_get_dev_by_index() is an API which is not available in driver model. Use eth_get_dev_by_name() instead, which can also simplifly the code logic a little bit. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: Use priv->tbiaddr to initialize TBI PHY addressBin Meng
Add a new member 'tbiaddr' to tsec_private struct. For non-DM driver, it is initialized as CONFIG_SYS_TBIPA_VALUE, but for DM driver, we can get this from device tree. Update the bindings doc as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: Add driver model ethernet supportBin Meng
This adds driver model support to Freescale TSEC ethernet driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28doc: dt-bindings: Describe Freescale TSEC ethernet controllerBin Meng
Adapted from the same file name in the kernel device tree bindings documentation, to use with U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: Use tsec_private pointer as the parameter for internal routinesBin Meng
For internal routines like redundant_init(), startup_tsec() and init_phy(), change to use tsec_private pointer as the parameter. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: Adjust orders to avoid forward declaration of tsec_send()Bin Meng
Adjust static functions in a proper order so that forward declaration of tsec_send() can be avoided. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: Move rxbd and txbd to struct tsec_privateBin Meng
rxbd and txbd are declared static with 8 byte alignment requirement, but they can be put into struct tsec_private as well and are natually aligned to 8 byte. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: Move rx_idx and tx_idx to struct tsec_privateBin Meng
At present rx_idx and tx_idx are declared as static variables in the driver codes. To support multiple interfaces, move it to struct tsec_private. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: tsec: fsl_mdio: Fix several cosmetic issuesBin Meng
Clean up the tsec and fsl_mdio driver codes a little bit, by: - Fix misuse of tab and space here and there - Use correct multi-line comment format - Replace license identifier to GPL-2.0+ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENETBin Meng
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENETBin Meng
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENETBin Meng
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENETBin Meng
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENETBin Meng
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENETBin Meng
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: bootp: Ignore packets whose yiaddr is 0Peng Fan
When doing `dhcp`, there is a bad dhcp server in my network which always reply dhcp request with yiaddr 0, which cause uboot can not successfully get ipaddr from the good dhcp server. But the Linux PC can get the ip address even if there is a bad dhcp server. This patch is to fix that even if there is a bad dhcp server, uboot can still get ipaddr and tftp work ok. The way is to ignore the packets from the bad dhcp server by filtering out the yiaddr whose value is 0. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Wolfgang Denk <wd@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28drivers: net: vsc9953: Add LAG supportCodrin Ciubotariu
You can now configure LAG on VSC9953's ports using the command: ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>} A port must belong to a single LAG. By default, a port belongs to a LAG equal to the port's number. For each frame, a hash will be calculated based on Source/Destination MAC addresses, Source/Destination IP(v4/v6) addresses, Source/Destination ports. This hash will be used to select a single egress port from LAG. This also assures that frames from the same flow will always have the same egress port. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28common: cmd_ethsw: Spelling fixesCodrin Ciubotariu
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28doc: t1040-l2switch: Update READMECodrin Ciubotariu
The driver for VSC9953 L2 switch IP supports many features and the documentation needs to be updated. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28drivers: net: vsc9953: Fix FDB aging timeCodrin Ciubotariu
By default, the aging period is set to 0, so the dynamic FDB entries are never removed. This patch sets the aging time to 300 seconds. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28drivers: net: vsc9953: Fix number of reserved registersCodrin Ciubotariu
There are only 21 registers reserved between ana_ana and ana_pgid register groups. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28net: phy: do not read configuration register on resetStefan Agner
When doing a software reset, the reset flag should be written without other bits set. Writing the current state will lead to restoring the state of the PHY (e.g. Powerdown), which is not what is expected from a software reset. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Michael Welling <mwelling@ieee.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28ARM: tegra: rm Jetson TK1 PMIC GPIO programmingStephen Warren
The PMIC is configured such that its GPIOs have the correct configuration at power-up, so no programming is required. In fact, the current programming is actively wrong, since: (a) the AS3722 driver configures the GPIO to be an output before setting its output value, which causes a 0v glitch on the output. (b) the AS3722 driver configures the GPIO to drive a high voltage from its VSUP_GPIO power source rather than its VDD_GPIO_LV power source, so the pin drives 5V not 1.8V as desired. Solve these problems by removing the code which configures the PMIC GPIOs. Note that this patch was tested directly on top of v2016.01; since then, commit 96350f729c42 "dm: tegra: net: Convert tegra boards to driver model for Ethernet" prevents PCIe from being initialized. Alternatively, simply revert that commit to get PCIe Ethernet working again, then apply this patch to test. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-01-28Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini