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2018-01-28rockchip: clk: guard set_parent implementations against OF_PLATDATAPhilipp Tomsich
The set_parent implementations do not make sense when OF_PLATDATA is enabled. We guard these against OF_PLATDATA and don't populate the set_parent-op when this is the case. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28clk: rockchip: clk_rk3368: Implement "assign-clock-parent"David Wu
Implement the setting parent for gmac clock, and add internal pll div set for mac clk. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and ↵David Wu
"assign-clock-rate" The RK3288 CRU-node assigns rates to a number of clocks that are not implemented in the RK3288 clock-driver (but which have been sufficiently initialised from rkclk_init()): for these clocks, we implement the gmac clock set parent, but simply ignore the others' set_rate() operation and return 0 to signal success. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28ARM: dts: rk3288: Remove unused LCDC clock assignedDavid Wu
The LCDC assigned rate is 0, it will make boot error, error log:"pll_para_config: the frequency can not be 0 Hz". Remove them, and the lcdc driver will do the correct clock rate setting. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28config: evb-rk3229: Enable rk gmac configsDavid Wu
Add gmac config support for rk3229 evb. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28net: gmac_rockchip: Add support for the RK3228 GMACDavid Wu
The GMAC in the RK3228 once again is identical to the incarnation in the RK3288 and the RK3399, except for where some of the configuration and control registers are located in the GRF. This adds the RK3368-specific logic necessary to reuse this driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28clk: rockchip: Add rk322x gamc clock supportDavid Wu
Assuming mac_clk is fed by an external clock, set clk_rmii_src clock select control register from IO for rgmii interface. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: Add rk322x gmac pinctrl supportDavid Wu
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength, clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evbDavid Wu
Add rk3328-evb gmac support. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: dts: rk3328: Add gmac2io supportDavid Wu
Add basic dts configuration for rk3328 gmac2io. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: configs: Enable GMAC configs for evb-rk3328David Wu
Enable GMAC configs for evb-rk3328 Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28net: gmac_rockchip: Add rk3328 gmac supportDavid Wu
The GMAC2IO in the RK3328 once again is identical to the incarnation in the RK3288 and the RK3399, except for where some of the configuration and control registers are located in the GRF. This adds the RK3328-specific logic necessary to reuse this driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28clk: rockchip: Add rk3328 gamc clock supportDavid Wu
The rk3328 soc has two gmac controllers, one is gmac2io, the other is gmac2phy. We use the gmac2io rgmii interface for 1000M phy here. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: Add rk3328 gmac pinctrl supportDavid Wu
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2 and bit10 at com iomux register. After that, set rgmii m1 tx pins to 12ma drive-strength, and clean others to 2ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driverDavid Wu
Clean the iomux definitions at grf_rk3328.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28net: gmac_rockchip: Add support for the RV1108 GMACDavid Wu
The rv1108 GMAC only support rmii interface, so need to add the set_rmii() ops. Use the phy current interface to set rmii or rgmii ops. At the same time, need to set the mac clock rate of rmii with 50M, the clock rate of rgmii with 125M. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driverDavid Wu
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h, and move them into pinctrl-driver. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: grf_rv1108.h: Fix the grf offsetsDavid Wu
The last 4 grf registers offset of rv1108 are wrong, fix them for correct usage. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evbDavid Wu
If the Ethernet address is not set, the network can't work, enable the random address config for default use. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission qualityDavid Wu
Give the mac controller the correct tx-delay and rx-delay value for the rgmii mode transmission. If they are not matched, there would be Ethernet packets lost, the net feature may not work. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-nodePhilipp Tomsich
The RK3399 CRU-node assigns rates to a number of clocks that are not implemented in the RK3399 clock-driver (but which have been sufficiently initialised from rkclk_init()): for these clocks, we simply ignore the set_rate() operation and return 0 to signal success. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
2018-01-28clk: implement clk_set_defaults()Philipp Tomsich
Linux uses the properties 'assigned-clocks', 'assigned-clock-parents' and 'assigned-clock-rates' to configure the clock subsystem for use with various peripheral nodes. This implements clk_set_defaults() and hooks it up with the general device probibin in drivers/core/device.c: when a new device is probed, clk_set_defaults() will be called for it and will process the properties mentioned above. Note that this functionality is designed to fail gracefully (i.e. if a clock-driver does not implement set_parent(), we simply accept this and ignore the error) as not to break existing board-support. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address. Series-version: 2 Cover-letter: clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC), the parent-clock needs to be set via the DTS. This adds the required plumbing and implements the GMAC case for the RK3399. END
2018-01-28rockchip: clk: rk3399: implement set_parent() operationPhilipp Tomsich
This implements the (newly added) set_parent() operation for the RK3399 with a focus on allowing the RGMII clock parent to be configured via the assigned-clock-parents property of the GMAC node. This implementation supports only the GMAC (in fact only the RGMII clock parent) and allows to set this clock's parent either to the internal SCLK_GMAC or to an external clock input (identifiable by it providing a 'clock-output-name' of "gmac_clkin"). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
2018-01-28clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()Philipp Tomsich
The logic in clk_get_by_index() may be useful for other properties than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents' follows the same model. This commit refactors clk_get_by_index() by introducing an internal function clk_get_by_indexed_prop() that allows to specify the name of the property to process. The original clk_get_by_index() call is simply directed through this helper function with the property name fixed to "clocks". Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
2018-01-28clk: add clk_set_parent()Philipp Tomsich
Clocks may support multiple parents: this change introduces an optional operation on the clk-uclass to set a clock's parent. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: David Wu <david.wu@rock-chips.com> Series-changes: 2 - Fixed David's email address.
2018-01-28clk: clk_stm32f: Fix PLLSAICFGR_PLLSAIP_4 divider valuePatrice Chotard
PLLSAIP divider uses 2 bits (bits 16 and 17) into RCC_PLLSAICFGR register, available combination are : 00: PLLSAIP = 2 01: PLLSAIP = 4 10: PLLSAIP = 6 11: PLLSAIP = 8 Previously, the divider value was incorrectly set to 6. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28ARM: AM43XX: Call hw_data_init() again after relocation to update *ctrlFaiz Abbas
hw_data_init() is called before relocation to initialise hardware data. Since ctrl is initialized to OMAP_SRAM_SCRATCH_SYS_CTRL in arch/arm/mach-omap2/am33xx/hw_data.c, the pointer *ctrl will not be updated during relocation and will hold a stale value. Therefore call hw_data_init() again after relocation to reinitialize *ctrl. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-28configs: Replace CONFIG_ISW_ENTRY_ADDR with CONFIG_SYS_TEXT_BASEFaiz Abbas
Since 7e0ed13 ("Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to Kconfig"), a default SYS_TEXT_BASE was set for all ARCH_OMAP2PLUS devices. CONFIG_ISW_ENTRY_ADDR is used to set SYS_TEXT_BASE in qspi boot. Simplify this by directly assigning SYS_TEXT_BASE in the defconfig. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-28tools: remove unused retJelle van der Waa
Remove unused ret from fw_env_flush. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()Patrice Chotard
Move SYSCFG clock setup into configure_clocks() instead of calling clock_setup() from board file. As this clock is only needed in case of ethernet enabled and as both stm32f4 and stm32f7 are using the Designware ethernet IP, we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed. Move the RMII setup from board_early_init_f() to board_init() to insure that RMII bit is set only when clock driver is initialized. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28clk: clk_stm32f: Remove STMMAC clock setupPatrice Chotard
Thanks to 'commit ba1f96672522 ("net: designware: add clock support")' we don't need anymore to setup the STMMAC clock in board. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-28ARM: dts: stm32: Add STMMAC clocks for stm32f746Patrice Chotard
Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-28atomic-long: Fix warnings on arm64Bradley Bolen
Several inline functions in this file reference undefined functions in U-Boot. For example: atomic-long.h:73:9: warning: implicit declaration of function 'atomic64_sub_and_test' atomic-long.h:80:9: warning: implicit declaration of function 'atomic64_dec_and_test' atomic-long.h:87:9: warning: implicit declaration of function 'atomic64_inc_and_test' Handle this the same as the 32 bit build by wrapping these functions in a __UBOOT__ check. Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
2018-01-28ARM: dts: stm32: add stm32429-eval-u-boot dts filePatrice Chotard
_ Add gpio compatible and aliases for stm32f469 _ Add FMC sdram node _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl, pwrcfg and gpio nodes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28ARM: dts: stm32: Add STM32F429 Evaluation board supportPatrice Chotard
This DT file comes from kernel v4.15, this board offers : _ STM32F429NIH6 microcontroller _ 4.3” color TFT LCD with resistive touchscreen (480 x 272 pixels) _ Six 5 V power supply options: Power jack ST-LINK/V2 USB connector User USB HS connector User USB FS1 connector User USB FS2 connector Daughterboard _ SAI Audio DAC, stereo audio jack which supports headset with microphone _ Stereo digital microphone, audio terminal connector used to connect external speakers _ 2 GBytes (or more) SDIO interface MicroSD card _ RF EEPROM on I2 C compatible serial interface _ RS-232 communication _ IrDA transceiver _ JTAG/SWD and ETM trace debug support, ST-LINK/V2 embedded _ IEEE-802.3-2002 compliant Ethernet connector _ Camera module _ 8M x 32-bit SDRAM, 1M x 16-bit SRAM and 8M x 16-bit NOR Flash _ Joystick with 4-directional control and selector _ Reset, Wakeup and Tamper buttons _ 4 color user LEDs _ Extension connectors & memory connectors for daughterboard or wrapping board _ USB OTG HS and FS with Micro-AB connectors _ RTC with backup battery _ CAN2.0A/B compliant connection _ Potentiometer _ Motor control connector Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28board: stm32: Add stm32f429-evaluation board supportPatrice Chotard
Add stm32f429-evaluation board support. For more information, please visit: http://www.st.com/en/evaluation-tools/stm32429i-eval.html Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28configs: stm32f: Remove STM32_HSE_HZ for all STM32F seriesPatrice Chotard
As clk_stm32f driver is able to retrieve HSE frequency from DT, CONFIG_STM32_HSE_HZ becomes useless. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28clk: stm32: retrieve external oscillator frequency from DTPatrice Chotard
All current STM32F4 supported boards uses a 8MHz external oscillator. All current STM32F7 supported boards uses a 25MHz external oscillator. In order to introduce the new stm32f429-evaluation board which uses a 25MHz external oscillator without creating a dedicated struct stm32_clk_info for this board, retrieve the external oscillator frequency from DT and set pll_m accordingly to obtain 1MHz for the VCO. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28ARM: dts: stm32: add "u-boot, dm-pre-reloc" for clk_hse in stm32f7-u-bootPatrice Chotard
In order to retrieve the clk_hse fixed clock phandle in clk_stm32f driver, add "u-boot,dm-pre-reloc" property in Uboot specific DT file. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28arm: bootm-fdt.c: fix compiler warningHeiko Schocher
compiling U-Boot with bosch_mpcxxxxd_sd_defconfig drops warning: arch/arm/lib/bootm-fdt.c: In function ‘arch_fixup_fdt’: arch/arm/lib/bootm-fdt.c:37:6: warning: unused variable ‘ret’ [-Wunused-variable] int ret = 0; ^~~ Fix it. Signed-off-by: Heiko Schocher <hs@denx.de>
2018-01-28arm: mach-omap2: Pass args to secure ROM in SRAM in SPLAndrew F. Davis
When in early SPL we make some secure ROM calls that can effect DRAM, due to this it is more stable to store the args for these calls in SRAM, but uninitialized and zero'd globals are placed in BSS, located in DRAM. Force our args into the data section which is in SRAM during SPL. Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-01-28common: board_r: Fix style violationsMario Six
Fix some style violations in the board_r file. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28common: board_f: Fix style violationsMario Six
Fix some style violations in the board_f file. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28serial: ns16550: Fix style violationMario Six
Clarify the computation precedence in two ternary operator constructions. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28include: dm: Fix 'devioe'/'devuce' typosMario Six
There are some typos in the documentation of some functions in read.h; fix those. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28gpio: mpc8xxx: Make live-tree compatibleMario Six
Make the MPC8xxx GPIO driver compatible with a live device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28gpio: mpc8xxx: Make compatible with more SoCsMario Six
Finally, make the mpc8xxx driver capable of handling more GPIO devices; this entails adding a special case for the MPC5121 SoC, and adding a set of new compatible strings. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28gpio: mpc8xxx: Rename Kconfig option, structures, and functionsMario Six
Rename the Kconfig option, structures (and their members), as well as functions of the mpc85xx driver to include mpc8xxx to reflect the more generic usage. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28gpio: mpc85xx: Rename driver file to mpc8xxxMario Six
In preparation to making the MPC85xx GPIO driver useable for a broader range of SoCs, rename the driver file. Signed-off-by: Mario Six <mario.six@gdsys.cc>
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