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2017-07-28dm: tegra: mmc: Convert to livetreeSimon Glass
Update the tegra mmc driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: pwm: Convert to livetreeSimon Glass
Update the tegra pwm driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: i2c: Convert to livetreeSimon Glass
Update the tegra i2c driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: spi: Convert to livetreeSimon Glass
Update the tegra114 spi driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: usb: Convert to livetreeSimon Glass
Update the Tegra EHCI driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: gpio: Convert to support livetreeSimon Glass
Update the GPIO driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28tegra: dts: Move stdout-path to /chosenSimon Glass
This property should be in the /chosen node, not /aliases. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: video: tegra124: Convert to livetreeSimon Glass
Update these drives to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: Convert clock_decode_periph_id() to support livetreeSimon Glass
Adjust this to take a device as a parameter instead of a node. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: tegra: Convert USB setup to livetreeSimon Glass
Adjust this code to support a live device tree. This should be implemented as a PHY driver but that is left as an exercise for the maintainer. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28tegra: tegra124: Add a PMC syscon driverSimon Glass
The PMC can be modelled as a syscon peripheral. Add a driver for this so that it can be accessed by drivers when needed. Enable it for tegra124 boards. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28tegra: spl: Enable debug UARTSimon Glass
Enable the debug UART in SPL to allow early serial output even if the standard UART does not work (e.g. due to driver model problem). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: core: Fix up ofnode_get_addr_index() for 64-bit valuesSimon Glass
At present this function only supports 32-bit (single-cell) values. Update it to support two-cell values also. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28dm: core: Add ofnode_read_resource()Simon Glass
We sometimes need to read a resource from an arbitrary node. In any case for consistency we should not put the live-tree switching code in a dev_read_...() function. Update this to suit. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28console: simplify puts()Masahiro Yamada
Current puts() and putc() have similar #ifdef / if() conditionals. Make puts() iterate over putc() to avoid code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-28sandbox: remove os_putc() and os_puts()Masahiro Yamada
They are unused since commit d8c6fb8cedbc ("sandbox: Drop special case console code for sandbox"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-07-28dm: ofnode: change return type of dev_read_prop() to opaque pointerMasahiro Yamada
DT property values can be strings as well as integers. This is why of_get_property/fdt_getprop returns an opaque pointer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-07-28dm: Fix typo in include-guard for dm-structs.hPhilipp Tomsich
The include-guard for dm-structs.h was misspelled as __DT_STTUCTS. Change it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-28cmd: scsi: Fix null pointer dereference in 'scsi reset'Bin Meng
During 'scsi reset', scsi_bus_reset() is called with udevice pointed to NULL, which causes exception. As a temporary fix, disable the call for DM SCSI for now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-28dm: ahci: Avoid scsi_scan_dev() in ahci_probe_scsi()Bin Meng
Running 'scsi scan' command causes scsi_scan_dev() to be called, from which device_probe() is called and consequently AHCI driver probe routine will be called as SCSI driver's parent, and finally ahci_probe_scsi() calls scsi_scan_dev() again. Remove the call to scsi_scan_dev() in ahci_probe_scsi(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-28efi_loader: Add an EFI_CALL() macroRob Clark
Rather than open-coding EFI_EXIT() + callback + EFI_ENTRY(), introduce an EFI_CALL() macro. This makes callbacks into UEFI world (of which there will be more in the future) more concise and easier to locate in the code. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2017-07-28efi_loader: only evaluate EFI_EXIT()'s ret onceRob Clark
There are a couple spots doing things like: return EFI_EXIT(some_fxn(...)); which I handn't noticed before. With addition of printing return value in the EFI_EXIT() macro, now the fxn call was getting evaluated twice. Which we didn't really want. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2017-07-28efi_loader: add some missing breaksRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2017-07-27rockchip: puma-rk3399: remove duplicate code (merge artifact)Kever Yang
A few lines (defines and declarations) had been duplicated when the puma-rk3399 board was initially merged. This removes the duplicates and changes the style to use local constants instead of pasted literals. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [fixed up commit-message & converted to use 'const u32':] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: add u-boot specific dts for rk3036 sdkAndy Yan
Add this dts to enable debug uart releated devices before relocation. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: use puts instead of printf when back to bootromAndy Yan
printf will increase the code size more than 1kb, but platform like rk3036 has no enough space for it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: enable SPL_LIBGENERIC for rk3036 based boardsAndy Yan
function board_init_f_init_reserve will call memset, which is implemented in lib, and enabled by CONFIG_SPL_LIBGENERIC_SUPPORT in spl stage. To reduce the code size, also enable SPL_TINY_MEMSET. As rk3036 will return to bootrom immediately after dram initialization, there is no need to run DM, so disable SPL_DM_SERIAL. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: disable SPL_ARCH_MEMCPY/MEMSET for rk3036Andy Yan
RK3036 has no enough sapce use ARCH_MEMCPY/MEMSET in spl stage Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: set malloc pool size to 0 before relocation in spl state on rk3036 ↵Andy Yan
based board RK3036 only has 4kb sram, the spl code will use 3.4 ~ 3.5 kb, the last 0.5kb are used for SP and GD, so there is no space for malloc. Also, the spl will directly return to bootrom after dram initialized, they never need the space for malloc. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27sandbox: use CONFIG_VAL(SYS_MALLOC_F_LEN) to distinguish malloc pool size ↵Andy Yan
before relocation SPL and normal u-boot stage use different malloc pool size configuration before relocation, so use CONFIG_VAL(SYS_MALLOC_F_LEN) to fit different boot stage. Signed-off-by: Andy Yan <andyshrk@gmail.com> Changes in v3: - use CONFIG_VAL(), which suggested by Simon Changes in v2: None arch/sandbox/cpu/start.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27microblaze: spl: configure SYS_MALLOC_F_LEN independently for SPL and full ↵Andy Yan
U-Boot Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27powerpc: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-BootAndy Yan
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27mips: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-BootAndy Yan
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27spl: make SPL and normal u-boot stage use independent SYS_MALLOC_F_LENAndy Yan
Some platforms have very limited SRAM to run SPL code, so there may not be the same amount space for a malloc pool before relocation in the SPL stage as the normal U-Boot stage. Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN, so the size of pre-relocation malloc pool can be configured memory space independently. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: firefly: Add "usb start" to auto-start USB deviceLeo Wen
Add "preboot=usb start" to ROCKCHIP_DEVICE_SETTINGS,you don't need to input "usb start" in command line of u-boot console,it can auto-start the USB device,after that usb keyboard can work. Signed-off-by: Leo Wen <leo.wen@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: firefly: Set the environment variable 'usbkbd' to the stdinLeo Wen
Add the 'usbkbd' environment variable to the 'stdin', the contents of the keyboard input can be auto-displayed on the serial terminal,so you don't need to manually set the environment variable 'stdin'. Signed-off-by: Leo Wen <leo.wen@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: firefly: Add some macros to enable the usb keyboardLeo Wen
Add four macros of CONFIG_USB_KEYBOARD,CONFIG_DM_KEYBOARD,etc in the firefly-rk3288_defconfig,can support usb keyboard device when these four macros are enabled. Signed-off-by: Leo Wen <leo.wen@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3399: enable SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT via ↵Philipp Tomsich
Kconfig SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT were previously enabled through rk3399_common.h. This change implies these options through Kconfig. These need to always be active for the RK3399, as follows: - SPL_SERIAL_SUPPORT is needed to pass the SPL build - SPL_DRIVERS_MISC_SUPPORT is needed to pass the SPL build Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: rk3288: Add support for drive-strength in PINCTRLRomain Perier
Currently, drive-strenght to 12ma are described and supposed to be used on RK3288. However, the pinctrl driver for this SoC only handles muxing and pull up/pull down via PU/PD control registers. So complex IPs like GMAC are working in normal ethernet 100mbps, but not at 1gbps typically. This commit adds support for handling drive-strength of 12ma, when it's defined in the DT. Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: use UUID for root partitionsKever Yang
We use to use /dev/mmcbl0p7 as root partition, and pass it to kernel by cmdline, but the mmc number in kernel in not fixed, we need to change the bootargs to adapt it from time to time. We can use the UUID to fix it, the ID is from: https://www.freedesktop.org/wiki/Specifications/DiscoverablePartitionsSpec/ ARM 32bit: 69dad710-2ce4-4e3c-b16c-21a1d49abed3 ARM 64bit: b921b045-1df0-41c3-af44-4c6f280d3fae Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: dts: rk3399-puma: put EFI partition entries at 2MBPhilipp Tomsich
When creating a EFI/GUID partition map for the RK3399-Q7 through U-Boot, the partition entries should be places at a 1MB offset from the start of the device to give us space for the environment (at 16KB on SD/MMC devices), the SPL stage (at 32KB on SD/MMC devices) and the image payload (at 256KB on SD/MMC devices). This change sets this up through the u-boot,efi-partition-entries-offset /config property in the RK3399-Q7 DTSI. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: dts: rk3399-puma: put environment (in MMC/SD configurations) ↵Philipp Tomsich
before SPL As our SPL stage can grow quite large (80KB+ are not unusual) on the RK3399-Q7, the default setting for the environment location (in include/configs/rockchip-common.h) can overlap our SPL. This change finally makes use of the 'u-boot,mmc-env-offset' DTS property to override the environment location and put it at 16KB into the device, which is right before the SPL (located at 32KB). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: clk: rk3399: remove unused fields from priv-structuresPhilipp Tomsich
This removes the unused 'rate' field from both rk3399_pmuclk_priv and rk3399_clk_priv. I didn't bother to check where this came from (i.e. what the historical context of these was), but only verified that these are indeed unused across all code-paths. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-27rockchip: clk: rk3368: remove unused fields from rk3368_clk_privPhilipp Tomsich
The rk3368_clk_priv has two unused fields: rate, has_bwadj. This removes them as there's no need for either (i.e. has_bwadj is always true for the RK3368, according to its TRM). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-27rockchip: clk: rk3368: use correct (i.e. 'rk3368_clk_priv') structure for ↵Philipp Tomsich
auto-alloc The clk driver for the RK3368 picked the wrong data structure's size for its auto-alloc size: the size was calculated on the structure representing the CRU hardware block instead of the priv structure. As the CRU's register file is much larger than the driver's priv, this did not cause any pain (except wasting memory). Fix this by using the correct data structure's size. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-27rockchip: spl: make boot0 hook TPL safePhilipp Tomsich
When building for a TPL/SPL setup (e.g. on the RK3368), we need the TPL stage to have the extra space for for the 'Rockchip SPL name' (i.e. 'RK33' word). Yet, the SPL will start execution at its first word (i.e. the first word in the SPL binary needs to be a valid instruction). To make things a bit more involved, CONFIG_SPL_BUILD is defined both for the SPL and the TPL stage. To avoid having to explicitly test for the first stage (TPL, if and only if TPL and SPL are built, SPL otherwise), this commit modifies the sequence to repeat the 'b reset' (instead of reserving 4 bytes of undefined space) at the start of the boot0 hook: if overwritten (and execution starts at the second word), the first instruction is still a 'b reset'... if not overwritten, we start on a 'b reset' as well. This solution wouldn't even require the check whether we are in the SPL/TPL build (i.e. CONFIG_SPL_BUILD), but we leave this check in for documentation purposes. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-27rockchip: pwm: add mask for config settingKever Yang
Use mask to clear old setting before direct set the new config, or else there it will mess up the config when it's not the same with default value. Fixes: 3851059 rockchip: Setup default PWM flags Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27power: pwm_regulator: remove redundant codeKever Yang
The regulator_enable() should be called from upper layer like regulators_enable_boot_on(), remove it from pwm regulator driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [fixed up typo in commit message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27power: pwm_regulator: fix the pwm_set_config parameter orderKever Yang
The rkpwm reg order has fixed by below patch: e3ef41d rockchip: pwm: fix the register layout for the PWM controller We need to correct the parameter order for pwm_set_config() to make the pwm regulator works correctly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-27rockchip: dts: correct vdd_log setting for firefly-rk3399Kever Yang
Add regulator-init-microvolt for driver to init the regulator, and the min output value is not 800000mV for the PWM2 io domain has changed to VCC3V0 instead of VCC1V8 in rockchip evb, we need to correct it with the value measured when PWM2 output HIGH. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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