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Add Kconfig entry for CONFIG_TPL_SPI_LOAD symbol to match the SPL one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
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Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all
configurations using it to Kconfig.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
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The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs
and an USB3 PHY. This patch adds drivers for these for the standard generic
PHY interface and supports the power-on/off calls and set the Host mode by
default.
They are based on the excellent work from Martin Blumenstingl merged in linux.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
for a generic number of PHYs and adapt the code to handle a generic
number of PHYs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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This is a port of the dwc3-of-simple driver from Linux to enable/deassert
clock and resets of a simple DWC3 Controller HW glue.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Add an option to get the clock speed from the device tree, hence adding
compatibility with DM clock drivers.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Since bus translations are now fully supported, use a plain
"dev_read_addr" to get the device address from the device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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The fpgamap interface has been switched to a "single function + data
size" interface. Reflect this change in the IHS I2C driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
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The commit implement a gpio-based software deblocking. The code
extract I2C pins description from device tree, switch pins to GPIO
mode, toggle SCL until slave release SDA, send I2C stop and switch
I2C pins back to I2C mode.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
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The commit describe usage of gpios and pinctrl device tree
properties in order to enable gpio-based software deblocking.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
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The mutex lock and unlock functions are stubbed out and mutex_is_locked
was 0. This caused asserts to fail in ubifs code when checking that the
mutex was locked. For example,
UBIFS assert failed in ubifs_change_lp at 540
UBIFS assert failed in ubifs_release_lprops at 278
Assume that the "mutex" is locked since that is the normal case when it
is checked in the ubifs code.
Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
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Update scripts/checkpatch.pl from upstream.
One of the many corrections is not creating an error for cover-letters.
Reintroduce U-Boot's
5c761ce58666b3a1695697498598f8bf3484a0c7
checkpatch.pl: Add warning for new __packed additions
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Using sizeof gives the size of the pointer only, not the string. This
could easily lead to crashes when using -l argument.
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
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The most significant change is the addition of the --self-test option
which allows to run a consistency check on all MAINTAINERS files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Provide correct file paths.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
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This patch adds the bulk clock API tests for the sandbox test suite.
It's very similar to the main test but only uses the _bulk() API and
checks if the clocks are correctly enabled/disabled.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch adds a "bulk" API to the clock API in order to get/enable/disable
/release a group of clocks associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of clocks in drivers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch adds the bulk reset API tests for the sandbox test suite.
Unlike the main test, it also check the "other" reset signal using the bulk API
and checks if the resets are correctly asserted/deasserted.
To allow the bulk API to work, and avoid changing the DT, the number of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Without the units these numbers are confusing. Add a comment about the
unit being 'bytes' and mention 'buildman' as the source.
Suggested-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
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If there is a problem with the parameters to log_add_filter(), the memory
allocated is currently not freed. Fix this.
Reported-by: Coverity (CID: 171962)
Signed-off-by: Simon Glass <sjg@chromium.org>
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Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
and print the following error:
mkimage: Can't print header for Rockchip Boot Image support: Success
It is not a failure to not print headers, so just display the warning message,
and finish the function properly.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Similarly to ARMV7, on ARMV7M instruction cache memory needs
to be disabled before running linux kernel to avoid kernel to
be stuck.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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The Amlogic Meson SoCs serial bindings were not written when serial
support was pushed into Linux and U-Boot.
A clean bindings document has been merged into Linux tree to correctly
handle the multiple clocks feeding the serial peripheral.
This update the U-Boot serial_meson driver with the new compatible
string for Amlogic Meson GX Socs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates
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Patch queue for efi - 2018-04-09
Highlights this time around:
- Lots of minor spec compliance fixes
- Support full range of GOP BLT commands
- More fine grained error checking
- Network fixes (init, DP)
- Lots of other bug fixes...
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Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Xilinx zcu104 is another customer board. It is sort of zcu102 clone with
some differences.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for zc12xx boards. All of them are internal boards for
silicon validation and share very similar base platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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zc1751 is based board with dc3 extenstion card which is used for silicon
validation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for Xilinx zcu100.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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SPL MMC boot requires to have clock early.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.
Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
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This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.
Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
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Add psu init for zc1751 dc cards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add psu init for zcu102-revA.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch enables the fixed link support for
all ZynqMP boards.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no memory which stores mac address that's why generate it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable ethernet phys for zc1751 dc5.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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U-Boot is now able to boot to ARM Trusted Firmware (ATF). The boot
flow is SPL(EL3) loads ATF and full u-boot and jump to ATF(EL3) which
pass control to full u-boot(EL2). This has been tested on zcu106, so
enable it in this defconfig.
To generate an image that triggers this booting flow, you need to pass
'-O arm-trusted-firmware' to mkimage.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Targets without net can't use pxe or dhcp boot methods.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch reads phytype from property "xlnx,phy-type" instead
od simply looking for "phy-type". This is to be inline with
Linux and also fixes the issue of detecting it wrongly in
u-boot.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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This patch uses writeq() function to enable greater than 32 bit
addressing of axi-ethernet for the ZynqMP devices.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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In commit 2453c695185f ("arm64: zynqmp: nand: Fixed NAND erase issue for
size 1GiB or more"), ARASAN_NAND_MEM_ADDR1_PAGE_MASK macro changed
to 0xFFFF and the same macro is used in nand write and so that getting
nand write error.
This patch reverted this macro to the 0xFFFF0000 and used
ARASAN_NAND_MEM_ADDR1_COL_MASK in the nand erase function
which is equal to 0xFFFF.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Xilfpga library expects the size of bitstream in a pointer
but currenly we are passing the size as a value. This patch
fixes this issue.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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