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2019-10-08driver: ddr: Refine the ddr init driver on imx8mJacky Bai
Refine the ddr init driver to make it more reusable for different DDR type(LPDDR4, DDR4 & DDR3L). So we can reduce some redundant code. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8mq: Update the ddrc QoS setting for B1 chipBai Ping
Update the ddrc Qos setting for B1 to align with B0's setting. Correct the initial clock for dram_pll. This setting will be overwrite before ddr phy training. Although there is no impact on the dram init, we still need to correct it to eliminate confusion. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Tested-by: Robby Cai <robby.cai@nxp.com>
2019-10-08ddr: imx8m: Fix ddr4 driver build issueYe Li
Since the parameter of dram_pll_init is changed, update to use new. Also remove non-existed header file. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08spi: fsl_qspi: Add support for QSPI on iMX7ULPYe Li
Add the compatible string and driver data for iMX7ULP platform Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: fsl_qspi: Update to use driver dataYe Li
Add the driver data for each compatible string. So we can remove the SOC config and use driver data instead. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: fsl_qspi: Update write data size for page program LUTYe Li
The write data size can be overwritten by writing to the IDATSZ field of IPCR register. Since the driver always updates the IDATSZ in page program operation. Set the LUT data size to 0 to align the codes with iMX. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: fsl_qspi: Fix DDR mode setting for latest iMX platformsYe Li
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller is updated to have TDH field in FLSHCR register. According to reference manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX DDR delay logic won't be enabled. Another issue in DDR mode is the MCR register will be overwritten in every read/write/erase operation. This causes DDR_EN been cleared while TDH=1, then no clk2x output for TX data shift and all operations will fail. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08imx: nandbcb: include long help only when enabledParthiban Nallathambi
conditionally include long help text when enabled Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: initialize fec only when enabledParthiban Nallathambi
board early initialize fec ethernet controller pinmux only when FEC is enabled Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: remove board specific boot order from splParthiban Nallathambi
boot order was added to handle both SD and eMMC. But commit 14d319b1 introduced to handle both eMMC and SD globally. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: pcl063: add nand boot supportParthiban Nallathambi
Booting from NAND needs nandbcb and nand boot device selection Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08apalis_imx6: use distroboot by defaultIgor Opaniuk
Use distro_bootcmd as default bootcmd instead of legacy wrappers. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-10-08colibri_imx6/imx7/imx8x: use distroboot by defaultIgor Opaniuk
Use distro_bootcmd as defauult bootcmd instead of legacy wrappers. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-10-08misc: imx8: add more scfw apiPeng Fan
Add more scfw api for clk/partition/seco usage The api will be used by ccf/partition/secure boot. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08spl: nor: support loading i.MX container format filePeng Fan
i.MX8 only support AHAB secure boot with Container format image, we could not use FIT to support secure boot, so introduce container support to let SPL could load container images. Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08spl: spi: support loading i.MX container format filePeng Fan
i.MX8 only support AHAB secure boot with Container format image, we could not use FIT to support secure boot, so introduce container support to let SPL could load container images. Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08spl: nand: support loading i.MX container format filePeng Fan
i.MX8 only support AHAB secure boot with Container format image, we could not use FIT to support secure boot, so introduce container support to let SPL could load container images. Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: update READMEPeng Fan
After u-boot.cnt is padded to flash.bin automatically by script, no need to burn the image mannually, so drop the step. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: Add support to get container image set sizePeng Fan
To avoid hardcoded offset when adding u-boot.cnt to flash.bin, we use flexible offset which is calculated based on the size of the container image generated int the first stage. And pad u-boot.cnt at 1KB alignment. So add code to get the offset when SPL loading u-boot.cnt. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08spl: nand: Introduce spl_nand_get_uboot_raw_pagePeng Fan
Introduce weak spl_nand_get_uboot_raw_page, then platform could have their own implementation. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
2019-10-08spl: nor: introduce spl_nor_get_uboot_basePeng Fan
Introduce weak spl_nor_get_uboot_base, then platform have their own implementation. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
2019-10-08spl: spi: introduce spl_spi_get_uboot_offsPeng Fan
Introduce a weak function spl_spi_get_uboot_offs, then platform could have their own implementation. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
2019-10-08spl: mmc: introduce spl_mmc_get_uboot_raw_sectorPeng Fan
Introduce a weak function spl_mmc_get_uboot_raw_sector, then platform could have their own implementation. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: Marek Vasut <marex@denx.de> Cc: Andreas Dannenberg <dannenberg@ti.com> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Michal Simek <michal.simek@xilinx.com>
2019-10-08imx: Add i.MX8MM EVK board support.Peng Fan
Add board and SoC dts Add ddr training code support SD/MMC/GPIO/PINCTRL/UART Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08arm: dts: add i.MX8MM pin funcPeng Fan
Import i.MX8MM pin func from Linux Kernel, commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08arm: dts: import i.MX8MM dtsiPeng Fan
Import i.MX8MM dtsi from Linux Kernel, commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: soc: probe clock device in arch_cpu_init_dmPeng Fan
Because we need to get cpu freq in print_cpuinfo at very early stage, so we need to make sure the ccm be probed. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: mmc_env: update runtime SD/MMC boot env devicePeng Fan
When DM_MMC enabled, the USDHC index in U-Boot is the USDHC port. To directly return devno, we could avoid add board specific code. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: add clk support for i.MX8MMPeng Fan
Introduce clk implementation for i.MX8MM, including pll configuration, ccm configuration. Mostly will be done clk dm driver, but such as DRAM part, we still use non clk dm driver, because we have limited sram. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: restructure clock.hPeng Fan
i.MX8MQ and i.MX8MM use different analog pll design, but they share same ccm design. Add clock_imx8mq.h for i.MX8MQ keep common part in clock.h Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: rename clock to clock_imx8mqPeng Fan
i.MX8MQ and i.MX8MM has totally different pll design, so rename clock to clock_imx8mq. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: restrict reset_cpuPeng Fan
Make reset_cpu only visible when CONFIG_SYSRESET not defined or CONFIG_SPL_BUILD. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: soc: enable SCTR clock before timer initPeng Fan
To i.MX8MM SCTR clock is disabled by ROM, so before timer init need to enable it. To i.MX8MQ, it does not hurt the clock is enabled again. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: Configure trustzone region 0 for non-secure accessYe Li
Set trustzone region 0 to allow both non-secure and secure access when trust zone is enabled. We found USB controller fails to access DDR if the default region 0 is secure access only. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: Fix MMU table issue for OPTEE memoryPeng Fan
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE memory from its settings. So ARM speculative prefetch in u-boot may access that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory is set to secure access, then the speculative prefetch will fail and cause various memory issue in u-boot. The fail address register and int_status register in trustzone has logged that speculative access from u-boot. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add i.MX8MM PE propertyPeng Fan
i.MX8MM does not have LVTTL, it has a PE property Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: add pin header for i.MX8MMPeng Fan
Add pin header file for i.MX8MM To IMX8MM_PAD_NAND_WE_B_USDHC3_CLK, IOMUX_CONFIG_SION needs to be selected. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add get_cpu_rev support for i.MX8MMPeng Fan
There are several variants based on i.MX8MM, add the support in get_cpu_rev Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: update imx-regs for i.MX8MMPeng Fan
i.MX8MM has similar architecture with i.MX8MQ, but it has totally different PLL design and register layout change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: imx-regs: drop unused register definitionsPeng Fan
Drop unused register definitions and structures for i.MX8MQ Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: spl: add spl_board_boot_device for i.MX8MMPeng Fan
Differnet board has different controller used, it is hard to use one layout for them all. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add i.MX8MM cpu typePeng Fan
Add i.MX8MM cpu type and related helper functions Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: imx8mm: add clock bindings headerPeng Fan
Import clock bindings header file from Linux 5.3.0-rc2 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add IMX8MM kconfig entryPeng Fan
Add IMX8MM kconfig entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add IMX8MQ kconfig entryPeng Fan
Add IMX8MQ kconfig entry, preparing support IMX8MM Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: add image cfg for i.MX8MM lpddr4Peng Fan
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then we could not reuse imximage.cfg, so create a new one. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08ddr: imx8m: fix ddr firmware location when enable SPL OFPeng Fan
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to end of the u-boot-spl-nodtb.bin, however we also put the ddr firmware file to this location, so need to adapt the code with SPL OF and align to 4 bytes to ease copy firmware. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08tools: imx8m_image: align spl bin image sizePeng Fan
The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses a 4-byte-aligned address to load the firmware. In cases where OF is enabled in SPL the dtb will be appended to the SPL binary and can result in a binary that is not aligned correctly. If OF is not enabled in SPL, `_end` is already aligned correctly, but this patch does not hurt. To ensure the correct alignment we use dd to create a temporary file u-boot-spl-pad.bin with the correct padding. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: mkimage_fit_atf: Fix FIT image for correct boot orderFrieder Schrempf
Fix the FIT image metadata for i.MX8 to result in the intended boot order (SPL -> ATF -> U-Boot). Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-16 21:33:52 +0000