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It is quite likely that the number of U-Boot-specific tests in
checkpatch.pl will increase over time. We should have tests for these to
avoid undefined behaviour and bugs being introduced, which might cause
people to ignore the warnings.
Add a simple new class that can generate a patch with a single-line
addition in it. Use that to add a test for one of the checkpatch checks.
Signed-off-by: Simon Glass <sjg@chromium.org>
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These tests check checkpatch.pl operation and can server as our tests for
the U-Boot-specific updates to that script. Rename the file and update
comments to indicate this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This parameter should be a struct uclass, not struct udevice. Correct it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
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If CONFIG_SPL_DM=n and CONFIG_SPL_LOG=y a build error occurs:
ld.bfd: common/built-in.o: in function `log_get_cat_name':
common/log.c:48: undefined reference to `uclass_get_name'
make[1]: *** [scripts/Makefile.spl:422: spl/u-boot-spl] Error 1
Call uclass_get_name() only if DM is enabled.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Up to now the RAM size of the sandbox is hard coded as 128 MiB. This does
not allow testing the correct handling of addresses outside the 32bit
range. 128 MiB is also rather small when tracing functions where the trace
is written to RAM.
Provide configuration variable CONFIG_SANDBOX_RAM_SIZE_MB to set the RAM
size in MiB. It defaults to 128 MiB with a minimum of 64 MiB.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This module doesn't need to import itself. It causes problems on
very old Python 3 (e.g. 3.4.0). Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Pass this module in so that settings does not need to import it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
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Adjust the get_maintainer module to accept a list of directories to search
for the script. This avoids needing to import gitutil.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
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Only a few members of this class are used and only in a test. To avoid
importing the module, convert the test to use a dict.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
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This seems to cause problems in some cases. Split the dependency by
copying the code to command.
Reported-by: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
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The checkpatch module is not used, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
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Compiling drivers/mtd/spi/sandbox.c fails when compiled with
CONFIG_LOG=n:
In file included from include/common.h:20,
from drivers/mtd/spi/sandbox.c:13:
drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of
type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=]
295 | log_content(" cmd: transition to %s state\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
37 | #define pr_fmt(fmt) fmt
| ^~~
include/log.h:128:30: note: in expansion of macro ‘log_nop’
128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \
| ^~~~~~~
drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro
‘log_content’
295 | log_content(" cmd: transition to %s state\n",
| ^~~~~~~~~~~
drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here
295 | log_content(" cmd: transition to %s state\n",
| ~^
| |
| char *
| %d
Supply function sandbox_sf_state_name() independent of CONFIG_LOG.
Fixes: c3aed5db591e ("sandbox: spi: Add more logging")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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assert() only works in debug mode. So checking a successful memory
allocation should not use assert().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Enable QE bit for ISSI flash chips.
QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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The spi bitbanging driver did not implement all spi modes properly. Add
code to support all spi modes, honoring soft_spi_set_mode() and
defaulting to spi mode 0. Previously, CPHA was implemented inversely
(defaulting to CPHA=1) and CPOL=1 was hardcoded.
Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.
Remove it.
Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Now all boards are using this omap3 spi driver in
dm model, so drop the nondm code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for db-88f6281-bp-nand board.
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Gilles Gameiro <gilles@gigadevices.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Drop it.
Cc: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Drop it.
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Drop it.
Cc: Ash Charles <ash@gumstix.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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DM, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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DM, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for siemens rut board.
Build is fine, but not tested.
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for siemens pxm2 board.
Build is fine, but not tested.
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for siemens thuban board.
Build is fine, but not tested.
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for siemens rastaban board.
Build is fine, but not tested.
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for siemens etamin board.
Build is fine, but not tested.
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI, DM_SPI_FLASH for siemens draco board.
Build is fine, but not tested.
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable DM_SPI for am355x igep003x board.
Build is fine, but not tested.
Cc: Javier Martínez Canillas <javier@dowhile0.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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- Add two- and three-argument versions of CONFIG_IS_ENABLED in
linux/kconfig.h
- Adds a new feature which supports copying modified parts of
the frame buffer to the uncached hardware buffer
- Enable the copy framebuffer on various x86 targets
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Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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Remove the overlap between DRAM and device's IO area.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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Some PCI Express register offsets are currently defined in multiple
drivers, move them to a common header to avoid re-definitions and
as a pre-requisite for adding new PCIe driver.
While at it replace some spaces with tabs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.
This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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In current code there is no cache flush after initializing the scratchpad
buffer array with the scratchpad buffer pointers. This leads to a failure
of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
controller + VL805 USB hub) - the very first TRB transfer on the command
ring fails and there is a timeout while waiting for the command completion
event. After adding the missing cache flush everything seems to be working
as expected.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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i2c changes for v2020.10
- Add support for I2C controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.
- Add I2C controller support for Cortina Access CAxxxx SoCs
- new rtc methods, rtc command, and tests
- imx_lpi2c: Improve the codes to use private data
- stm32f7_i2c.c: Add new compatible "st,stm32mp15-i2c"
- stm32f7_i2c.c: Add Fast Mode Plus support
- pwm: Add PWM driver for SiFive SoC
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- Armada 38x DDR3 fixes, enhancements (Chris)
- Armada 38x UTMI PHY SerDes fix (Chris)
- Helios4 update - sync with clearfog (Dennis)
- LaCie Kirkwood board rework - enable DM (Simon)
- net/mvpp2 memory init fix (Sven)
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Since the mdio code got upstreamed it is not possible
to activate network ports on CP110 Master and Slave.
The problem is in mvpp2_base_probe which is called for each
CP110 and it initializes the buffer area for descs and rx_buffers.
This should only happen once though and the bd space is actually
set to 0 after the first run of the function.
This leads to an error when the second CP110 tries the initialization
again and disables all network ports on this CP110.
This patch adds a static variable to check if the buffer area is
initialized only once globally.
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
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This patch enables DM_ETH for the following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
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This patch enables DM_USB and USB_STORAGE for the following
Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
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This patch switches the SATA driver from mvsata_ide to sata_mv for the
following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
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This patch converts the following Kirkwood-based LaCie boards to DM,
DM_SPI and DM_SPI_FLASH:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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The spi0 alias is needed by the environment code to retrieve the SPI
flash. This patch adds some -u-boot.dtsi files, providing the spi0
aliases, for all the following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Note that this -u-boot.dtsi files will be removed as soon as the spi0
aliases will be available in the upstream Linux dtsi files.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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The helios4 is built on the same microsom as the clearfog, by syncing the config
we enable the same featureset that exists in the som on the helios4. The current
config does not boot as some of the clearfog changes needed to be made on the
helios4 also, generally speaking most changes for the clearfog should also be
made on the helios4.
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Reviewed-by: Stefan Roese <sr@denx.de>
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When running USB compliance tests on our Armada-385 hardware platforms
we have seen some eye mask violations. Marvell's internal documentation
says: Based on silicon test results, it is recommended to change the
impedance calibration threshold setting to 0x6 prior to calibration.
Port changes from Marvell's u-boot fork[1] to address this.
[1] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/a6221551
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Fix spelling of Alignment.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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